6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2024-07-06 01:28:57 +00:00
Code Issues Projects Releases Wiki Activity

Introduces the Mac Plus memory map.

Browse Source 
Albeit with no SCSI support yet.
This commit is contained in:
Thomas Harte 2019-08-02 22:26:40 -04:00
parent d67c5145c0
commit a07488cf1b
1 changed files with 61 additions and 17 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

78
Machines/Apple/Macintosh/Macintosh.cpp
View File

@ -343,20 +343,47 @@ template <Analyser::Static::Macintosh::Target::Model model> class ConcreteMachin
void set_rom_is_overlay(bool rom_is_overlay) { void set_rom_is_overlay(bool rom_is_overlay) {
ROM_is_overlay_ = rom_is_overlay; ROM_is_overlay_ = rom_is_overlay;
populate_memory_map([rom_is_overlay] (std::function<void(int target, BusDevice device)> map_to) { using Model = Analyser::Static::Macintosh::Target::Model;
// Addresses up to $80 0000 aren't affected by this bit. switch(model) {
if(rom_is_overlay) { case Model::Mac128k:
// Up to $60 0000 mirrors of the ROM alternate with unassigned areas every $10 0000 byes. case Model::Mac512k:
for(int c = 0; c <= 0x600000; c += 0x100000) { case Model::Mac512ke:
map_to(c, ((c >> 20)&1) ? BusDevice::ROM : BusDevice::Unassigned); populate_memory_map([rom_is_overlay] (std::function<void(int target, BusDevice device)> map_to) {
} // Addresses up to $80 0000 aren't affected by this bit.
map_to(0x800000, BusDevice::RAM); if(rom_is_overlay) {
} else { // Up to $60 0000 mirrors of the ROM alternate with unassigned areas every $10 0000 byes.
map_to(0x400000, BusDevice::RAM); for(int c = 0; c <= 0x600000; c += 0x100000) {
map_to(0x500000, BusDevice::ROM); map_to(c, ((c >> 20)&1) ? BusDevice::ROM : BusDevice::Unassigned);
map_to(0x800000, BusDevice::Unassigned); }
} map_to(0x800000, BusDevice::RAM);
}); } else {
map_to(0x400000, BusDevice::RAM);
map_to(0x500000, BusDevice::ROM);
map_to(0x800000, BusDevice::Unassigned);
}
});
break;
case Model::MacPlus:
populate_memory_map([rom_is_overlay] (std::function<void(int target, BusDevice device)> map_to) {
// Addresses up to $80 0000 aren't affected by this bit.
if(rom_is_overlay) {
map_to(0x100000, BusDevice::ROM);
map_to(0x400000, BusDevice::Unassigned);
map_to(0x500000, BusDevice::ROM);
map_to(0x580000, BusDevice::Unassigned);
map_to(0x600000, BusDevice::SCSI);
map_to(0x800000, BusDevice::RAM);
} else {
map_to(0x400000, BusDevice::RAM);
map_to(0x500000, BusDevice::ROM);
map_to(0x580000, BusDevice::Unassigned);
map_to(0x600000, BusDevice::SCSI);
map_to(0x800000, BusDevice::Unassigned);
}
});
break;
}
} }
bool video_is_outputting() { bool video_is_outputting() {
@ -709,9 +736,26 @@ template <Analyser::Static::Macintosh::Target::Model model> class ConcreteMachin
}); });
break; break;
// case Model::MacPlus: { case Model::MacPlus:
// int segment = 0; populate_memory_map([] (std::function<void(int target, BusDevice device)> map_to) {
// } break; map_to(0x100000, BusDevice::ROM);
map_to(0x400000, BusDevice::Unassigned);
map_to(0x500000, BusDevice::ROM);
map_to(0x580000, BusDevice::Unassigned);
map_to(0x600000, BusDevice::SCSI);
map_to(0x800000, BusDevice::RAM);
map_to(0x900000, BusDevice::Unassigned);
map_to(0xa00000, BusDevice::SCCReadResetPhase);
map_to(0xb00000, BusDevice::Unassigned);
map_to(0xc00000, BusDevice::SCCWrite);
map_to(0xd00000, BusDevice::Unassigned);
map_to(0xe00000, BusDevice::IWM);
map_to(0xe80000, BusDevice::Unassigned);
map_to(0xf00000, BusDevice::VIA);
map_to(0xf80000, BusDevice::PhaseRead);
map_to(0x1000000, BusDevice::Unassigned);
});
break;
} }
} }