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Corrects direction of MOVE [to/from] USP.
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2d97fc1f59
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@ -71,20 +71,20 @@ class QL: public CPU::MC68000::BusHandler {
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case Microcycle::SelectWord | Microcycle::Read:
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cycle.value->full = is_peripheral ? peripheral_result : base[word_address];
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if(!(cycle.operation & Microcycle::IsProgram)) printf("[word r %08x -> %04x] ", *cycle.address, cycle.value->full);
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// if(!(cycle.operation & Microcycle::IsProgram)) printf("[word r %08x -> %04x] ", *cycle.address, cycle.value->full);
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break;
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case Microcycle::SelectByte | Microcycle::Read:
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cycle.value->halves.low = (is_peripheral ? peripheral_result : base[word_address]) >> cycle.byte_shift();
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if(!(cycle.operation & Microcycle::IsProgram)) printf("[byte r %08x -> %02x] ", *cycle.address, cycle.value->halves.low);
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// if(!(cycle.operation & Microcycle::IsProgram)) printf("[byte r %08x -> %02x] ", *cycle.address, cycle.value->halves.low);
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break;
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case Microcycle::SelectWord:
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assert(!(is_rom && !is_peripheral));
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if(!(cycle.operation & Microcycle::IsProgram)) printf("[word w %04x -> %08x] ", cycle.value->full, *cycle.address);
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// if(!(cycle.operation & Microcycle::IsProgram)) printf("[word w %04x -> %08x] ", cycle.value->full, *cycle.address);
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if(!is_peripheral) base[word_address] = cycle.value->full;
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break;
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case Microcycle::SelectByte:
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assert(!(is_rom && !is_peripheral));
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if(!(cycle.operation & Microcycle::IsProgram)) printf("[byte w %02x -> %08x] ", cycle.value->halves.low, *cycle.address);
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// if(!(cycle.operation & Microcycle::IsProgram)) printf("[byte w %02x -> %08x] ", cycle.value->halves.low, *cycle.address);
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if(!is_peripheral) base[word_address] = (cycle.value->halves.low << cycle.byte_shift()) | (base[word_address] & (0xffff ^ cycle.byte_mask()));
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break;
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}
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@ -59,7 +59,18 @@ template <class T, bool dtack_is_implicit> void Processor<T, dtack_is_implicit>:
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// for(int c = 0; c < 8; ++ c) std::cout << "d" << c << ":" << std::setw(8) << data_[c].full << " ";
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// for(int c = 0; c < 8; ++ c) std::cout << "a" << c << ":" << std::setw(8) << address_[c].full << " ";
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// }
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std::cout << '\n';
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static bool should_log = false;
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should_log |= program_counter_.full > 0x286;
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if(should_log) {
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std::cout << "a7:" << std::setw(8) << std::setfill('0') << address_[7].full << " ";
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if(is_supervisor_) {
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std::cout << "usp:" << std::setw(8) << std::setfill('0') << stack_pointers_[0].full << " ";
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} else {
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std::cout << "ssp:" << std::setw(8) << std::setfill('0') << stack_pointers_[1].full << " ";
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}
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std::cout << '\n';
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}
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decoded_instruction_ = prefetch_queue_.halves.high.full;
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if(!instructions[decoded_instruction_].micro_operations) {
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@ -67,7 +78,7 @@ template <class T, bool dtack_is_implicit> void Processor<T, dtack_is_implicit>:
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std::cerr << "68000 Abilities exhausted; can't manage instruction " << std::hex << decoded_instruction_ << " from " << (program_counter_.full - 4) << std::endl;
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return;
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} else {
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std::cout << std::hex << (program_counter_.full - 4) << ": " << std::setw(4) << decoded_instruction_ << '\t';
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if(should_log) std::cout << std::hex << (program_counter_.full - 4) << ": " << std::setw(4) << decoded_instruction_ << '\t';
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}
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active_program_ = &instructions[decoded_instruction_];
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@ -655,6 +655,10 @@ struct ProcessorStorageConstructor {
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int dec = decrement_action(is_long_word_access, is_byte_access);
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int inc = increment_action(is_long_word_access, is_byte_access);
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if(instruction == 0x4eda) {
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printf("");
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}
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switch(mapping.decoder) {
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case Decoder::SWAP: {
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storage_.instructions[instruction].set_destination(storage_, Dn, ea_register);
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@ -2282,15 +2286,15 @@ struct ProcessorStorageConstructor {
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storage_.instructions[instruction].requires_supervisor = true;
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// Observation here: because this is a privileged instruction, the user stack pointer
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// definitely isn't currently A7.
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// definitely isn't currently [copied into] A7.
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if(instruction & 0x8) {
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// Transfer FROM the USP.
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storage_.instructions[instruction].destination = &storage_.stack_pointers_[0];
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storage_.instructions[instruction].set_source(storage_, An, ea_register);
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} else {
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// Transfer TO the USP.
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storage_.instructions[instruction].source = &storage_.stack_pointers_[0];
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storage_.instructions[instruction].set_destination(storage_, An, ea_register);
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} else {
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// Transfer TO the USP.
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storage_.instructions[instruction].set_source(storage_, An, ea_register);
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storage_.instructions[instruction].destination = &storage_.stack_pointers_[0];
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}
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op(Action::PerformOperation, seq("np"));
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