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Corrects direction of MOVE [to/from] USP.

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This commit is contained in:
Thomas Harte 2019-04-19 22:41:06 -04:00
parent 2d97fc1f59
commit a49f516265
3 changed files with 26 additions and 11 deletions
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8
OSBindings/Mac/Clock SignalTests/QLTests.mm
View File

@ -71,20 +71,20 @@ class QL: public CPU::MC68000::BusHandler {
case Microcycle::SelectWord | Microcycle::Read: case Microcycle::SelectWord | Microcycle::Read:
cycle.value->full = is_peripheral ? peripheral_result : base[word_address]; cycle.value->full = is_peripheral ? peripheral_result : base[word_address];
if(!(cycle.operation & Microcycle::IsProgram)) printf("[word r %08x -> %04x] ", *cycle.address, cycle.value->full); // if(!(cycle.operation & Microcycle::IsProgram)) printf("[word r %08x -> %04x] ", *cycle.address, cycle.value->full);
break; break;
case Microcycle::SelectByte | Microcycle::Read: case Microcycle::SelectByte | Microcycle::Read:
cycle.value->halves.low = (is_peripheral ? peripheral_result : base[word_address]) >> cycle.byte_shift(); cycle.value->halves.low = (is_peripheral ? peripheral_result : base[word_address]) >> cycle.byte_shift();
if(!(cycle.operation & Microcycle::IsProgram)) printf("[byte r %08x -> %02x] ", *cycle.address, cycle.value->halves.low); // if(!(cycle.operation & Microcycle::IsProgram)) printf("[byte r %08x -> %02x] ", *cycle.address, cycle.value->halves.low);
break; break;
case Microcycle::SelectWord: case Microcycle::SelectWord:
assert(!(is_rom && !is_peripheral)); assert(!(is_rom && !is_peripheral));
if(!(cycle.operation & Microcycle::IsProgram)) printf("[word w %04x -> %08x] ", cycle.value->full, *cycle.address); // if(!(cycle.operation & Microcycle::IsProgram)) printf("[word w %04x -> %08x] ", cycle.value->full, *cycle.address);
if(!is_peripheral) base[word_address] = cycle.value->full; if(!is_peripheral) base[word_address] = cycle.value->full;
break; break;
case Microcycle::SelectByte: case Microcycle::SelectByte:
assert(!(is_rom && !is_peripheral)); assert(!(is_rom && !is_peripheral));
if(!(cycle.operation & Microcycle::IsProgram)) printf("[byte w %02x -> %08x] ", cycle.value->halves.low, *cycle.address); // if(!(cycle.operation & Microcycle::IsProgram)) printf("[byte w %02x -> %08x] ", cycle.value->halves.low, *cycle.address);
if(!is_peripheral) base[word_address] = (cycle.value->halves.low << cycle.byte_shift()) | (base[word_address] & (0xffff ^ cycle.byte_mask())); if(!is_peripheral) base[word_address] = (cycle.value->halves.low << cycle.byte_shift()) | (base[word_address] & (0xffff ^ cycle.byte_mask()));
break; break;
} }

15
Processors/68000/Implementation/68000Implementation.hpp
View File

@ -59,7 +59,18 @@ template <class T, bool dtack_is_implicit> void Processor<T, dtack_is_implicit>:
// for(int c = 0; c < 8; ++ c) std::cout << "d" << c << ":" << std::setw(8) << data_[c].full << " "; // for(int c = 0; c < 8; ++ c) std::cout << "d" << c << ":" << std::setw(8) << data_[c].full << " ";
// for(int c = 0; c < 8; ++ c) std::cout << "a" << c << ":" << std::setw(8) << address_[c].full << " "; // for(int c = 0; c < 8; ++ c) std::cout << "a" << c << ":" << std::setw(8) << address_[c].full << " ";
// } // }
std::cout << '\n'; static bool should_log = false;
should_log |= program_counter_.full > 0x286;
if(should_log) {
std::cout << "a7:" << std::setw(8) << std::setfill('0') << address_[7].full << " ";
if(is_supervisor_) {
std::cout << "usp:" << std::setw(8) << std::setfill('0') << stack_pointers_[0].full << " ";
} else {
std::cout << "ssp:" << std::setw(8) << std::setfill('0') << stack_pointers_[1].full << " ";
}
std::cout << '\n';
}
decoded_instruction_ = prefetch_queue_.halves.high.full; decoded_instruction_ = prefetch_queue_.halves.high.full;
if(!instructions[decoded_instruction_].micro_operations) { if(!instructions[decoded_instruction_].micro_operations) {
@ -67,7 +78,7 @@ template <class T, bool dtack_is_implicit> void Processor<T, dtack_is_implicit>:
std::cerr << "68000 Abilities exhausted; can't manage instruction " << std::hex << decoded_instruction_ << " from " << (program_counter_.full - 4) << std::endl; std::cerr << "68000 Abilities exhausted; can't manage instruction " << std::hex << decoded_instruction_ << " from " << (program_counter_.full - 4) << std::endl;
return; return;
} else { } else {
std::cout << std::hex << (program_counter_.full - 4) << ": " << std::setw(4) << decoded_instruction_ << '\t'; if(should_log) std::cout << std::hex << (program_counter_.full - 4) << ": " << std::setw(4) << decoded_instruction_ << '\t';
} }
active_program_ = &instructions[decoded_instruction_]; active_program_ = &instructions[decoded_instruction_];

14
Processors/68000/Implementation/68000Storage.cpp
View File

@ -655,6 +655,10 @@ struct ProcessorStorageConstructor {
int dec = decrement_action(is_long_word_access, is_byte_access); int dec = decrement_action(is_long_word_access, is_byte_access);
int inc = increment_action(is_long_word_access, is_byte_access); int inc = increment_action(is_long_word_access, is_byte_access);
if(instruction == 0x4eda) {
printf("");
}
switch(mapping.decoder) { switch(mapping.decoder) {
case Decoder::SWAP: { case Decoder::SWAP: {
storage_.instructions[instruction].set_destination(storage_, Dn, ea_register); storage_.instructions[instruction].set_destination(storage_, Dn, ea_register);
@ -2282,15 +2286,15 @@ struct ProcessorStorageConstructor {
storage_.instructions[instruction].requires_supervisor = true; storage_.instructions[instruction].requires_supervisor = true;
// Observation here: because this is a privileged instruction, the user stack pointer // Observation here: because this is a privileged instruction, the user stack pointer
// definitely isn't currently A7. // definitely isn't currently [copied into] A7.
if(instruction & 0x8) { if(instruction & 0x8) {
// Transfer FROM the USP. // Transfer FROM the USP.
storage_.instructions[instruction].destination = &storage_.stack_pointers_[0];
storage_.instructions[instruction].set_source(storage_, An, ea_register);
} else {
// Transfer TO the USP.
storage_.instructions[instruction].source = &storage_.stack_pointers_[0]; storage_.instructions[instruction].source = &storage_.stack_pointers_[0];
storage_.instructions[instruction].set_destination(storage_, An, ea_register); storage_.instructions[instruction].set_destination(storage_, An, ea_register);
} else {
// Transfer TO the USP.
storage_.instructions[instruction].set_source(storage_, An, ea_register);
storage_.instructions[instruction].destination = &storage_.stack_pointers_[0];
} }
op(Action::PerformOperation, seq("np")); op(Action::PerformOperation, seq("np"));