From a4cec95db163cb288e921eab740554f38925399c Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Wed, 7 Oct 2020 19:36:23 -0400 Subject: [PATCH] Corrects load and transfer flag oversights. --- .../Clock SignalTests/KlausDormannTests.swift | 2 +- .../Implementation/65816Implementation.hpp | 17 +++++++++++++++-- .../65816/Implementation/65816Storage.cpp | 2 +- 3 files changed, 17 insertions(+), 4 deletions(-) diff --git a/OSBindings/Mac/Clock SignalTests/KlausDormannTests.swift b/OSBindings/Mac/Clock SignalTests/KlausDormannTests.swift index 497104d4c..b772fe5d0 100644 --- a/OSBindings/Mac/Clock SignalTests/KlausDormannTests.swift +++ b/OSBindings/Mac/Clock SignalTests/KlausDormannTests.swift @@ -44,7 +44,7 @@ class KlausDormannTests: XCTestCase { switch address { case 0x3399: return nil // success! - case 0x052a: return "DEX did not correctly set zero flag" + case 0x052a: return "TAX, DEX or LDA did not correctly set flags" case 0x33a7: return "Decimal ADC result has wrong value" case 0x3502: return "Binary SBC result has wrong value" case 0x33b9: return "Decimal SBC result has wrong value" diff --git a/Processors/65816/Implementation/65816Implementation.hpp b/Processors/65816/Implementation/65816Implementation.hpp index 4c23bdb2e..3a5f8a387 100644 --- a/Processors/65816/Implementation/65816Implementation.hpp +++ b/Processors/65816/Implementation/65816Implementation.hpp @@ -313,27 +313,33 @@ template void Processor::run_for(const Cycles case LDA: LD(a_, data_buffer_.value, m_masks_); + flags_.set_nz(a_.full, m_shift_); break; case LDX: LD(x_, data_buffer_.value, x_masks_); + flags_.set_nz(x_.full, x_shift_); break; case LDY: LD(y_, data_buffer_.value, x_masks_); + flags_.set_nz(y_.full, x_shift_); break; case PLB: - a_.halves.high = instruction_buffer_.value; + data_bank_ = (instruction_buffer_.value & 0xff) << 16; + flags_.set_nz(instruction_buffer_.value); break; case PLD: - direct_ = ((instruction_buffer_.value) & 0xff) << 16; + direct_ = (instruction_buffer_.value & 0xff) << 16; + flags_.set_nz(instruction_buffer_.value); break; // The below attempts to obey the 8/16-bit mixed transfer rules // as documented in https://softpixel.com/~cwright/sianse/docs/65816NFO.HTM + // (and makes reasonable guesses as to the N flag) case TXS: s_ = x_.full & x_masks_[1]; @@ -341,30 +347,37 @@ template void Processor::run_for(const Cycles case TSX: LD(x_, s_.full, x_masks_); + flags_.set_nz(x_.full, x_shift_); break; case TXY: LD(y_, x_.full, x_masks_); + flags_.set_nz(y_.full, x_shift_); break; case TYX: LD(x_, y_.full, x_masks_); + flags_.set_nz(x_.full, x_shift_); break; case TAX: LD(x_, a_.full, x_masks_); + flags_.set_nz(x_.full, x_shift_); break; case TAY: LD(x_, a_.full, x_masks_); + flags_.set_nz(y_.full, x_shift_); break; case TXA: LD(a_, x_.full, m_masks_); + flags_.set_nz(a_.full, m_shift_); break; case TYA: LD(a_, y_.full, m_masks_); + flags_.set_nz(a_.full, m_shift_); break; diff --git a/Processors/65816/Implementation/65816Storage.cpp b/Processors/65816/Implementation/65816Storage.cpp index 58dc50a03..947148166 100644 --- a/Processors/65816/Implementation/65816Storage.cpp +++ b/Processors/65816/Implementation/65816Storage.cpp @@ -893,7 +893,7 @@ ProcessorStorage::ProcessorStorage() { /* 0xa8 TAY i */ op(implied, TAY); /* 0xa9 LDA # */ op(immediate, LDA); /* 0xaa TAX i */ op(implied, TAX); - /* 0xab PLB s */ op(stack_pull, PLB); + /* 0xab PLB s */ op(stack_pull, PLB); // TODO: force to 8-bit only; ditto [at least] PHB, PLD, PHD. /* 0xac LDY a */ op(absolute, LDY); /* 0xad LDA a */ op(absolute, LDA); /* 0xae LDX a */ op(absolute, LDX);