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This'll probably do for now.
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@ -551,6 +551,9 @@ template <class T> class Processor {
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unsigned int scheduleProgramsReadPointer = _scheduleProgramsReadPointer;
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unsigned int scheduleProgramsReadPointer = _scheduleProgramsReadPointer;
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unsigned int scheduleProgramProgramCounter = _scheduleProgramProgramCounter;
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unsigned int scheduleProgramProgramCounter = _scheduleProgramProgramCounter;
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RegisterPair nextAddress = _nextAddress;
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RegisterPair nextAddress = _nextAddress;
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BusOperation nextBusOperation = _nextBusOperation;
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uint16_t busAddress = _busAddress;
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uint8_t *busValue = _busValue;
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#define checkSchedule(op) \
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#define checkSchedule(op) \
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if(!_scheduledPrograms[scheduleProgramsReadPointer]) {\
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if(!_scheduledPrograms[scheduleProgramsReadPointer]) {\
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@ -574,25 +577,25 @@ template <class T> class Processor {
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while(number_of_cycles > 0) {
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while(number_of_cycles > 0) {
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while (_ready_is_active && number_of_cycles > 0) {
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while (_ready_is_active && number_of_cycles > 0) {
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number_of_cycles -= static_cast<T *>(this)->perform_bus_operation(BusOperation::Ready, _busAddress, _busValue);
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number_of_cycles -= static_cast<T *>(this)->perform_bus_operation(BusOperation::Ready, busAddress, busValue);
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}
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}
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while (!_ready_is_active && number_of_cycles > 0) {
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while (!_ready_is_active && number_of_cycles > 0) {
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if (_nextBusOperation != BusOperation::None) {
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if (nextBusOperation != BusOperation::None) {
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_irq_request_history[0] = _irq_request_history[1];
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_irq_request_history[0] = _irq_request_history[1];
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_irq_request_history[1] = _irq_line_is_enabled && !_interruptFlag;
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_irq_request_history[1] = _irq_line_is_enabled && !_interruptFlag;
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number_of_cycles -= static_cast<T *>(this)->perform_bus_operation(_nextBusOperation, _busAddress, _busValue);
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number_of_cycles -= static_cast<T *>(this)->perform_bus_operation(nextBusOperation, busAddress, busValue);
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_nextBusOperation = BusOperation::None;
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nextBusOperation = BusOperation::None;
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}
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}
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const MicroOp cycle = program[scheduleProgramProgramCounter];
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const MicroOp cycle = program[scheduleProgramProgramCounter];
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scheduleProgramProgramCounter++;
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scheduleProgramProgramCounter++;
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#define read_op(val, addr) _nextBusOperation = BusOperation::ReadOpcode; _busAddress = addr; _busValue = &val
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#define read_op(val, addr) nextBusOperation = BusOperation::ReadOpcode; busAddress = addr; busValue = &val
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#define read_mem(val, addr) _nextBusOperation = BusOperation::Read; _busAddress = addr; _busValue = &val
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#define read_mem(val, addr) nextBusOperation = BusOperation::Read; busAddress = addr; busValue = &val
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#define throwaway_read(addr) _nextBusOperation = BusOperation::Read; _busAddress = addr; _busValue = &throwaway_target
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#define throwaway_read(addr) nextBusOperation = BusOperation::Read; busAddress = addr; busValue = &throwaway_target
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#define write_mem(val, addr) _nextBusOperation = BusOperation::Write; _busAddress = addr; _busValue = &val
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#define write_mem(val, addr) nextBusOperation = BusOperation::Write; busAddress = addr; busValue = &val
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switch(cycle) {
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switch(cycle) {
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@ -1040,7 +1043,7 @@ template <class T> class Processor {
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break;
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break;
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}
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}
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if (isReadOperation(_nextBusOperation) && _ready_line_is_enabled) {
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if (isReadOperation(nextBusOperation) && _ready_line_is_enabled) {
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_ready_is_active = true;
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_ready_is_active = true;
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}
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}
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}
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}
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@ -1049,6 +1052,9 @@ template <class T> class Processor {
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_scheduleProgramsReadPointer = scheduleProgramsReadPointer;
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_scheduleProgramsReadPointer = scheduleProgramsReadPointer;
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_scheduleProgramProgramCounter = scheduleProgramProgramCounter;
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_scheduleProgramProgramCounter = scheduleProgramProgramCounter;
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_nextAddress = nextAddress;
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_nextAddress = nextAddress;
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_nextBusOperation = nextBusOperation;
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_busAddress = busAddress;
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_busValue = busValue;
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}
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}
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}
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}
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