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Further eliminate naming.
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@ -151,7 +151,7 @@ struct PortAccessDelegate191: public CPU::Z80::AllRAMProcessor::PortAccessDelega
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}
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- (void)setValue:(uint16_t)value forRegister:(CSTestMachineZ80Register)reg {
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_processor->set_value_of_register(registerForRegister(reg), value);
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_processor->set_value_of(registerForRegister(reg), value);
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}
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- (void)setValue:(uint8_t)value atAddress:(uint16_t)address {
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@ -165,7 +165,7 @@ struct PortAccessDelegate191: public CPU::Z80::AllRAMProcessor::PortAccessDelega
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}
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- (uint16_t)valueForRegister:(CSTestMachineZ80Register)reg {
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return _processor->get_value_of_register(registerForRegister(reg));
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return _processor->value_of(registerForRegister(reg));
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}
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- (BOOL)isHalted {
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@ -82,11 +82,11 @@ class ConcreteAllRAMProcessor: public AllRAMProcessor, public BusHandler {
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}
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}
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uint16_t get_value_of_register(Register r) final {
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uint16_t value_of(Register r) final {
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return z80_.value_of(r);
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}
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void set_value_of_register(Register r, uint16_t value) final {
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void set_value_of(Register r, uint16_t value) final {
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z80_.set_value_of(r, value);
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}
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@ -36,8 +36,8 @@ class AllRAMProcessor:
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virtual void run_for(const Cycles cycles) = 0;
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virtual void run_for_instruction() = 0;
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virtual uint16_t get_value_of_register(Register r) = 0;
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virtual void set_value_of_register(Register r, uint16_t value) = 0;
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virtual uint16_t value_of(Register r) = 0;
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virtual void set_value_of(Register r, uint16_t value) = 0;
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virtual bool get_halt_line() = 0;
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virtual void reset_power_on() = 0;
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