From acdf32e8207fa792db11c5044d317d7d67e9c69c Mon Sep 17 00:00:00 2001
From: Thomas Harte <thomas.harte@gmail.com>
Date: Tue, 21 Nov 2023 11:25:53 -0500
Subject: [PATCH] Handle low/high switches.

---
 Machines/PCCompatible/PCCompatible.cpp | 21 ++++++++++++++++-----
 1 file changed, 16 insertions(+), 5 deletions(-)

diff --git a/Machines/PCCompatible/PCCompatible.cpp b/Machines/PCCompatible/PCCompatible.cpp
index 724d065e4..edd1796c0 100644
--- a/Machines/PCCompatible/PCCompatible.cpp
+++ b/Machines/PCCompatible/PCCompatible.cpp
@@ -152,6 +152,7 @@ class i8255PortHandler : public Intel::i8255::PortHandler {
 		void set_value(int port, uint8_t value) {
 			switch(port) {
 				case 1:
+					high_switches_ = value & 0x08;
 				break;
 			}
 			printf("PPI: %02x to %d\n", value, port);
@@ -159,21 +160,31 @@ class i8255PortHandler : public Intel::i8255::PortHandler {
 
 		uint8_t get_value(int port) {
 			switch(port) {
-				// TODO: returned value should depend on 'PBSW', a value written... somewhere?
 				case 2:
+					// Common:
+					//
 					// b7: 1 => memory parity error; 0 => none;
 					// b6: 1 => IO channel error; 0 => none;
 					// b5: timer 2 output;	[TODO]
 					// b4: cassette data input; [TODO]
-					// b3, b2: RAM on motherboard (64 * bit pattern)
-					// b1: 1 => FPU present; 0 => absent;
-					// b0: 1 => floppy drive present; 0 => absent.
-					return 0b0000'1100;
+					return
+						high_switches_ ?
+							// b3, b2: drive count; 00 = 1, 01 = 2, etc
+							// b1, b0: video mode (00 = ROM; 01 = CGA40; 10 = CGA80; 11 = MDA)
+							0b0000'0011
+						:
+							// b3, b2: RAM on motherboard (64 * bit pattern)
+							// b1: 1 => FPU present; 0 => absent;
+							// b0: 1 => floppy drive present; 0 => absent.
+							0b0000'1100;
 			}
 			printf("PPI: from %d\n", port);
 			return 0;
 		};
 
+	private:
+		bool high_switches_ = false;
+
 	// Provisionally, possibly:
 	//
 	//	port 0 = keyboard data output buffer;