From b5d958636270610ba573cd605bf112fe56a9f2fa Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Tue, 25 Apr 2023 23:16:21 -0400 Subject: [PATCH] Clean up some dangling timing changes. --- Components/9918/Implementation/9918.cpp | 20 +++++++++++--------- Components/9918/Implementation/9918Base.hpp | 4 ++-- 2 files changed, 13 insertions(+), 11 deletions(-) diff --git a/Components/9918/Implementation/9918.cpp b/Components/9918/Implementation/9918.cpp index 52a71a86c..b4df9cfcf 100644 --- a/Components/9918/Implementation/9918.cpp +++ b/Components/9918/Implementation/9918.cpp @@ -31,11 +31,15 @@ Base::Base() : // into whether there's a more natural form. It feels unlikely given the diversity of chips modelled. if constexpr (is_sega_vdp(personality)) { - // TODO: all these relate to the old line timing; resource and review. + // Cf. https://www.smspower.org/forums/8161-SMSDisplayTiming - mode_timing_.line_interrupt_position = 64; + // "For a line interrupt, /INT is pulled low 608 mclks into the appropriate scanline relative to pixel 0. + // This is 3 mclks before the rising edge of /HSYNC which starts the next scanline." + mode_timing_.line_interrupt_position = (LineLayout::EndOfLeftBorder + 304) % Timing::CyclesPerLine; - mode_timing_.end_of_frame_interrupt_position.column = 63; + // For a frame interrupt, /INT is pulled low 607 mclks into scanline 192 (of scanlines 0 through 261) relative to pixel 0. + // This is 4 mclks before the rising edge of /HSYNC which starts the next scanline. + mode_timing_.end_of_frame_interrupt_position.column = mode_timing_.line_interrupt_position - 1; mode_timing_.end_of_frame_interrupt_position.row = 193; } @@ -46,11 +50,7 @@ Base::Base() : // Establish that output is delayed after reading by `output_lag` cycles, // i.e. the fetch pointer is currently _ahead_ of the output pointer. - // - // TODO: Start at a random position. output_pointer_.row = output_pointer_.column = 0; -// output_pointer_.row = rand() % 262; -// output_pointer_.column = rand() % (Timing::CyclesPerLine - output_lag); fetch_pointer_ = output_pointer_; fetch_pointer_.column += output_lag; @@ -1180,7 +1180,7 @@ uint8_t TMS9918::read(int address) { template int Base::fetch_line() const { // This is the proper Master System value; TODO: what's correct for Yamaha, etc? - constexpr int row_change_position = 63; + constexpr int row_change_position = 31; return (this->fetch_pointer_.column < row_change_position) @@ -1320,7 +1320,7 @@ bool TMS9918::get_interrupt_line() const { (this->enable_line_interrupts_ && this->line_interrupt_pending_); } -// TODO: [potentially] remove Master System timing assumptions in latch and get_latched below. +// TODO: [potentially] remove Master System timing assumptions in latch and get_latched below, if any other VDP uses these calls. template uint8_t TMS9918::get_latched_horizontal_counter() const { // Translate from internal numbering, which puts pixel output // in the final 256 pixels of 342, to the public numbering, @@ -1329,6 +1329,8 @@ template uint8_t TMS9918::get_latched_hori int public_counter = this->latched_column_ - (342 - 256); if(public_counter < -46) public_counter += 342; return uint8_t(public_counter >> 1); + + // TODO: above is no longer correct. } template diff --git a/Components/9918/Implementation/9918Base.hpp b/Components/9918/Implementation/9918Base.hpp index 26e9e4fad..826d7714f 100644 --- a/Components/9918/Implementation/9918Base.hpp +++ b/Components/9918/Implementation/9918Base.hpp @@ -173,8 +173,8 @@ template struct Base: public Storage { // Set the position, in cycles, of the two interrupts, // within a line. struct { - int column = 4; - int row = 193; + int column = 313; + int row = 192; } end_of_frame_interrupt_position; int line_interrupt_position = -1;