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Blitter-finished bit aside, attempts to complete the Copper.
This commit is contained in:
Thomas Harte
parent
5425b5c423
commit
b6bf4d73ad
@ -58,47 +58,69 @@ bool Chipset::Copper::advance(uint16_t position) {
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default: return false;
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case State::Waiting:
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if(position >= instruction[1]) {
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// TODO: blitter-finished bit.
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if((position & position_mask_) >= instruction_[0]) {
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state_ = State::FetchFirstWord;
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}
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return false;
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case State::FetchFirstWord:
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instruction[0] = ram_[address & ram_mask_];
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++address;
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instruction_[0] = ram_[address_ & ram_mask_];
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++address_;
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state_ = State::FetchSecondWord;
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break;
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case State::FetchSecondWord:
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instruction[1] = ram_[address & ram_mask_];
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++address;
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case State::FetchSecondWord: {
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const bool should_skip_move = skip_next_;
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skip_next_ = false;
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if(!(instruction[0] & 1)) {
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// This is a move.
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// TODO: permissions.
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// At least for now, construct a 68000-esque Microcycle.
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CPU::MC68000::Microcycle cycle;
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cycle.operation = CPU::MC68000::Microcycle::SelectWord;
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uint32_t full_address = instruction[0];
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CPU::RegisterPair16 data = instruction[1];
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cycle.address = &full_address;
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cycle.value = &data;
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chipset_.perform(cycle);
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instruction_[1] = ram_[address_ & ram_mask_];
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++address_;
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if(!(instruction_[0] & 1)) {
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// A MOVE.
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if(!should_skip_move) {
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// Stop if this move would be a privilege violation.
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instruction_[0] &= 0x1fe;
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if((instruction_[0] < 0x10) || (instruction_[0] < 0x20 && !(control_&1))) {
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LOG("Invalid Copper MOVE to " << PADHEX(4) << instruction_[0] << "; stopping");
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state_ = State::Stopped;
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break;
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}
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// Construct a 68000-esque Microcycle in order to be able to perform the access.
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CPU::MC68000::Microcycle cycle;
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cycle.operation = CPU::MC68000::Microcycle::SelectWord;
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uint32_t full_address = instruction_[0];
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CPU::RegisterPair16 data = instruction_[1];
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cycle.address = &full_address;
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cycle.value = &data;
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chipset_.perform(cycle);
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}
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// Roll onto the next command.
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state_ = State::FetchFirstWord;
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break;
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}
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if(!(instruction[1] & 1)) {
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// A WAIT. Just note that this is now waiting.
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// Prepare for a position comparison.
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position_mask_ = 0x8001 | (instruction_[1] & 0x7ffe);
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instruction_[0] &= position_mask_;
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if(!(instruction_[1] & 1)) {
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// A WAIT. Just note that this is now waiting; the proper test
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// will be applied from the next potential `advance` onwards.
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state_ = State::Waiting;
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break;
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}
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// TODO: SKIPs.
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LOG("Unhandled Copper instruction " << PADHEX(4) << instruction[0] << " <- " << instruction[1]);
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state_ = State::Stopped;
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break;
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// Neither a WAIT nor a MOVE => a SKIP.
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// TODO: blitter-finished bit.
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skip_next_ = (position & position_mask_) >= instruction_[0];
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state_ = State::FetchFirstWord;
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} break;
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}
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return true;
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@ -118,7 +140,7 @@ template <int cycle, bool stop_if_cpu> bool Chipset::perform_cycle() {
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// 3. Blitter.
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// 4. CPU.
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if((dma_control_ & 0x280) == 0x280) {
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if(copper_.advance(uint16_t(((y_ & 0xff) << 8) | cycle))) {
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if(copper_.advance(uint16_t(((y_ & 0xff) << 8) | (cycle & 0xfe)))) {
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return false;
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}
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} else {
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@ -162,15 +184,22 @@ template <bool stop_on_cpu> Chipset::Changes Chipset::run(HalfCycles length) {
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break;
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}
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// TODO: advance to the next window boundary.
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// line_pixels -= (line_pixels & 3);
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// line_cycle_ += (4 - ((line_cycle_ & 3) + 1)) & 3;
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// Advance to window boundary.
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const int distance_to_boundary = ((line_cycle_ - 1) & 3) ^ 3;
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line_pixels -= distance_to_boundary;
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line_cycle_ += distance_to_boundary;
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#define C(x) \
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case x: \
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if constexpr(stop_on_cpu) { if(perform_cycle<x, stop_on_cpu>()) break; } else { perform_cycle<x, stop_on_cpu>(); } \
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line_cycle_ += 4; \
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if((line_cycle_ >> 2) == final_slot) break;
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if constexpr(stop_on_cpu) {\
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if(perform_cycle<x, stop_on_cpu>()) {\
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break;\
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}\
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} else {\
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perform_cycle<x, stop_on_cpu>(); \
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} \
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if((line_cycle_ >> 2) == final_slot) break; \
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line_cycle_ += 4;
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#define C10(x) C(x); C(x+1); C(x+2); C(x+3); C(x+4); C(x+5); C(x+6); C(x+7); C(x+8); C(x+9);
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switch(line_cycle_ >> 2) {
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@ -263,7 +292,7 @@ template <bool stop_on_cpu> Chipset::Changes Chipset::run(HalfCycles length) {
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// Output colour 0 to fill the rest of the line; Kickstart uses this
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// colour to post the error code. TODO: actual pixels, etc.
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if(line_cycle_ >= line_length_) {
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if(line_cycle_ == line_length_) {
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uint16_t *const pixels = reinterpret_cast<uint16_t *>(crt_.begin_data(1));
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if(pixels) {
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*pixels = palette_[0];
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@ -274,7 +303,7 @@ template <bool stop_on_cpu> Chipset::Changes Chipset::run(HalfCycles length) {
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// Advance intraline counter and possibly ripple upwards into
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// lines and fields.
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if(line_cycle_ >= line_length_) {
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if(line_cycle_ == line_length_) {
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++changes.hsyncs;
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line_cycle_ = 0;
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@ -336,7 +365,7 @@ void Chipset::perform(const CPU::MC68000::Microcycle &cycle) {
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} \
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}
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const uint32_t register_address = *cycle.address & 0xffe;
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const uint32_t register_address = *cycle.address & 0x1fe;
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switch(RW(register_address)) {
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default:
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LOG("Unimplemented chipset " << (cycle.operation & Microcycle::Read ? "read" : "write") << " " << PADHEX(6) << *cycle.address);
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@ -104,19 +104,23 @@ class Chipset {
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/// @returns @c true if the slot was used; @c false otherwise.
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bool advance(uint16_t position);
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/// Forces a reload of address @c id (i.e. 0 or 1) and restarts the Copper.
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void reload(int id) {
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address = addresses[id] >> 1;
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address_ = addresses_[id] >> 1;
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state_ = State::FetchFirstWord;
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}
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/// Writes the word @c value to the address register @c id, shifting it by @c shift (0 or 16) first.
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template <int id, int shift> void set_address(uint16_t value) {
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addresses[id] = (addresses[id] & (0xffff'0000 >> shift)) | uint32_t(value << shift);
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addresses_[id] = (addresses_[id] & (0xffff'0000 >> shift)) | uint32_t(value << shift);
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}
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/// Sets the Copper control word.
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void set_control(uint16_t c) {
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control_ = c;
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}
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/// Forces the Copper into the stopped state.
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void stop() {
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state_ = State::Stopped;
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}
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@ -124,15 +128,16 @@ class Chipset {
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private:
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Chipset &chipset_;
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uint32_t address = 0;
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uint32_t addresses[2]{};
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uint32_t address_ = 0;
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uint32_t addresses_[2]{};
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uint16_t control_ = 0;
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enum class State {
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FetchFirstWord, FetchSecondWord, Waiting, Stopped,
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} state_ = State::Stopped;
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bool skip_next_ = false;
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uint16_t instruction[2]{};
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uint16_t instruction_[2]{};
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uint16_t position_mask_ = 0xffff;
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uint16_t *ram_ = nullptr;
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uint32_t ram_mask_ = 0;
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