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Ensures the value initially loaded to A7 is aligned.

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This is a bit of a guess; it's likely to be true though per the rule that A7 is always kept aligned.
This commit is contained in:
Thomas Harte 2021-07-25 19:55:23 -04:00
parent fcd6b7b0ea
commit b7bed027d7
3 changed files with 19 additions and 1 deletions
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13
Processors/68000/Implementation/68000Implementation.hpp
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@ -191,6 +191,11 @@ template <class T, bool dtack_is_implicit, bool signal_will_perform> void Proces
case BusStep::Action::DecrementEffectiveAddress1: effective_address_[1].full -= 2; break; case BusStep::Action::DecrementEffectiveAddress1: effective_address_[1].full -= 2; break;
case BusStep::Action::IncrementProgramCounter: program_counter_.full += 2; break; case BusStep::Action::IncrementProgramCounter: program_counter_.full += 2; break;
case BusStep::Action::IncrementEffectiveAddress0AlignStackPointer:
effective_address_[0].full += 2;
address_[7].full &= 0xffff'fffe;
break;
case BusStep::Action::AdvancePrefetch: case BusStep::Action::AdvancePrefetch:
prefetch_queue_.halves.high = prefetch_queue_.halves.low; prefetch_queue_.halves.high = prefetch_queue_.halves.low;
@ -299,6 +304,14 @@ template <class T, bool dtack_is_implicit, bool signal_will_perform> void Proces
} }
#endif #endif
static uint32_t last_a7 = address_[7].full;
log |= (program_counter_.full - 4 == 0x00fcafba);
// if(log) {
if(log && last_a7 != address_[7].full) {
last_a7 = address_[7].full;
printf("%08x a7:%08x\n", program_counter_.full - 4, address_[7].full);
}
decoded_instruction_.full = prefetch_queue_.halves.high.full; decoded_instruction_.full = prefetch_queue_.halves.high.full;
#ifndef NDEBUG #ifndef NDEBUG

2
Processors/68000/Implementation/68000Storage.cpp
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@ -261,7 +261,7 @@ struct ProcessorStorageConstructor {
steps.push_back(step); steps.push_back(step);
step.microcycle.operation = Microcycle::SameAddress | Microcycle::Read | Microcycle::IsProgram | Microcycle::SelectWord; step.microcycle.operation = Microcycle::SameAddress | Microcycle::Read | Microcycle::IsProgram | Microcycle::SelectWord;
step.action = Action::IncrementEffectiveAddress0; step.action = isupper(access_pattern[1]) ? Action::IncrementEffectiveAddress0 : Action::IncrementEffectiveAddress0AlignStackPointer;
steps.push_back(step); steps.push_back(step);
continue; continue;

5
Processors/68000/Implementation/68000Storage.hpp
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@ -196,6 +196,9 @@ class ProcessorStorage {
/// Copies prefetch_queue_[1] to prefetch_queue_[0]. /// Copies prefetch_queue_[1] to prefetch_queue_[0].
AdvancePrefetch, AdvancePrefetch,
/// Performs effective_address_[0] += 2 and zeroes the final bit of the stack pointer.
IncrementEffectiveAddress0AlignStackPointer,
/*! /*!
Terminates an atomic program; if nothing else is pending, schedules the next instruction. Terminates an atomic program; if nothing else is pending, schedules the next instruction.
This action is special in that it usurps any included microcycle. So any Step with this This action is special in that it usurps any included microcycle. So any Step with this
@ -550,6 +553,8 @@ class ProcessorStorage {
inline uint16_t get_status() const; inline uint16_t get_status() const;
inline void set_status(uint16_t); inline void set_status(uint16_t);
bool log = false;
private: private:
friend struct ProcessorStorageConstructor; friend struct ProcessorStorageConstructor;
friend class ProcessorStorageTests; friend class ProcessorStorageTests;