diff --git a/Analyser/Static/Commodore/StaticAnalyser.cpp b/Analyser/Static/Commodore/StaticAnalyser.cpp
index 90bd0b624..baa28bd9d 100644
--- a/Analyser/Static/Commodore/StaticAnalyser.cpp
+++ b/Analyser/Static/Commodore/StaticAnalyser.cpp
@@ -188,8 +188,8 @@ Analyser::Static::TargetList Analyser::Static::Commodore::GetTargets(const Media
// Unhandled:
//
- // M6: this is a C64 file.
- // MV: this is a Vic-20 file.
+ // M6: this is a C64 file.
+ // MV: this is a Vic-20 file.
// J1/J2: this C64 file should have the primary joystick in slot 1/2.
// RO: this disk image should be treated as read-only.
}
diff --git a/Analyser/Static/StaticAnalyser.cpp b/Analyser/Static/StaticAnalyser.cpp
index 3b24fc6e3..b45c936a7 100644
--- a/Analyser/Static/StaticAnalyser.cpp
+++ b/Analyser/Static/StaticAnalyser.cpp
@@ -244,7 +244,7 @@ TargetList Analyser::Static::GetTargets(const std::string &file_name) {
const std::string extension = get_extension(file_name);
// Check whether the file directly identifies a target; if so then just return that.
-#define Format(ext, class) \
+#define Format(ext, class) \
if(extension == ext) { \
try { \
auto target = Storage::State::class::load(file_name); \
diff --git a/ClockReceiver/JustInTime.hpp b/ClockReceiver/JustInTime.hpp
index 939ff0684..c351ce767 100644
--- a/ClockReceiver/JustInTime.hpp
+++ b/ClockReceiver/JustInTime.hpp
@@ -294,7 +294,7 @@ template <class T, class LocalTimeScale = HalfCycles, class TargetTimeScale = Lo
/// Constructs a new AsyncJustInTimeActor using the same construction arguments as the included object.
template<typename... Args> AsyncJustInTimeActor(TargetTimeScale threshold, Args&&... args) :
object_(std::forward<Args>(args)...),
- threshold_(threshold) {}
+ threshold_(threshold) {}
/// Adds time to the actor.
inline void operator += (const LocalTimeScale &rhs) {
diff --git a/Components/1770/1770.cpp b/Components/1770/1770.cpp
index 28c9d5e72..401ca4cc3 100644
--- a/Components/1770/1770.cpp
+++ b/Components/1770/1770.cpp
@@ -66,7 +66,7 @@ uint8_t WD1770::read(int address) {
// Per Jean Louis-Guérin's documentation:
//
- // * the write-protect bit is locked into place by a type 2 or type 3 command, but is
+ // * the write-protect bit is locked into place by a type 2 or type 3 command, but is
// read live after a type 1.
// * the track 0 bit is captured during a type 1 instruction and lost upon any other type,
// it is not live sampled.
diff --git a/Components/6522/Implementation/6522Implementation.hpp b/Components/6522/Implementation/6522Implementation.hpp
index 52edea000..29c4aed12 100644
--- a/Components/6522/Implementation/6522Implementation.hpp
+++ b/Components/6522/Implementation/6522Implementation.hpp
@@ -271,7 +271,7 @@ template <typename T> void MOS6522<T>::set_control_line_input(Port port, Line li
// TODO: and at least one full clock since the shift register was written?
if(port == Port::B) {
switch(shift_mode()) {
- default: break;
+ default: break;
case ShiftMode::InUnderCB1: if(value) shift_in(); break; // Shifts in are captured on a low-to-high transition.
case ShiftMode::OutUnderCB1: if(!value) shift_out(); break; // Shifts out are updated on a high-to-low transition.
}
@@ -329,7 +329,7 @@ template <typename T> void MOS6522<T>::do_phase2() {
// If the shift register is shifting according to the input clock, do a shift.
switch(shift_mode()) {
- default: break;
+ default: break;
case ShiftMode::InUnderPhase2: shift_in(); break;
case ShiftMode::OutUnderPhase2: shift_out(); break;
}
@@ -345,9 +345,9 @@ template <typename T> void MOS6522<T>::do_phase1() {
// If the shift register is shifting according to this timer, do a shift.
// TODO: "shift register is driven by only the low order 8 bits of timer 2"?
switch(shift_mode()) {
- default: break;
+ default: break;
case ShiftMode::InUnderT2: shift_in(); break;
- case ShiftMode::OutUnderT2FreeRunning: shift_out(); break;
+ case ShiftMode::OutUnderT2FreeRunning: shift_out(); break;
case ShiftMode::OutUnderT2: shift_out(); break; // TODO: present a clock on CB1.
}
diff --git a/Components/6560/6560.hpp b/Components/6560/6560.hpp
index 91fc82a74..c6015fe7d 100644
--- a/Components/6560/6560.hpp
+++ b/Components/6560/6560.hpp
@@ -83,11 +83,11 @@ template <class BusHandler> class MOS6560 {
speaker_.set_input_rate(float(clock_rate / 4.0));
}
- void set_scan_target(Outputs::Display::ScanTarget *scan_target) { crt_.set_scan_target(scan_target); }
+ void set_scan_target(Outputs::Display::ScanTarget *scan_target) { crt_.set_scan_target(scan_target); }
Outputs::Display::ScanStatus get_scaled_scan_status() const { return crt_.get_scaled_scan_status() / 4.0f; }
- void set_display_type(Outputs::Display::DisplayType display_type) { crt_.set_display_type(display_type); }
- Outputs::Display::DisplayType get_display_type() const { return crt_.get_display_type(); }
- Outputs::Speaker::Speaker *get_speaker() { return &speaker_; }
+ void set_display_type(Outputs::Display::DisplayType display_type) { crt_.set_display_type(display_type); }
+ Outputs::Display::DisplayType get_display_type() const { return crt_.get_display_type(); }
+ Outputs::Speaker::Speaker *get_speaker() { return &speaker_; }
void set_high_frequency_cutoff(float cutoff) {
speaker_.set_high_frequency_cutoff(cutoff);
diff --git a/Components/9918/9918.hpp b/Components/9918/9918.hpp
index d49a33fad..0789533a3 100644
--- a/Components/9918/9918.hpp
+++ b/Components/9918/9918.hpp
@@ -18,6 +18,8 @@ namespace TI::TMS {
enum Personality {
TMS9918A, // includes the 9928 and 9929; set TV standard and output device as desired.
+
+ // Yamaha extensions.
V9938,
V9958,
diff --git a/Components/9918/Implementation/9918.cpp b/Components/9918/Implementation/9918.cpp
index bb59af32b..98089e847 100644
--- a/Components/9918/Implementation/9918.cpp
+++ b/Components/9918/Implementation/9918.cpp
@@ -35,7 +35,7 @@ Base<personality>::Base() :
// "For a line interrupt, /INT is pulled low 608 mclks into the appropriate scanline relative to pixel 0.
// This is 3 mclks before the rising edge of /HSYNC which starts the next scanline."
- mode_timing_.line_interrupt_position = (LineLayout<personality>::EndOfLeftBorder + 304) % Timing<personality>::CyclesPerLine;
+ mode_timing_.line_interrupt_position = (LineLayout<personality>::EndOfLeftBorder + 304) % LineLayout<personality>::CyclesPerLine;
// For a frame interrupt, /INT is pulled low 607 mclks into scanline 192 (of scanlines 0 through 261) relative to pixel 0.
// This is 4 mclks before the rising edge of /HSYNC which starts the next scanline.
@@ -197,7 +197,7 @@ void TMS9918<personality>::run_for(const HalfCycles cycles) {
if(fetch_cycles_pool) {
// Determine how much writing to do; at the absolute most go to the end of this line.
const int fetch_cycles = std::min(
- Timing<personality>::CyclesPerLine - this->fetch_pointer_.column,
+ LineLayout<personality>::CyclesPerLine - this->fetch_pointer_.column,
fetch_cycles_pool
);
const int end_column = this->fetch_pointer_.column + fetch_cycles;
@@ -319,7 +319,7 @@ void TMS9918<personality>::run_for(const HalfCycles cycles) {
fetch_cycles_pool -= fetch_cycles;
// Check for end of line.
- if(this->fetch_pointer_.column == Timing<personality>::CyclesPerLine) {
+ if(this->fetch_pointer_.column == LineLayout<personality>::CyclesPerLine) {
this->fetch_pointer_.column = 0;
this->fetch_pointer_.row = (this->fetch_pointer_.row + 1) % this->mode_timing_.total_lines;
@@ -341,13 +341,13 @@ void TMS9918<personality>::run_for(const HalfCycles cycles) {
this->minimum_access_column_ =
std::max(
0,
- this->minimum_access_column_ - Timing<personality>::CyclesPerLine
+ this->minimum_access_column_ - LineLayout<personality>::CyclesPerLine
);
if constexpr (is_yamaha_vdp(personality)) {
Storage<personality>::minimum_command_column_ =
std::max(
0,
- Storage<personality>::minimum_command_column_ - Timing<personality>::CyclesPerLine
+ Storage<personality>::minimum_command_column_ - LineLayout<personality>::CyclesPerLine
);
}
@@ -457,7 +457,7 @@ void TMS9918<personality>::run_for(const HalfCycles cycles) {
if(output_cycles_pool) {
// Determine how much time has passed in the remainder of this line, and proceed.
const int target_output_cycles = std::min(
- Timing<personality>::CyclesPerLine - this->output_pointer_.column,
+ LineLayout<personality>::CyclesPerLine - this->output_pointer_.column,
output_cycles_pool
);
int output_cycles_performed = 0;
@@ -522,8 +522,8 @@ void TMS9918<personality>::run_for(const HalfCycles cycles) {
};
const auto right_blank = [&]() {
- if(end_column == Timing<personality>::CyclesPerLine) {
- output_blank(Timing<personality>::CyclesPerLine - LineLayout<personality>::EndOfRightBorder);
+ if(end_column == LineLayout<personality>::CyclesPerLine) {
+ output_blank(LineLayout<personality>::CyclesPerLine - LineLayout<personality>::EndOfRightBorder);
}
};
@@ -534,8 +534,8 @@ void TMS9918<personality>::run_for(const HalfCycles cycles) {
) {
// Vertical sync.
// TODO: the Yamaha and Mega Drive both support interlaced video.
- if(end_column == Timing<personality>::CyclesPerLine) {
- output_sync(Timing<personality>::CyclesPerLine);
+ if(end_column == LineLayout<personality>::CyclesPerLine) {
+ output_sync(LineLayout<personality>::CyclesPerLine);
}
} else {
left_blank();
@@ -610,14 +610,14 @@ void TMS9918<personality>::run_for(const HalfCycles cycles) {
// Advance time.
// -------------
this->output_pointer_.column = end_column;
- if(end_column == Timing<personality>::CyclesPerLine) {
+ if(end_column == LineLayout<personality>::CyclesPerLine) {
// Advance line buffer.
this->advance(this->draw_line_buffer_);
}
}
output_cycles_pool -= target_output_cycles;
- if(this->output_pointer_.column == Timing<personality>::CyclesPerLine) {
+ if(this->output_pointer_.column == LineLayout<personality>::CyclesPerLine) {
this->output_pointer_.column = 0;
this->output_pointer_.row = (this->output_pointer_.row + 1) % this->mode_timing_.total_lines;
}
@@ -685,7 +685,7 @@ void Base<personality>::write_vram(uint8_t value) {
// Enqueue the write to occur at the next available slot.
read_ahead_buffer_ = value;
queued_access_ = MemoryAccess::Write;
- minimum_access_column_ = fetch_pointer_.column + Timing<personality>::VRAMAccessDelay;
+ minimum_access_column_ = fetch_pointer_.column + LineLayout<personality>::VRAMAccessDelay;
}
template <Personality personality>
@@ -957,7 +957,7 @@ void Base<personality>::commit_register(int reg, uint8_t value) {
switch(value >> 4) {
// All codes not listed below are invalid; treat them as STOP.
default:
- case 0b0000: Storage<personality>::command_ = nullptr; break; // STOP.
+ case 0b0000: Storage<personality>::command_ = nullptr; break; // STOP.
case 0b0100: Begin(Point<true>); break; // POINT [read a pixel colour].
case 0b0101: Begin(Point<false>); break; // PSET [plot a pixel].
@@ -1034,7 +1034,7 @@ void Base<personality>::write_register(uint8_t value) {
// A read request is enqueued upon setting the address; conversely a write
// won't be enqueued unless and until some actual data is supplied.
queued_access_ = MemoryAccess::Read;
- minimum_access_column_ = fetch_pointer_.column + Timing<personality>::VRAMAccessDelay;
+ minimum_access_column_ = fetch_pointer_.column + LineLayout<personality>::VRAMAccessDelay;
}
if constexpr (is_sega_vdp(personality)) {
@@ -1242,11 +1242,11 @@ HalfCycles TMS9918<personality>::get_next_sequence_point() const {
if(get_interrupt_line()) return HalfCycles::max();
// Calculate the amount of time until the next end-of-frame interrupt.
- const int frame_length = Timing<personality>::CyclesPerLine * this->mode_timing_.total_lines;
+ const int frame_length = LineLayout<personality>::CyclesPerLine * this->mode_timing_.total_lines;
int time_until_frame_interrupt =
(
- ((this->mode_timing_.end_of_frame_interrupt_position.row * Timing<personality>::CyclesPerLine) + this->mode_timing_.end_of_frame_interrupt_position.column + frame_length) -
- ((this->fetch_pointer_.row * Timing<personality>::CyclesPerLine) + this->fetch_pointer_.column)
+ ((this->mode_timing_.end_of_frame_interrupt_position.row * LineLayout<personality>::CyclesPerLine) + this->mode_timing_.end_of_frame_interrupt_position.column + frame_length) -
+ ((this->fetch_pointer_.row * LineLayout<personality>::CyclesPerLine) + this->fetch_pointer_.column)
) % frame_length;
if(!time_until_frame_interrupt) time_until_frame_interrupt = frame_length;
@@ -1260,7 +1260,7 @@ HalfCycles TMS9918<personality>::get_next_sequence_point() const {
int cycles_to_next_interrupt_threshold = this->mode_timing_.line_interrupt_position - this->fetch_pointer_.column;
int line_of_next_interrupt_threshold = this->fetch_pointer_.row;
if(cycles_to_next_interrupt_threshold <= 0) {
- cycles_to_next_interrupt_threshold += Timing<personality>::CyclesPerLine;
+ cycles_to_next_interrupt_threshold += LineLayout<personality>::CyclesPerLine;
++line_of_next_interrupt_threshold;
}
@@ -1291,7 +1291,7 @@ HalfCycles TMS9918<personality>::get_next_sequence_point() const {
// Figure out the number of internal cycles until the next line interrupt, which is the amount
// of time to the next tick over and then next_line_interrupt_row - row_ lines further.
const int lines_until_interrupt = (next_line_interrupt_row - line_of_next_interrupt_threshold + this->mode_timing_.total_lines) % this->mode_timing_.total_lines;
- const int local_cycles_until_line_interrupt = cycles_to_next_interrupt_threshold + lines_until_interrupt * Timing<personality>::CyclesPerLine;
+ const int local_cycles_until_line_interrupt = cycles_to_next_interrupt_threshold + lines_until_interrupt * LineLayout<personality>::CyclesPerLine;
if(!this->generate_interrupts_) return this->clock_converter_.half_cycles_before_internal_cycles(local_cycles_until_line_interrupt);
// Return whichever interrupt is closer.
@@ -1305,7 +1305,7 @@ HalfCycles TMS9918<personality>::get_time_until_line(int line) {
int cycles_to_next_interrupt_threshold = this->mode_timing_.line_interrupt_position - this->fetch_pointer_.column;
int line_of_next_interrupt_threshold = this->fetch_pointer_.row;
if(cycles_to_next_interrupt_threshold <= 0) {
- cycles_to_next_interrupt_threshold += Timing<personality>::CyclesPerLine;
+ cycles_to_next_interrupt_threshold += LineLayout<personality>::CyclesPerLine;
++line_of_next_interrupt_threshold;
}
@@ -1313,7 +1313,7 @@ HalfCycles TMS9918<personality>::get_time_until_line(int line) {
line += this->mode_timing_.total_lines;
}
- return this->clock_converter_.half_cycles_before_internal_cycles(cycles_to_next_interrupt_threshold + (line - line_of_next_interrupt_threshold)*Timing<personality>::CyclesPerLine);
+ return this->clock_converter_.half_cycles_before_internal_cycles(cycles_to_next_interrupt_threshold + (line - line_of_next_interrupt_threshold)*LineLayout<personality>::CyclesPerLine);
}
template <Personality personality>
@@ -1329,7 +1329,7 @@ template <Personality personality>uint8_t TMS9918<personality>::get_latched_hori
// which counts the 256 pixels as items 0–255, starts
// counting at -48, and returns only the top 8 bits of the number.
int public_counter = this->latched_column_ - LineLayout<personality>::EndOfLeftBorder;
- if(public_counter < -46) public_counter += Timing<personality>::CyclesPerLine;
+ if(public_counter < -46) public_counter += LineLayout<personality>::CyclesPerLine;
return uint8_t(public_counter >> 1);
}
diff --git a/Components/9918/Implementation/9918Base.hpp b/Components/9918/Implementation/9918Base.hpp
index 5e63ae707..4b4085f45 100644
--- a/Components/9918/Implementation/9918Base.hpp
+++ b/Components/9918/Implementation/9918Base.hpp
@@ -585,7 +585,7 @@ template <Personality personality> struct Base: public Storage<personality> {
/// Helper for TMS dispatches; contains a switch statement with cases 0 to 170, each of the form:
///
- /// if constexpr (use_end && end == n) return; [[fallthrough]]; case n: fetcher.fetch<n>();
+ /// if constexpr (use_end && end == n) return; [[fallthrough]]; case n: fetcher.fetch<n>();
///
/// i.e. it provides standard glue to enter a fetch sequence at any point, while the fetches themselves are templated on the cycle
/// at which they appear for neater expression.
@@ -620,9 +620,9 @@ template <Personality personality> struct Base: public Storage<personality> {
template <SpriteMode mode, bool double_width> void draw_sprites(uint8_t y, int start, int end, const std::array<uint32_t, 16> &palette, int *colour_buffer = nullptr);
};
+}
+
#include "Fetch.hpp"
#include "Draw.hpp"
-}
-
#endif /* TMS9918Base_hpp */
diff --git a/Components/9918/Implementation/AccessEnums.hpp b/Components/9918/Implementation/AccessEnums.hpp
index aa2328cc2..531264ebf 100644
--- a/Components/9918/Implementation/AccessEnums.hpp
+++ b/Components/9918/Implementation/AccessEnums.hpp
@@ -78,7 +78,6 @@ constexpr bool interleaves_banks(ScreenMode mode) {
return mode == ScreenMode::YamahaGraphics6 || mode == ScreenMode::YamahaGraphics7;
}
-
enum class FetchMode {
Text,
Character,
diff --git a/Components/9918/Implementation/ClockConverter.hpp b/Components/9918/Implementation/ClockConverter.hpp
index 9e115d935..344b6fbef 100644
--- a/Components/9918/Implementation/ClockConverter.hpp
+++ b/Components/9918/Implementation/ClockConverter.hpp
@@ -51,20 +51,6 @@ template <Personality personality, Clock clock> constexpr int from_internal(int
return length * clock_rate<personality, clock>() / clock_rate<personality, Clock::Internal>();
}
-/// Provides default timing measurements that duplicate the layout of a TMS9928's line,
-/// scaled to the clock rate specified.
-template <Personality personality> struct StandardTiming {
- /// The total number of internal cycles per line of output.
- constexpr static int CyclesPerLine = clock_rate<personality, Clock::Internal>();
-
- /// The number of internal cycles that must elapse between a request to read or write and
- /// it becoming a candidate for action.
- constexpr static int VRAMAccessDelay = 6;
-};
-
-/// Provides concrete, specific timing for the nominated personality.
-template <Personality personality> struct Timing: public StandardTiming<personality> {};
-
/*!
Provides a [potentially-]stateful conversion between the external and internal clocks.
Unlike the other clock conversions, this one may be non-integral, requiring that
@@ -175,8 +161,14 @@ template <Personality personality> struct LineLayout<personality, std::enable_if
constexpr static int EndOfPixels = 319;
constexpr static int EndOfRightBorder = 334;
+ constexpr static int CyclesPerLine = 342;
+
constexpr static int TextModeEndOfLeftBorder = 69;
constexpr static int TextModeEndOfPixels = 309;
+
+ /// The number of internal cycles that must elapse between a request to read or write and
+ /// it becoming a candidate for action.
+ constexpr static int VRAMAccessDelay = 6;
};
template <Personality personality> struct LineLayout<personality, std::enable_if_t<is_yamaha_vdp(personality)>> {
@@ -188,8 +180,14 @@ template <Personality personality> struct LineLayout<personality, std::enable_if
constexpr static int EndOfPixels = 1282;
constexpr static int EndOfRightBorder = 1341;
+ constexpr static int CyclesPerLine = 1368;
+
constexpr static int TextModeEndOfLeftBorder = 294;
constexpr static int TextModeEndOfPixels = 1254;
+
+ /// The number of internal cycles that must elapse between a request to read or write and
+ /// it becoming a candidate for action.
+ constexpr static int VRAMAccessDelay = 16;
};
}
diff --git a/Components/9918/Implementation/Draw.hpp b/Components/9918/Implementation/Draw.hpp
index 1c7e23f8a..ee5dcb9cc 100644
--- a/Components/9918/Implementation/Draw.hpp
+++ b/Components/9918/Implementation/Draw.hpp
@@ -9,6 +9,8 @@
#ifndef Draw_hpp
#define Draw_hpp
+namespace TI::TMS {
+
// MARK: - Sprites, as generalised.
template <Personality personality>
@@ -565,4 +567,6 @@ void Base<personality>::draw_yamaha(uint8_t y, int start, int end) {
// TODO.
+}
+
#endif /* Draw_hpp */
diff --git a/Components/9918/Implementation/Fetch.hpp b/Components/9918/Implementation/Fetch.hpp
index 6d0bda432..7f7ea7fff 100644
--- a/Components/9918/Implementation/Fetch.hpp
+++ b/Components/9918/Implementation/Fetch.hpp
@@ -9,6 +9,8 @@
#ifndef Fetch_hpp
#define Fetch_hpp
+namespace TI::TMS {
+
/*
Fetching routines follow below; they obey the following rules:
@@ -802,4 +804,6 @@ template<bool use_end> void Base<personality>::fetch_yamaha(uint8_t y, int, int
// TODO.
+}
+
#endif /* Fetch_hpp */
diff --git a/Components/9918/Implementation/Storage.hpp b/Components/9918/Implementation/Storage.hpp
index 69dbce1e1..4dce4261d 100644
--- a/Components/9918/Implementation/Storage.hpp
+++ b/Components/9918/Implementation/Storage.hpp
@@ -28,197 +28,49 @@ template <> struct Storage<Personality::TMS9918A> {
void begin_line(ScreenMode, bool) {}
};
-// Yamaha-specific storage.
-template <Personality personality> struct Storage<personality, std::enable_if_t<is_yamaha_vdp(personality)>> {
- using AddressT = uint32_t;
+struct YamahaFetcher {
+ public:
+ /// Describes an _observable_ memory access event. i.e. anything that it is safe
+ /// (and convenient) to treat as atomic in between external slots.
+ struct Event {
+ /// Offset of the _beginning_ of the event. Not completely arbitrarily: this is when
+ /// external data must be ready by in order to take part in those slots.
+ uint16_t offset = 1368;
+ enum class Type: uint8_t {
+ /// A slot for reading or writing data on behalf of the CPU or the command engine.
+ External,
- std::array<uint8_t, 65536> expansion_ram_;
+ //
+ // Sprites.
+ //
+ SpriteY,
+ SpriteLocation,
+ SpritePattern,
- int selected_status_ = 0;
+ //
+ // Backgrounds.
+ //
+ Name,
+ Colour,
+ Pattern,
+ } type = Type::External;
+ uint8_t id = 0;
- int indirect_register_ = 0;
- bool increment_indirect_register_ = false;
+ constexpr Event(Type type, uint8_t id = 0) noexcept :
+ type(type),
+ id(id) {}
- int adjustment_[2]{};
+ constexpr Event() noexcept {}
+ };
- std::array<uint32_t, 16> palette_{};
- std::array<uint32_t, 16> background_palette_{};
- bool solid_background_ = true;
+ // State that tracks fetching position within a line.
+ const Event *next_event_ = nullptr;
- uint8_t new_colour_ = 0;
- uint8_t palette_entry_ = 0;
- bool palette_write_phase_ = false;
+ // Sprite collection state.
+ bool sprites_enabled_ = true;
- uint8_t mode_ = 0;
-
- uint8_t vertical_offset_ = 0;
- uint8_t sprite_cache_[8][32]{};
-
- /// Describes an _observable_ memory access event. i.e. anything that it is safe
- /// (and convenient) to treat as atomic in between external slots.
- struct Event {
- /// Offset of the _beginning_ of the event. Not completely arbitrarily: this is when
- /// external data must be ready by in order to take part in those slots.
- uint16_t offset = 1368;
- enum class Type: uint8_t {
- /// A slot for reading or writing data on behalf of the CPU or the command engine.
- External,
-
- //
- // Sprites.
- //
- SpriteY,
- SpriteLocation,
- SpritePattern,
-
- //
- // Backgrounds.
- //
- Name,
- Colour,
- Pattern,
- } type = Type::External;
- uint8_t id = 0;
-
- constexpr Event(Type type, uint8_t id = 0) noexcept :
- type(type),
- id(id) {}
-
- constexpr Event() noexcept {}
- };
-
- // State that tracks fetching position within a line.
- const Event *next_event_ = nullptr;
-
- // Text blink colours.
- uint8_t blink_text_colour_ = 0;
- uint8_t blink_background_colour_ = 0;
-
- // Blink state (which is also affects even/odd page display in applicable modes).
- int in_blink_ = 1;
- uint8_t blink_periods_ = 0;
- uint8_t blink_counter_ = 0;
-
- // Sprite collection state.
- bool sprites_enabled_ = true;
-
- // Additional status.
- uint8_t colour_status_ = 0;
- uint16_t colour_location_ = 0;
- uint16_t collision_location_[2]{};
-
- /// Resets line-ephemeral state for a new line.
- void begin_line(ScreenMode mode, bool is_refresh) {
- if(is_refresh) {
- next_event_ = refresh_events.data();
- return;
- }
-
- switch(mode) {
- case ScreenMode::YamahaText80:
- case ScreenMode::Text:
- next_event_ = text_events.data();
- break;
-
- case ScreenMode::MultiColour:
- case ScreenMode::YamahaGraphics1:
- case ScreenMode::YamahaGraphics2:
- next_event_ = character_events.data();
- break;
-
- case ScreenMode::YamahaGraphics3: // TODO: verify; my guess is that G3 is timed like a bitmap mode
- // in order to fit the pattern for sprite mode 2. Just a guess.
- default:
- next_event_ = sprites_enabled_ ? sprites_events.data() : no_sprites_events.data();
- break;
- }
- }
-
- // Command engine state.
- CommandContext command_context_;
- ModeDescription mode_description_;
- std::unique_ptr<Command> command_ = nullptr;
-
- enum class CommandStep {
- None,
-
- CopySourcePixelToStatus,
-
- ReadSourcePixel,
- ReadDestinationPixel,
- WritePixel,
-
- ReadSourceByte,
- WriteByte,
- };
- CommandStep next_command_step_ = CommandStep::None;
- int minimum_command_column_ = 0;
- uint8_t command_latch_ = 0;
-
- void update_command_step(int current_column) {
- if(!command_) {
- next_command_step_ = CommandStep::None;
- return;
- }
- if(command_->done()) {
- command_ = nullptr;
- next_command_step_ = CommandStep::None;
- return;
- }
-
- minimum_command_column_ = current_column + command_->cycles;
- switch(command_->access) {
- case Command::AccessType::ReadPoint:
- next_command_step_ = CommandStep::CopySourcePixelToStatus;
- break;
-
- case Command::AccessType::CopyPoint:
- next_command_step_ = CommandStep::ReadSourcePixel;
- break;
- case Command::AccessType::PlotPoint:
- next_command_step_ = CommandStep::ReadDestinationPixel;
- break;
-
- case Command::AccessType::WaitForColourReceipt:
- // i.e. nothing to do until a colour is received.
- next_command_step_ = CommandStep::None;
- break;
-
- case Command::AccessType::CopyByte:
- next_command_step_ = CommandStep::ReadSourceByte;
- break;
- case Command::AccessType::WriteByte:
- next_command_step_ = CommandStep::WriteByte;
- break;
- }
- }
-
- Storage() noexcept {
- // Perform sanity checks on the event lists.
-#ifndef NDEBUG
- const Event *lists[] = { no_sprites_events.data(), sprites_events.data(), text_events.data(), character_events.data(), refresh_events.data(), nullptr };
- const Event **list = lists;
- while(*list) {
- const Event *cursor = *list;
- ++list;
-
- while(cursor[1].offset != 1368) {
- assert(cursor[1].offset > cursor[0].offset);
- ++cursor;
- }
- }
-#endif
-
- // Seed to _something_ meaningful.
- //
- // TODO: this is a workaround [/hack], in effect, for the main TMS' habit of starting
- // in a randomised position, which means that start-of-line isn't announced.
- //
- // Do I really want that behaviour?
- next_event_ = refresh_events.data();
- }
-
- private:
+ protected:
+ /// @return 1 + the number of times within a line that @c GeneratorT produces an event.
template <typename GeneratorT> static constexpr size_t events_size() {
size_t size = 0;
for(int c = 0; c < 1368; c++) {
@@ -228,6 +80,7 @@ template <Personality personality> struct Storage<personality, std::enable_if_t<
return size + 1;
}
+ /// @return An array of all events generated by @c GeneratorT in line order.
template <typename GeneratorT, size_t size = events_size<GeneratorT>()>
static constexpr std::array<Event, size> events() {
std::array<Event, size> result{};
@@ -287,7 +140,6 @@ template <Personality personality> struct Storage<personality, std::enable_if_t<
return std::nullopt;
}
};
- static constexpr auto refresh_events = events<RefreshGenerator>();
template <bool include_sprites> struct BitmapGenerator {
static constexpr std::optional<Event> event(int grauw_index) {
@@ -315,7 +167,7 @@ template <Personality personality> struct Storage<personality, std::enable_if_t<
case 1338: return Event(Event::Type::SpritePattern, 2);
case 34: return Event(Event::Type::SpritePattern, 4);
case 98: return Event(Event::Type::SpritePattern, 6);
- case 1264: case 1330: case 28: case 92:
+ case 1264: case 1330: case 28: case 92:
return Event::Type::External;
}
}
@@ -366,8 +218,6 @@ template <Personality personality> struct Storage<personality, std::enable_if_t<
return std::nullopt;
}
};
- static constexpr auto no_sprites_events = events<BitmapGenerator<false>>();
- static constexpr auto sprites_events = events<BitmapGenerator<true>>();
struct TextGenerator {
static constexpr std::optional<Event> event(int grauw_index) {
@@ -404,7 +254,6 @@ template <Personality personality> struct Storage<personality, std::enable_if_t<
return std::nullopt;
}
};
- static constexpr auto text_events = events<TextGenerator>();
struct CharacterGenerator {
static constexpr std::optional<Event> event(int grauw_index) {
@@ -432,8 +281,8 @@ template <Personality personality> struct Storage<personality, std::enable_if_t<
const int sub_block = offset & 31;
switch(sub_block) {
case 0: if(block > 0) return Event(Event::Type::Name, uint8_t(block - 1));
- case 6: if((sub_block & 3) != 3) return Event::Type::External;
- case 12: if(block < 32) return Event(Event::Type::SpriteY, uint8_t(block));
+ case 6: if((sub_block & 3) != 3) return Event::Type::External;
+ case 12: if(block < 32) return Event(Event::Type::SpriteY, uint8_t(block));
case 18: if(block > 0) return Event(Event::Type::Pattern, uint8_t(block - 1));
case 24: if(block > 0) return Event(Event::Type::Colour, uint8_t(block - 1));
}
@@ -442,6 +291,155 @@ template <Personality personality> struct Storage<personality, std::enable_if_t<
return std::nullopt;
}
};
+};
+
+struct YamahaCommandState {
+ CommandContext command_context_;
+ ModeDescription mode_description_;
+ std::unique_ptr<Command> command_ = nullptr;
+
+ enum class CommandStep {
+ None,
+
+ CopySourcePixelToStatus,
+
+ ReadSourcePixel,
+ ReadDestinationPixel,
+ WritePixel,
+
+ ReadSourceByte,
+ WriteByte,
+ };
+ CommandStep next_command_step_ = CommandStep::None;
+ int minimum_command_column_ = 0;
+ uint8_t command_latch_ = 0;
+
+ void update_command_step(int current_column) {
+ if(!command_) {
+ next_command_step_ = CommandStep::None;
+ return;
+ }
+ if(command_->done()) {
+ command_ = nullptr;
+ next_command_step_ = CommandStep::None;
+ return;
+ }
+
+ minimum_command_column_ = current_column + command_->cycles;
+ switch(command_->access) {
+ case Command::AccessType::ReadPoint:
+ next_command_step_ = CommandStep::CopySourcePixelToStatus;
+ break;
+
+ case Command::AccessType::CopyPoint:
+ next_command_step_ = CommandStep::ReadSourcePixel;
+ break;
+ case Command::AccessType::PlotPoint:
+ next_command_step_ = CommandStep::ReadDestinationPixel;
+ break;
+
+ case Command::AccessType::WaitForColourReceipt:
+ // i.e. nothing to do until a colour is received.
+ next_command_step_ = CommandStep::None;
+ break;
+
+ case Command::AccessType::CopyByte:
+ next_command_step_ = CommandStep::ReadSourceByte;
+ break;
+ case Command::AccessType::WriteByte:
+ next_command_step_ = CommandStep::WriteByte;
+ break;
+ }
+ }
+};
+
+// Yamaha-specific storage.
+template <Personality personality> struct Storage<personality, std::enable_if_t<is_yamaha_vdp(personality)>>: public YamahaFetcher, public YamahaCommandState {
+ using AddressT = uint32_t;
+
+ // The Yamaha's (optional in real hardware) additional 64kb of expansion RAM.
+ // This is a valid target and source for the command engine, but can't be used as a source for current video data.
+ std::array<uint8_t, 65536> expansion_ram_;
+
+ // Register indirections.
+ int selected_status_ = 0;
+ int indirect_register_ = 0;
+ bool increment_indirect_register_ = false;
+
+ // Output horizontal and vertical adjustment, plus the selected vertical offset (i.e. hardware scroll).
+ int adjustment_[2]{};
+ uint8_t vertical_offset_ = 0;
+
+ // The palette, plus a shadow copy in which colour 0 is not the current palette colour 0,
+ // but is rather the current global background colour. This simplifies flow when colour 0
+ // is set as transparent.
+ std::array<uint32_t, 16> palette_{};
+ std::array<uint32_t, 16> background_palette_{};
+ bool solid_background_ = true;
+
+ // Transient state for palette setting.
+ uint8_t new_colour_ = 0;
+ uint8_t palette_entry_ = 0;
+ bool palette_write_phase_ = false;
+
+ // Recepticle for all five bits of the current screen mode.
+ uint8_t mode_ = 0;
+
+ // Used ephemerally during drawing to compound sprites with the 'CC'
+ // (compound colour?) bit set.
+ uint8_t sprite_cache_[8][32]{};
+
+ // Text blink colours.
+ uint8_t blink_text_colour_ = 0;
+ uint8_t blink_background_colour_ = 0;
+
+ // Blink state (which is also affects even/odd page display in applicable modes).
+ int in_blink_ = 1;
+ uint8_t blink_periods_ = 0;
+ uint8_t blink_counter_ = 0;
+
+ // Additional things exposed by status registers.
+ uint8_t colour_status_ = 0;
+ uint16_t colour_location_ = 0;
+ uint16_t collision_location_[2]{};
+
+ Storage() noexcept {
+ // Seed to something valid.
+ next_event_ = refresh_events.data();
+ }
+
+ /// Resets line-ephemeral state for a new line.
+ void begin_line(ScreenMode mode, bool is_refresh) {
+ if(is_refresh) {
+ next_event_ = refresh_events.data();
+ return;
+ }
+
+ switch(mode) {
+ case ScreenMode::YamahaText80:
+ case ScreenMode::Text:
+ next_event_ = text_events.data();
+ break;
+
+ case ScreenMode::MultiColour:
+ case ScreenMode::YamahaGraphics1:
+ case ScreenMode::YamahaGraphics2:
+ next_event_ = character_events.data();
+ break;
+
+ case ScreenMode::YamahaGraphics3: // TODO: verify; my guess is that G3 is timed like a bitmap mode
+ // in order to fit the pattern for sprite mode 2. Just a guess.
+ default:
+ next_event_ = sprites_enabled_ ? sprites_events.data() : no_sprites_events.data();
+ break;
+ }
+ }
+
+ private:
+ static constexpr auto refresh_events = events<RefreshGenerator>();
+ static constexpr auto no_sprites_events = events<BitmapGenerator<false>>();
+ static constexpr auto sprites_events = events<BitmapGenerator<true>>();
+ static constexpr auto text_events = events<TextGenerator>();
static constexpr auto character_events = events<CharacterGenerator>();
};
diff --git a/Components/AppleClock/AppleClock.hpp b/Components/AppleClock/AppleClock.hpp
index cf27a796f..4271a61fc 100644
--- a/Components/AppleClock/AppleClock.hpp
+++ b/Components/AppleClock/AppleClock.hpp
@@ -195,7 +195,7 @@ class SerialClock: public ClockStorage {
Sets the current clock and data inputs to the clock.
*/
void set_input(bool clock, bool data) {
- // The data line is valid when the clock transitions to level 0.
+ // The data line is valid when the clock transitions to level 0.
if(clock && !previous_clock_) {
// Shift into the command_ register, no matter what.
command_ = uint16_t((command_ << 1) | (data ? 1 : 0));
diff --git a/Components/OPx/Implementation/LowFrequencyOscillator.hpp b/Components/OPx/Implementation/LowFrequencyOscillator.hpp
index 5c53eac29..e79953b34 100644
--- a/Components/OPx/Implementation/LowFrequencyOscillator.hpp
+++ b/Components/OPx/Implementation/LowFrequencyOscillator.hpp
@@ -53,7 +53,7 @@ class LowFrequencyOscillator {
/// Updartes the LFSR output. Should be called at the input clock rate.
void update_lfsr() {
- lfsr = noise_source_.next();
+ lfsr = noise_source_.next();
}
private:
diff --git a/InstructionSets/6809/OperationMapper.hpp b/InstructionSets/6809/OperationMapper.hpp
index 478c12d84..284d8e071 100644
--- a/InstructionSets/6809/OperationMapper.hpp
+++ b/InstructionSets/6809/OperationMapper.hpp
@@ -100,7 +100,7 @@ template <int i, typename SchedulerT> void OperationMapper<Page::Page0>::dispatc
AM::Variant, AM::Variant, AM::Inherent, AM::Inherent,
AM::Illegal, AM::Illegal, AM::Relative, AM::Relative,
AM::Illegal, AM::Inherent, AM::Immediate, AM::Illegal,
- AM::Immediate, AM::Inherent, AM::Inherent, AM::Inherent,
+ AM::Immediate, AM::Inherent, AM::Inherent, AM::Inherent,
};
s.template schedule<operations[lower], modes[lower]>();
} break;
@@ -162,7 +162,7 @@ template <int i, typename SchedulerT> void OperationMapper<Page::Page0>::dispatc
O::EORA, O::ADCA, O::ORA, O::ADDA, O::CMPX, O::JSR, O::LDX, O::STX,
};
if(i == 0x8d) s.template schedule<O::BSR, AM::Relative>();
- else s.template schedule<operations[lower], mode>();
+ else s.template schedule<operations[lower], mode>();
} break;
case 0xc: case 0xd: case 0xe: case 0xf: {
constexpr Operation operations[] = {
diff --git a/InstructionSets/M50740/Instruction.hpp b/InstructionSets/M50740/Instruction.hpp
index 057a79640..d48333888 100644
--- a/InstructionSets/M50740/Instruction.hpp
+++ b/InstructionSets/M50740/Instruction.hpp
@@ -65,7 +65,7 @@ enum class Operation: uint8_t {
INX, INY, DEX, DEY,
FST, SLW,
NOP,
- PHA, PHP, PLA, PLP,
+ PHA, PHP, PLA, PLP,
STP,
TAX, TAY, TSX, TXA,
TXS, TYA,
@@ -120,7 +120,7 @@ inline constexpr const char *operation_name(Operation operation) {
MAP(BCC); MAP(BCS); MAP(BEQ); MAP(BMI); MAP(BNE); MAP(BPL); MAP(BVC); MAP(BVS);
MAP(BRA); MAP(BRK); MAP(JMP); MAP(JSR); MAP(RTI); MAP(RTS); MAP(CLC); MAP(CLD);
MAP(CLI); MAP(CLT); MAP(CLV); MAP(SEC); MAP(SED); MAP(SEI); MAP(SET); MAP(INX);
- MAP(INY); MAP(DEX); MAP(DEY); MAP(FST); MAP(SLW); MAP(NOP); MAP(PHA); MAP(PHP);
+ MAP(INY); MAP(DEX); MAP(DEY); MAP(FST); MAP(SLW); MAP(NOP); MAP(PHA); MAP(PHP);
MAP(PLA); MAP(PLP); MAP(STP); MAP(TAX); MAP(TAY); MAP(TSX); MAP(TXA); MAP(TXS);
MAP(TYA); MAP(ADC); MAP(SBC); MAP(AND); MAP(ORA); MAP(EOR); MAP(BIT); MAP(CMP);
MAP(CPX); MAP(CPY); MAP(LDA); MAP(LDX); MAP(LDY); MAP(TST); MAP(ASL); MAP(LSR);
@@ -185,7 +185,7 @@ inline std::string address(AddressingMode addressing_mode, const uint8_t *operat
#define NUM(x) std::setfill('0') << std::setw(2) << int(x)
#define NUM4(x) std::setfill('0') << std::setw(4) << int(x)
switch(addressing_mode) {
- default: return "???";
+ default: return "???";
case AddressingMode::Implied: return "";
case AddressingMode::Accumulator: return "A ";
case AddressingMode::Immediate: output << "#$" << NUM(operation[1]); break;
diff --git a/InstructionSets/M68k/Decoder.cpp b/InstructionSets/M68k/Decoder.cpp
index 039b7bb01..925804f5c 100644
--- a/InstructionSets/M68k/Decoder.cpp
+++ b/InstructionSets/M68k/Decoder.cpp
@@ -26,7 +26,7 @@ constexpr AddressingMode extended_modes[] = {
};
/// @returns The @c AddressingMode given the specified mode and reg, subject to potential
-/// aliasing on the '020+ as described above the @c AddressingMode enum.
+/// aliasing on the '020+ as described above the @c AddressingMode enum.
constexpr AddressingMode combined_mode(int mode, int reg) {
assert(mode >= 0 && mode < 8);
assert(reg >= 0 && reg < 8);
@@ -162,13 +162,13 @@ template <typename Predecoder<model>::OpT op> uint32_t Predecoder<model>::invali
//
// All modes: the complete set (other than Quick).
//
- static constexpr auto AllModes = Dn | An | Ind | PostInc | PreDec | d16An | d8AnXn | XXXw | XXXl | Imm | d16PC | d8PCXn;
- static constexpr auto AllModesNoAn = AllModes & ~An;
+ static constexpr auto AllModes = Dn | An | Ind | PostInc | PreDec | d16An | d8AnXn | XXXw | XXXl | Imm | d16PC | d8PCXn;
+ static constexpr auto AllModesNoAn = AllModes & ~An;
//
// Alterable addressing modes (with and without AddressRegisterDirect).
//
- static constexpr auto AlterableAddressingModes = Dn | An | Ind | PostInc | PreDec | d16An | d8AnXn | XXXw | XXXl;
+ static constexpr auto AlterableAddressingModes = Dn | An | Ind | PostInc | PreDec | d16An | d8AnXn | XXXw | XXXl;
static constexpr auto AlterableAddressingModesNoAn = AlterableAddressingModes & ~An;
//
@@ -224,7 +224,7 @@ template <typename Predecoder<model>::OpT op> uint32_t Predecoder<model>::invali
>::value;
case OpT(Operation::ADDAw): case OpT(Operation::ADDAl):
- case OpT(Operation::CMPAw): case OpT(Operation::CMPAl):
+ case OpT(Operation::CMPAw): case OpT(Operation::CMPAl):
case OpT(Operation::SUBAw): case OpT(Operation::SUBAl):
case OpT(Operation::MOVEAw): case OpT(Operation::MOVEAl):
return ~TwoOperandMask<
@@ -728,7 +728,7 @@ template <typename Predecoder<model>::OpT op, bool validate> Preinstruction Pred
// Implicitly: source is an immediate value;
// b0–b2 and b3–b5: destination effective address.
//
- case EORIb: case EORIl: case EORIw:
+ case EORIb: case EORIl: case EORIw:
case ORIb: case ORIl: case ORIw:
case ANDIb: case ANDIl: case ANDIw:
case SUBIb: case SUBIl: case SUBIw:
diff --git a/InstructionSets/M68k/Executor.hpp b/InstructionSets/M68k/Executor.hpp
index 5c2737bd7..5db70ae75 100644
--- a/InstructionSets/M68k/Executor.hpp
+++ b/InstructionSets/M68k/Executor.hpp
@@ -21,7 +21,7 @@ namespace InstructionSet::M68k {
/// Maps the 68k function codes such that bits 0, 1 and 2 represent
/// FC0, FC1 and FC2 respectively.
enum class FunctionCode {
- UserData = 0b001,
+ UserData = 0b001,
UserProgram = 0b010,
SupervisorData = 0b101,
SupervisorProgram = 0b110,
diff --git a/InstructionSets/M68k/Implementation/ExecutorImplementation.hpp b/InstructionSets/M68k/Implementation/ExecutorImplementation.hpp
index b064237aa..3f06e0a3a 100644
--- a/InstructionSets/M68k/Implementation/ExecutorImplementation.hpp
+++ b/InstructionSets/M68k/Implementation/ExecutorImplementation.hpp
@@ -238,7 +238,7 @@ uint32_t Executor<model, BusHandler>::State::index_8bitdisplacement(uint32_t bas
// Fetch base displacement.
uint32_t base_displacement = 0;
switch((extension >> 4) & 3) {
- default: break;
+ default: break;
case 2: base_displacement = read_pc<uint16_t>(); break;
case 3: base_displacement = read_pc<uint32_t>(); break;
}
diff --git a/InstructionSets/M68k/Implementation/InstructionOperandFlags.hpp b/InstructionSets/M68k/Implementation/InstructionOperandFlags.hpp
index 8e6630ef3..f5250a31d 100644
--- a/InstructionSets/M68k/Implementation/InstructionOperandFlags.hpp
+++ b/InstructionSets/M68k/Implementation/InstructionOperandFlags.hpp
@@ -113,7 +113,7 @@ template <Model model, Operation t_operation> constexpr uint8_t operand_flags(Op
//
// Two-operand; read source, write dest.
//
- case Operation::MOVEb: case Operation::MOVEw: case Operation::MOVEl:
+ case Operation::MOVEb: case Operation::MOVEw: case Operation::MOVEl:
case Operation::MOVEAw: case Operation::MOVEAl:
case Operation::PACK: case Operation::UNPK:
return FetchOp1 | StoreOp2;
@@ -122,12 +122,12 @@ template <Model model, Operation t_operation> constexpr uint8_t operand_flags(Op
// Two-operand; read both, write dest.
//
case Operation::ABCD: case Operation::SBCD:
- case Operation::ADDb: case Operation::ADDw: case Operation::ADDl:
+ case Operation::ADDb: case Operation::ADDw: case Operation::ADDl:
case Operation::ADDAw: case Operation::ADDAl:
- case Operation::ADDXb: case Operation::ADDXw: case Operation::ADDXl:
- case Operation::SUBb: case Operation::SUBw: case Operation::SUBl:
+ case Operation::ADDXb: case Operation::ADDXw: case Operation::ADDXl:
+ case Operation::SUBb: case Operation::SUBw: case Operation::SUBl:
case Operation::SUBAw: case Operation::SUBAl:
- case Operation::SUBXb: case Operation::SUBXw: case Operation::SUBXl:
+ case Operation::SUBXb: case Operation::SUBXw: case Operation::SUBXl:
case Operation::ORb: case Operation::ORw: case Operation::ORl:
case Operation::ANDb: case Operation::ANDw: case Operation::ANDl:
case Operation::EORb: case Operation::EORw: case Operation::EORl:
diff --git a/InstructionSets/M68k/Implementation/PerformImplementation.hpp b/InstructionSets/M68k/Implementation/PerformImplementation.hpp
index 51c2fc81c..c5f7fda1c 100644
--- a/InstructionSets/M68k/Implementation/PerformImplementation.hpp
+++ b/InstructionSets/M68k/Implementation/PerformImplementation.hpp
@@ -465,7 +465,7 @@ template <Operation operation, typename IntT, typename FlowController> void rox(
// When shift is zero, extend is unaffected but is copied to carry.
status.carry_flag = status.extend_flag;
} else {
- switch(operation) {
+ switch(operation) {
case Operation::ROXLb: case Operation::ROXLw: case Operation::ROXLl:
status.carry_flag = Status::FlagT((destination >> (size - shift)) & 1);
diff --git a/InstructionSets/M68k/Instruction.hpp b/InstructionSets/M68k/Instruction.hpp
index 5251cf5af..de4eb9b1f 100644
--- a/InstructionSets/M68k/Instruction.hpp
+++ b/InstructionSets/M68k/Instruction.hpp
@@ -83,7 +83,7 @@ enum class Operation: uint8_t {
ANDb, ANDw, ANDl,
EORb, EORw, EORl,
- NOTb, NOTw, NOTl,
+ NOTb, NOTw, NOTl,
ORb, ORw, ORl,
MULUw, MULSw,
diff --git a/InstructionSets/M68k/Status.hpp b/InstructionSets/M68k/Status.hpp
index 404eefb24..cfb831353 100644
--- a/InstructionSets/M68k/Status.hpp
+++ b/InstructionSets/M68k/Status.hpp
@@ -68,7 +68,7 @@ struct Status {
/// Gets the current condition codes.
constexpr uint16_t ccr() const {
return
- (carry_flag ? ConditionCode::Carry : 0) |
+ (carry_flag ? ConditionCode::Carry : 0) |
(overflow_flag ? ConditionCode::Overflow : 0) |
(!zero_result ? ConditionCode::Zero : 0) |
(negative_flag ? ConditionCode::Negative : 0) |
diff --git a/InstructionSets/PowerPC/Decoder.cpp b/InstructionSets/PowerPC/Decoder.cpp
index bcb619866..3c0c1796e 100644
--- a/InstructionSets/PowerPC/Decoder.cpp
+++ b/InstructionSets/PowerPC/Decoder.cpp
@@ -326,7 +326,7 @@ Instruction Decoder<model, validate_reserved_bits>::decode(uint32_t opcode) {
Bind(Six(0b001010), cmpli); Bind(Six(0b001011), cmpi);
}
-
+
// Second pass: all those with a top six bits and a bottom nine or ten.
switch(opcode & SixTen(0b111111, 0b1111111111)) {
default: break;
diff --git a/InstructionSets/PowerPC/Instruction.hpp b/InstructionSets/PowerPC/Instruction.hpp
index 9348ea08b..a55fb926c 100644
--- a/InstructionSets/PowerPC/Instruction.hpp
+++ b/InstructionSets/PowerPC/Instruction.hpp
@@ -46,13 +46,13 @@ enum class BranchOption: uint32_t {
// condition ending Set or Clear => test the condition bit.
Dec_NotZeroAndClear = 0b0000,
Dec_ZeroAndClear = 0b0001,
- Clear = 0b0010,
+ Clear = 0b0010,
Dec_NotZeroAndSet = 0b0100,
- Dec_ZeroAndSet = 0b0101,
- Set = 0b0110,
- Dec_NotZero = 0b1000,
+ Dec_ZeroAndSet = 0b0101,
+ Set = 0b0110,
+ Dec_NotZero = 0b1000,
Dec_Zero = 0b1001,
- Always = 0b1010,
+ Always = 0b1010,
};
@@ -1389,30 +1389,30 @@ struct Instruction {
int32_t imm() const { return (opcode >> 12) & 0xf; }
/// Specifies the conditions on which to trap.
- int32_t to() const { return (opcode >> 21) & 0x1f; }
+ int32_t to() const { return (opcode >> 21) & 0x1f; }
/// Register source A or destination.
- uint32_t rA() const { return (opcode >> 16) & 0x1f; }
+ uint32_t rA() const { return (opcode >> 16) & 0x1f; }
/// Register source B.
- uint32_t rB() const { return (opcode >> 11) & 0x1f; }
+ uint32_t rB() const { return (opcode >> 11) & 0x1f; }
/// Register destination.
- uint32_t rD() const { return (opcode >> 21) & 0x1f; }
+ uint32_t rD() const { return (opcode >> 21) & 0x1f; }
/// Register source.
- uint32_t rS() const { return (opcode >> 21) & 0x1f; }
+ uint32_t rS() const { return (opcode >> 21) & 0x1f; }
/// Floating point register source A.
- uint32_t frA() const { return (opcode >> 16) & 0x1f; }
+ uint32_t frA() const { return (opcode >> 16) & 0x1f; }
/// Floating point register source B.
- uint32_t frB() const { return (opcode >> 11) & 0x1f; }
+ uint32_t frB() const { return (opcode >> 11) & 0x1f; }
/// Floating point register source C.
- uint32_t frC() const { return (opcode >> 6) & 0x1f; }
+ uint32_t frC() const { return (opcode >> 6) & 0x1f; }
/// Floating point register source.
- uint32_t frS() const { return (opcode >> 21) & 0x1f; }
+ uint32_t frS() const { return (opcode >> 21) & 0x1f; }
/// Floating point register destination.
- uint32_t frD() const { return (opcode >> 21) & 0x1f; }
+ uint32_t frD() const { return (opcode >> 21) & 0x1f; }
/// Branch conditional options as per PowerPC spec, i.e. options + branch-prediction flag.
- uint32_t bo() const { return (opcode >> 21) & 0x1f; }
+ uint32_t bo() const { return (opcode >> 21) & 0x1f; }
/// Just the branch options, with the branch prediction flag severed.
BranchOption branch_options() const {
return BranchOption((opcode >> 22) & 0xf);
@@ -1422,7 +1422,7 @@ struct Instruction {
return opcode & 0x200000;
}
/// Source condition register bit for branch conditionals.
- uint32_t bi() const { return (opcode >> 16) & 0x1f; }
+ uint32_t bi() const { return (opcode >> 16) & 0x1f; }
/// Branch displacement; provided as already sign extended.
int16_t bd() const { return int16_t(opcode & 0xfffc); }
@@ -1447,9 +1447,9 @@ struct Instruction {
/// Provides the mask described by 32-bit rotate operations.
///
/// Per IBM's rules:
- /// mb < me+1 => set [mb, me]
- /// mb == me+1 => set all bits
- /// mb > me+1 => complement of set [me+1, mb-1]
+ /// mb < me+1 => set [mb, me]
+ /// mb == me+1 => set all bits
+ /// mb > me+1 => complement of set [me+1, mb-1]
template <typename IntT> IntT rotate_mask() const {
const auto mb_bit = mb();
const auto me_bit = me();
@@ -1521,9 +1521,9 @@ struct Instruction {
/// Identifies a special purpose register.
- uint32_t spr() const { return (opcode >> 11) & 0x3ff; }
+ uint32_t spr() const { return (opcode >> 11) & 0x3ff; }
/// Identifies a time base register.
- uint32_t tbr() const { return (opcode >> 11) & 0x3ff; }
+ uint32_t tbr() const { return (opcode >> 11) & 0x3ff; }
};
// Sanity check on Instruction size.
diff --git a/InstructionSets/README.md b/InstructionSets/README.md
index 80db78f44..fc50a84ea 100644
--- a/InstructionSets/README.md
+++ b/InstructionSets/README.md
@@ -4,15 +4,15 @@ Code in here provides the means to disassemble, and to execute code for certain
It **does not seek to emulate specific processors** other than in terms of implementing their instruction sets. So:
* it doesn't involve itself in the actual bus signalling of real processors; and
-* instruction-level timing (e.g. total cycle counts) may be unimplemented, and is likely to be incomplete.
+* instruction-level timing (e.g. total cycle counts) may be unimplemented, and is likely to be incomplete.
This part of CLK is intended primarily to provide disassembly services for static analysis, and processing for machines where timing is not part of the specification — i.e. anything that's an instruction set and a HAL.
## Decoders
-A decoder extracts fully-decoded instructions from a data stream for its associated architecture.
+A decoder extracts fully-decoded instructions from a data stream for its associated architecture.
-The meaning of 'fully-decoded' is flexible but it means that a caller can easily discern at least:
+The meaning of 'fully-decoded' is flexible but it means that a caller can easily discern at least:
* the operation in use;
* its addressing mode; and
* relevant registers.
@@ -23,7 +23,7 @@ In deciding what to expose, what to store ahead of time and what to obtain just-
1. disassemblers; and
2. instruction executors.
-It may also be reasonable to make allowances for bus-centric CPU emulators, but those will be tightly coupled to specific decoders so no general rules need apply.
+It may also be reasonable to make allowances for bus-centric CPU emulators, but those will be tightly coupled to specific decoders so no general rules need apply.
Disassemblers are likely to decode an instruction, output it, and then immediately forget about it.
@@ -31,7 +31,7 @@ Instruction executors may opt to cache decoded instructions to reduce recurrent
### Likely Interfaces
-These examples assume that the processor itself doesn't hold any state that affects instruction parsing. Whether processors with such state offer more than one decoder or take state as an argument will be a question of measure and effect.
+These examples assume that the processor itself doesn't hold any state that affects instruction parsing. Whether processors with such state offer more than one decoder or take state as an argument will be a question of measure and effect.
#### Fixed-size instruction words
@@ -53,7 +53,7 @@ In this sample the returned pair provides an `int` size that is one of:
* a positive number, indicating a completed decoding that consumed that many `word_type`s; or
* a negative number, indicating the [negatived] minimum number of `word_type`s that the caller should try to get hold of before calling `decode` again.
-A caller is permitted to react in any way it prefers to negative numbers; they're a hint potentially to reduce calling overhead only. A size of `0` would be taken to have the same meaning as a size of `-1`.
+A caller is permitted to react in any way it prefers to negative numbers; they're a hint potentially to reduce calling overhead only. A size of `0` would be taken to have the same meaning as a size of `-1`.
## Parsers
@@ -81,6 +81,6 @@ An executor is assumed to bundle all the things that go into instruction set exe
## Caching Executor
-The caching executor is a generic class templated on a specific executor. It will use an executor to cache the results of parsing.
+The caching executor is a generic class templated on a specific executor. It will use an executor to cache the results of parsing.
-Idiomatically, the objects that perform instructions will expect to receive an appropriate executor as an argument. If they require other information, such as a copy of the decoded instruction, it should be built into the classes.
+Idiomatically, the objects that perform instructions will expect to receive an appropriate executor as an argument. If they require other information, such as a copy of the decoded instruction, it should be built into the classes.
diff --git a/InstructionSets/x86/DataPointerResolver.hpp b/InstructionSets/x86/DataPointerResolver.hpp
index df7aa53db..056aa9476 100644
--- a/InstructionSets/x86/DataPointerResolver.hpp
+++ b/InstructionSets/x86/DataPointerResolver.hpp
@@ -202,12 +202,12 @@ template <typename DataT> void DataPointerResolver<model, RegistersT, MemoryT>::
} \
break;
-#define ALLREGS(v, i) rw(v, eAX, i); rw(v, eCX, i); \
- rw(v, eDX, i); rw(v, eBX, i); \
+#define ALLREGS(v, i) rw(v, eAX, i); rw(v, eCX, i); \
+ rw(v, eDX, i); rw(v, eBX, i); \
rw(v, eSPorAH, i); rw(v, eBPorCH, i); \
rw(v, eSIorDH, i); rw(v, eDIorBH, i); \
- rw(v, ES, i); rw(v, CS, i); \
- rw(v, SS, i); rw(v, DS, i); \
+ rw(v, ES, i); rw(v, CS, i); \
+ rw(v, SS, i); rw(v, DS, i); \
rw(v, FS, i); rw(v, GS, i);
template <Model model, typename RegistersT, typename MemoryT>
diff --git a/InstructionSets/x86/Decoder.cpp b/InstructionSets/x86/Decoder.cpp
index d4db0b021..d24d188a3 100644
--- a/InstructionSets/x86/Decoder.cpp
+++ b/InstructionSets/x86/Decoder.cpp
@@ -691,13 +691,13 @@ std::pair<int, typename Decoder<model>::InstructionT> Decoder<model>::decode(con
switch(reg) {
default: undefined();
- case 0: operation_ = Operation::TEST; break;
- case 2: operation_ = Operation::NOT; break;
- case 3: operation_ = Operation::NEG; break;
- case 4: operation_ = Operation::MUL; break;
- case 5: operation_ = Operation::IMUL_1; break;
- case 6: operation_ = Operation::DIV; break;
- case 7: operation_ = Operation::IDIV; break;
+ case 0: operation_ = Operation::TEST; break;
+ case 2: operation_ = Operation::NOT; break;
+ case 3: operation_ = Operation::NEG; break;
+ case 4: operation_ = Operation::MUL; break;
+ case 5: operation_ = Operation::IMUL_1; break;
+ case 6: operation_ = Operation::DIV; break;
+ case 7: operation_ = Operation::IDIV; break;
}
break;
@@ -729,15 +729,15 @@ std::pair<int, typename Decoder<model>::InstructionT> Decoder<model>::decode(con
destination_ = memreg;
switch(reg) {
- default: undefined();
+ default: undefined();
- case 0: operation_ = Operation::ROL; break;
- case 1: operation_ = Operation::ROR; break;
- case 2: operation_ = Operation::RCL; break;
- case 3: operation_ = Operation::RCR; break;
- case 4: operation_ = Operation::SAL; break;
- case 5: operation_ = Operation::SHR; break;
- case 7: operation_ = Operation::SAR; break;
+ case 0: operation_ = Operation::ROL; break;
+ case 1: operation_ = Operation::ROR; break;
+ case 2: operation_ = Operation::RCL; break;
+ case 3: operation_ = Operation::RCR; break;
+ case 4: operation_ = Operation::SAL; break;
+ case 5: operation_ = Operation::SHR; break;
+ case 7: operation_ = Operation::SAR; break;
}
break;
@@ -745,7 +745,7 @@ std::pair<int, typename Decoder<model>::InstructionT> Decoder<model>::decode(con
source_ = destination_ = memreg;
switch(reg) {
- default: undefined();
+ default: undefined();
case 0: operation_ = Operation::INC; break;
case 1: operation_ = Operation::DEC; break;
@@ -756,7 +756,7 @@ std::pair<int, typename Decoder<model>::InstructionT> Decoder<model>::decode(con
source_ = destination_ = memreg;
switch(reg) {
- default: undefined();
+ default: undefined();
case 0: operation_ = Operation::INC; break;
case 1: operation_ = Operation::DEC; break;
@@ -807,12 +807,12 @@ std::pair<int, typename Decoder<model>::InstructionT> Decoder<model>::decode(con
switch(reg) {
default: undefined();
- case 0: operation_ = Operation::SLDT; break;
- case 1: operation_ = Operation::STR; break;
- case 2: operation_ = Operation::LLDT; break;
- case 3: operation_ = Operation::LTR; break;
- case 4: operation_ = Operation::VERR; break;
- case 5: operation_ = Operation::VERW; break;
+ case 0: operation_ = Operation::SLDT; break;
+ case 1: operation_ = Operation::STR; break;
+ case 2: operation_ = Operation::LLDT; break;
+ case 3: operation_ = Operation::LTR; break;
+ case 4: operation_ = Operation::VERR; break;
+ case 5: operation_ = Operation::VERW; break;
}
break;
@@ -822,12 +822,12 @@ std::pair<int, typename Decoder<model>::InstructionT> Decoder<model>::decode(con
switch(reg) {
default: undefined();
- case 0: operation_ = Operation::SGDT; break;
- case 1: operation_ = Operation::SIDT; break;
- case 2: operation_ = Operation::LGDT; break;
- case 3: operation_ = Operation::LIDT; break;
- case 4: operation_ = Operation::SMSW; break;
- case 6: operation_ = Operation::LMSW; break;
+ case 0: operation_ = Operation::SGDT; break;
+ case 1: operation_ = Operation::SIDT; break;
+ case 2: operation_ = Operation::LGDT; break;
+ case 3: operation_ = Operation::LIDT; break;
+ case 4: operation_ = Operation::SMSW; break;
+ case 6: operation_ = Operation::LMSW; break;
}
break;
diff --git a/Machines/Amiga/Amiga.cpp b/Machines/Amiga/Amiga.cpp
index 5ad0a7bca..8d08e63d1 100644
--- a/Machines/Amiga/Amiga.cpp
+++ b/Machines/Amiga/Amiga.cpp
@@ -186,7 +186,7 @@ class ConcreteMachine:
// MARK: - Chipset.
Chipset chipset_;
-
+
// MARK: - Activity Source
void set_activity_observer(Activity::Observer *observer) final {
diff --git a/Machines/Amiga/Bitplanes.hpp b/Machines/Amiga/Bitplanes.hpp
index 62664621c..d3a3ad23b 100644
--- a/Machines/Amiga/Bitplanes.hpp
+++ b/Machines/Amiga/Bitplanes.hpp
@@ -78,9 +78,9 @@ class BitplaneShifter {
/// The value is arranges so that MSB = first pixel to output, LSB = last.
///
/// Each byte is swizzled to provide easier playfield separation, being in the form:
- /// b6, b7 = 0;
- /// b3–b5: planes 1, 3 and 5;
- /// b0–b2: planes 0, 2 and 4.
+ /// b6, b7 = 0;
+ /// b3–b5: planes 1, 3 and 5;
+ /// b0–b2: planes 0, 2 and 4.
uint32_t get(bool high_res) {
if(high_res) {
return uint32_t(data_[1] >> 32);
diff --git a/Machines/Amiga/Chipset.cpp b/Machines/Amiga/Chipset.cpp
index 5766c9b2c..534486e9d 100644
--- a/Machines/Amiga/Chipset.cpp
+++ b/Machines/Amiga/Chipset.cpp
@@ -393,9 +393,9 @@ template <int cycle> void Chipset::output() {
constexpr int end_of_pixels = 15;
constexpr int blank1 = 3 + end_of_pixels;
constexpr int sync = 17 + blank1;
- constexpr int blank2 = 3 + sync;
- constexpr int burst = 9 + blank2;
- constexpr int blank3 = 6 + burst;
+ constexpr int blank2 = 3 + sync;
+ constexpr int burst = 9 + blank2;
+ constexpr int blank3 = 6 + burst;
static_assert(blank3 == 53);
#define LINK(location, action, length) \
@@ -674,8 +674,8 @@ template <bool stop_on_cpu> int Chipset::advance_slots(int first_slot, int last_
}
assert(last_slot > first_slot);
-#define C(x) \
- case x: \
+#define C(x) \
+ case x: \
output<x>(); \
\
if constexpr (stop_on_cpu) { \
@@ -683,8 +683,8 @@ template <bool stop_on_cpu> int Chipset::advance_slots(int first_slot, int last_
return 1 + x - first_slot; \
} \
} else { \
- perform_cycle<x, stop_on_cpu>(); \
- } \
+ perform_cycle<x, stop_on_cpu>(); \
+ } \
\
if((x + 1) == last_slot) break; \
[[fallthrough]]
diff --git a/Machines/Apple/ADB/Bus.hpp b/Machines/Apple/ADB/Bus.hpp
index a6d35099f..16aa58847 100644
--- a/Machines/Apple/ADB/Bus.hpp
+++ b/Machines/Apple/ADB/Bus.hpp
@@ -47,7 +47,7 @@ inline std::ostream &operator <<(std::ostream &stream, Command::Type type) {
case Command::Type::Flush: stream << "flush"; break;
case Command::Type::Listen: stream << "listen"; break;
case Command::Type::Talk: stream << "talk"; break;
- default: stream << "reserved"; break;
+ default: stream << "reserved"; break;
}
return stream;
}
diff --git a/Machines/Apple/ADB/Keyboard.cpp b/Machines/Apple/ADB/Keyboard.cpp
index 9a9ad556f..fd89a06df 100644
--- a/Machines/Apple/ADB/Keyboard.cpp
+++ b/Machines/Apple/ADB/Keyboard.cpp
@@ -161,7 +161,7 @@ uint16_t KeyboardMapper::mapped_key_for_key(Inputs::Keyboard::Key key) const {
switch(key) {
default: return MachineTypes::MappedKeyboardMachine::KeyNotMapped;
-#define Bind(x, y) case Key::x: return uint16_t(ADBKey::y)
+#define Bind(x, y) case Key::x: return uint16_t(ADBKey::y)
#define BindDirect(x) Bind(x, x)
BindDirect(BackTick);
diff --git a/Machines/Apple/AppleIIgs/ADB.cpp b/Machines/Apple/AppleIIgs/ADB.cpp
index 7276a2801..32afec75d 100644
--- a/Machines/Apple/AppleIIgs/ADB.cpp
+++ b/Machines/Apple/AppleIIgs/ADB.cpp
@@ -71,7 +71,7 @@ uint8_t GLU::get_any_key_down() {
uint8_t GLU::get_mouse_data() {
// Alternates between returning x and y values.
//
- // b7: 1 = button is up; 0 = button is down.
+ // b7: 1 = button is up; 0 = button is down.
// b6: delta sign bit; 1 = negative.
// b5–b0: mouse delta.
diff --git a/Machines/Apple/AppleIIgs/AppleIIgs.cpp b/Machines/Apple/AppleIIgs/AppleIIgs.cpp
index a2af523aa..a61f69462 100644
--- a/Machines/Apple/AppleIIgs/AppleIIgs.cpp
+++ b/Machines/Apple/AppleIIgs/AppleIIgs.cpp
@@ -203,8 +203,8 @@ class ConcreteMachine:
memory_(target.model >= Analyser::Static::AppleIIgs::Target::Model::ROM03),
iwm_(CLOCK_RATE / 2),
drives35_{
- {CLOCK_RATE / 2, true},
- {CLOCK_RATE / 2, true}
+ {CLOCK_RATE / 2, true},
+ {CLOCK_RATE / 2, true}
},
drives525_{
{CLOCK_RATE / 2},
@@ -1144,9 +1144,9 @@ class ConcreteMachine:
Apple::Clock::ParallelClock clock_;
JustInTimeActor<Apple::IIgs::Video::Video, Cycles, 1, 2> video_; // i.e. run video at 7Mhz.
JustInTimeActor<Apple::IIgs::ADB::GLU, Cycles, 1, 4> adb_glu_; // i.e. 3,579,545Mhz.
- Zilog::SCC::z8530 scc_;
- JustInTimeActor<Apple::IWM, Cycles, 1, 2> iwm_;
- Cycles cycles_since_clock_tick_;
+ Zilog::SCC::z8530 scc_;
+ JustInTimeActor<Apple::IWM, Cycles, 1, 2> iwm_;
+ Cycles cycles_since_clock_tick_;
Apple::Macintosh::DoubleDensityDrive drives35_[2];
Apple::Disk::DiskIIDrive drives525_[2];
diff --git a/Machines/Apple/AppleIIgs/MemoryMap.hpp b/Machines/Apple/AppleIIgs/MemoryMap.hpp
index ff9ce110c..0800fca04 100644
--- a/Machines/Apple/AppleIIgs/MemoryMap.hpp
+++ b/Machines/Apple/AppleIIgs/MemoryMap.hpp
@@ -642,7 +642,7 @@ class MemoryMap {
// TODO: branching below on region.read/write is predicated on the idea that extra scratch space
// would be less efficient. Verify that?
-#define MemoryMapRegion(map, address) map.regions[map.region_map[address >> 8]]
+#define MemoryMapRegion(map, address) map.regions[map.region_map[address >> 8]]
#define MemoryMapRead(region, address, value) *value = region.read ? region.read[address] : 0xff
// The below encapsulates the fact that I've yet to determine whether Apple intends to
diff --git a/Machines/Apple/AppleIIgs/Video.hpp b/Machines/Apple/AppleIIgs/Video.hpp
index 6d7ba977c..a6f5c9788 100644
--- a/Machines/Apple/AppleIIgs/Video.hpp
+++ b/Machines/Apple/AppleIIgs/Video.hpp
@@ -114,7 +114,7 @@ class Video: public Apple::II::VideoSwitches<Cycles> {
switch(m) {
case GraphicsMode::Text: return PixelBufferFormat::Text;
case GraphicsMode::DoubleText: return PixelBufferFormat::DoubleText;
- default: return PixelBufferFormat::NTSC;
+ default: return PixelBufferFormat::NTSC;
case GraphicsMode::DoubleHighResMono: return PixelBufferFormat::NTSCMono;
case GraphicsMode::SuperHighRes: return PixelBufferFormat::SuperHighRes;
}
diff --git a/Machines/Apple/Macintosh/Macintosh.cpp b/Machines/Apple/Macintosh/Macintosh.cpp
index d2f0dd11e..8dcbafb32 100644
--- a/Machines/Apple/Macintosh/Macintosh.cpp
+++ b/Machines/Apple/Macintosh/Macintosh.cpp
@@ -88,17 +88,17 @@ template <Analyser::Static::Macintosh::Target::Model model> class ConcreteMachin
Inputs::Keyboard::Key::LeftOption, Inputs::Keyboard::Key::RightOption,
Inputs::Keyboard::Key::LeftMeta, Inputs::Keyboard::Key::RightMeta,
}),
- mc68000_(*this),
- iwm_(CLOCK_RATE),
- video_(audio_, drive_speed_accumulator_),
- via_(via_port_handler_),
- via_port_handler_(*this, clock_, keyboard_, audio_, iwm_, mouse_),
- scsi_bus_(CLOCK_RATE * 2),
- scsi_(scsi_bus_, CLOCK_RATE * 2),
- hard_drive_(scsi_bus_, 6 /* SCSI ID */),
- drives_{
- {CLOCK_RATE, model >= Analyser::Static::Macintosh::Target::Model::Mac512ke},
- {CLOCK_RATE, model >= Analyser::Static::Macintosh::Target::Model::Mac512ke}
+ mc68000_(*this),
+ iwm_(CLOCK_RATE),
+ video_(audio_, drive_speed_accumulator_),
+ via_(via_port_handler_),
+ via_port_handler_(*this, clock_, keyboard_, audio_, iwm_, mouse_),
+ scsi_bus_(CLOCK_RATE * 2),
+ scsi_(scsi_bus_, CLOCK_RATE * 2),
+ hard_drive_(scsi_bus_, 6 /* SCSI ID */),
+ drives_{
+ {CLOCK_RATE, model >= Analyser::Static::Macintosh::Target::Model::Mac512ke},
+ {CLOCK_RATE, model >= Analyser::Static::Macintosh::Target::Model::Mac512ke}
},
mouse_(1) {
@@ -759,20 +759,20 @@ template <Analyser::Static::Macintosh::Target::Model model> class ConcreteMachin
Keyboard keyboard_;
MOS::MOS6522::MOS6522<VIAPortHandler> via_;
- VIAPortHandler via_port_handler_;
+ VIAPortHandler via_port_handler_;
- Zilog::SCC::z8530 scc_;
+ Zilog::SCC::z8530 scc_;
SCSI::Bus scsi_bus_;
- NCR::NCR5380::NCR5380 scsi_;
+ NCR::NCR5380::NCR5380 scsi_;
SCSI::Target::Target<SCSI::DirectAccessDevice> hard_drive_;
- bool scsi_bus_is_clocked_ = false;
+ bool scsi_bus_is_clocked_ = false;
- HalfCycles via_clock_;
- HalfCycles real_time_clock_;
- HalfCycles keyboard_clock_;
- HalfCycles time_since_video_update_;
- HalfCycles time_until_video_event_;
- HalfCycles time_since_mouse_update_;
+ HalfCycles via_clock_;
+ HalfCycles real_time_clock_;
+ HalfCycles keyboard_clock_;
+ HalfCycles time_since_video_update_;
+ HalfCycles time_until_video_event_;
+ HalfCycles time_since_mouse_update_;
bool ROM_is_overlay_ = true;
int phase_ = 1;
diff --git a/Machines/Apple/Macintosh/Video.cpp b/Machines/Apple/Macintosh/Video.cpp
index 8e1bfc156..e1cf1cd4e 100644
--- a/Machines/Apple/Macintosh/Video.cpp
+++ b/Machines/Apple/Macintosh/Video.cpp
@@ -36,9 +36,9 @@ constexpr uint64_t PixelMask = 0x0102040810204080;
Video::Video(DeferredAudio &audio, DriveSpeedAccumulator &drive_speed_accumulator) :
audio_(audio),
drive_speed_accumulator_(drive_speed_accumulator),
- crt_(704, 1, 370, 6, Outputs::Display::InputDataType::Luminance1) {
+ crt_(704, 1, 370, 6, Outputs::Display::InputDataType::Luminance1) {
- crt_.set_display_type(Outputs::Display::DisplayType::RGB);
+ crt_.set_display_type(Outputs::Display::DisplayType::RGB);
// UGLY HACK. UGLY, UGLY HACK. UGLY!
// The OpenGL scan target fails properly to place visible areas which are not 4:3.
diff --git a/Machines/Atari/2600/TIA.cpp b/Machines/Atari/2600/TIA.cpp
index 7eb35ce40..4f0cc761b 100644
--- a/Machines/Atari/2600/TIA.cpp
+++ b/Machines/Atari/2600/TIA.cpp
@@ -23,7 +23,7 @@ namespace {
}
TIA::TIA():
- crt_(cycles_per_line * 2 - 1, 1, Outputs::Display::Type::NTSC60, Outputs::Display::InputDataType::Luminance8Phase8) {
+ crt_(cycles_per_line * 2 - 1, 1, Outputs::Display::Type::NTSC60, Outputs::Display::InputDataType::Luminance8Phase8) {
set_output_mode(OutputMode::NTSC);
diff --git a/Machines/Atari/ST/Video.cpp b/Machines/Atari/ST/Video.cpp
index 7549c857c..290972247 100644
--- a/Machines/Atari/ST/Video.cpp
+++ b/Machines/Atari/ST/Video.cpp
@@ -173,7 +173,7 @@ void Video::run_for(HalfCycles duration) {
if(horizontal_timings.reset_blank > x_) next_event = std::min(next_event, horizontal_timings.reset_blank);
if(horizontal_timings.set_blank > x_) next_event = std::min(next_event, horizontal_timings.set_blank);
if(horizontal_timings.reset_enable > x_) next_event = std::min(next_event, horizontal_timings.reset_enable);
- if(horizontal_timings.set_enable > x_) next_event = std::min(next_event, horizontal_timings.set_enable);
+ if(horizontal_timings.set_enable > x_) next_event = std::min(next_event, horizontal_timings.set_enable);
// Check for events that are relative to existing latched state.
if(line_length_.hsync_start > x_) next_event = std::min(next_event, line_length_.hsync_start);
@@ -301,7 +301,7 @@ void Video::run_for(HalfCycles duration) {
if(horizontal_timings.reset_blank == x_) horizontal_.blank = false;
else if(horizontal_timings.set_blank == x_) horizontal_.blank = true;
else if(horizontal_timings.reset_enable == x_) horizontal_.enable = false;
- else if(horizontal_timings.set_enable == x_) horizontal_.enable = true;
+ else if(horizontal_timings.set_enable == x_) horizontal_.enable = true;
else if(line_length_.hsync_start == x_) { horizontal_.sync = true; horizontal_.enable = false; }
else if(line_length_.hsync_end == x_) horizontal_.sync = false;
@@ -746,7 +746,7 @@ void Video::VideoStream::output_pixels(int duration) {
if(pixels) {
int leftover_duration = pixels;
switch(bpp_) {
- default: leftover_duration >>= 1; break;
+ default: leftover_duration >>= 1; break;
case OutputBpp::Two: break;
case OutputBpp::Four: leftover_duration <<= 1; break;
}
@@ -759,7 +759,7 @@ void Video::VideoStream::flush_pixels() {
// Flush only if there's something to flush.
if(pixel_pointer_) {
switch(bpp_) {
- case OutputBpp::One: crt_.output_data(pixel_pointer_); break;
+ case OutputBpp::One: crt_.output_data(pixel_pointer_); break;
default: crt_.output_data(pixel_pointer_ << 1, size_t(pixel_pointer_)); break;
case OutputBpp::Four: crt_.output_data(pixel_pointer_ << 2, size_t(pixel_pointer_)); break;
}
diff --git a/Machines/Enterprise/Keyboard.hpp b/Machines/Enterprise/Keyboard.hpp
index 4f611b293..571f0a23c 100644
--- a/Machines/Enterprise/Keyboard.hpp
+++ b/Machines/Enterprise/Keyboard.hpp
@@ -18,7 +18,7 @@ namespace Enterprise {
enum class Key: uint16_t {
N = 0x0000 | 0x01, Backslash = 0x0000 | 0x02, B = 0x0000 | 0x04, C = 0x0000 | 0x08,
- V = 0x0000 | 0x10, X = 0x0000 | 0x20, Z = 0x0000 | 0x40, LeftShift = 0x0000 | 0x80,
+ V = 0x0000 | 0x10, X = 0x0000 | 0x20, Z = 0x0000 | 0x40, LeftShift = 0x0000 | 0x80,
H = 0x0100 | 0x01, Lock = 0x0100 | 0x02, G = 0x0100 | 0x04, D = 0x0100 | 0x08,
F = 0x0100 | 0x10, S = 0x0100 | 0x20, A = 0x0100 | 0x40, Control = 0x0100 | 0x80,
diff --git a/Machines/ScanProducer.hpp b/Machines/ScanProducer.hpp
index 9bea9a6b0..d823436bf 100644
--- a/Machines/ScanProducer.hpp
+++ b/Machines/ScanProducer.hpp
@@ -82,8 +82,8 @@ class ScanProducer {
switch(get_display_type()) {
default:
case Outputs::Display::DisplayType::RGB: return Configurable::Display::RGB;
- case Outputs::Display::DisplayType::SVideo: return Configurable::Display::SVideo;
- case Outputs::Display::DisplayType::CompositeColour: return Configurable::Display::CompositeColour;
+ case Outputs::Display::DisplayType::SVideo: return Configurable::Display::SVideo;
+ case Outputs::Display::DisplayType::CompositeColour: return Configurable::Display::CompositeColour;
case Outputs::Display::DisplayType::CompositeMonochrome: return Configurable::Display::CompositeMonochrome;
}
}
diff --git a/Machines/Sinclair/ZXSpectrum/ZXSpectrum.cpp b/Machines/Sinclair/ZXSpectrum/ZXSpectrum.cpp
index f9dd98cd9..2bbf4a405 100644
--- a/Machines/Sinclair/ZXSpectrum/ZXSpectrum.cpp
+++ b/Machines/Sinclair/ZXSpectrum/ZXSpectrum.cpp
@@ -119,7 +119,7 @@ using CharacterMapper = Sinclair::ZX::Keyboard::CharacterMapper;
template<Model model> class ConcreteMachine:
public Activity::Source,
- public ClockingHint::Observer,
+ public ClockingHint::Observer,
public Configurable::Device,
public CPU::Z80::BusHandler,
public Machine,
@@ -153,7 +153,7 @@ template<Model model> class ConcreteMachine:
case Model::OneTwoEightK: rom_name = ROM::Name::Spectrum128k; break;
case Model::Plus2: rom_name = ROM::Name::SpecrumPlus2; break;
case Model::Plus2a:
- case Model::Plus3: rom_name = ROM::Name::SpectrumPlus3; break;
+ case Model::Plus3: rom_name = ROM::Name::SpectrumPlus3; break;
// TODO: possibly accept the +3 ROM in multiple parts?
}
const auto request = ROM::Request(rom_name);
diff --git a/Machines/Utility/ROMCatalogue.cpp b/Machines/Utility/ROMCatalogue.cpp
index e4f4b3a2e..e5b20cb8d 100644
--- a/Machines/Utility/ROMCatalogue.cpp
+++ b/Machines/Utility/ROMCatalogue.cpp
@@ -523,16 +523,16 @@ Description::Description(Name name) {
case Name::Spectrum48k: *this = Description(name, "ZXSpectrum", "the 48kb ROM", "48.rom", 16 * 1024, 0xddee531fu); break;
case Name::Spectrum128k: *this = Description(name, "ZXSpectrum", "the 128kb ROM", "128.rom", 32 * 1024, 0x2cbe8995u); break;
- case Name::SpecrumPlus2: *this = Description(name, "ZXSpectrum", "the +2 ROM", "plus2.rom", 32 * 1024, 0xe7a517dcu); break;
+ case Name::SpecrumPlus2: *this = Description(name, "ZXSpectrum", "the +2 ROM", "plus2.rom", 32 * 1024, 0xe7a517dcu); break;
case Name::SpectrumPlus3: {
const std::initializer_list<uint32_t> crcs = { 0x96e3c17a, 0xbe0d9ec4 };
*this = Description(name, "ZXSpectrum", "the +2a/+3 ROM", "plus3.rom", 64 * 1024, crcs);
} break;
- case Name::AcornBASICII: *this = Description(name, "Electron", "the Acorn BASIC II ROM", "basic.rom", 16*1024, 0x79434781u); break;
- case Name::PRESADFSSlot1: *this = Description(name, "Electron", "the E00 ADFS ROM, first slot", "ADFS-E00_1.rom", 16*1024, 0x51523993u); break;
+ case Name::AcornBASICII: *this = Description(name, "Electron", "the Acorn BASIC II ROM", "basic.rom", 16*1024, 0x79434781u); break;
+ case Name::PRESADFSSlot1: *this = Description(name, "Electron", "the E00 ADFS ROM, first slot", "ADFS-E00_1.rom", 16*1024, 0x51523993u); break;
case Name::PRESADFSSlot2: *this = Description(name, "Electron", "the E00 ADFS ROM, second slot", "ADFS-E00_2.rom", 16*1024, 0x8d17de0eu); break;
- case Name::AcornADFS: *this = Description(name, "Electron", "the Acorn ADFS ROM", "adfs.rom", 16*1024, 0x3289bdc6u); break;
+ case Name::AcornADFS: *this = Description(name, "Electron", "the Acorn ADFS ROM", "adfs.rom", 16*1024, 0x3289bdc6u); break;
case Name::Acorn1770DFS: *this = Description(name, "Electron", "the 1770 DFS ROM", "DFS-1770-2.20.rom", 16*1024, 0xf3dc9bc5u); break;
case Name::PRESAdvancedPlus6:
*this = Description(name, "Electron", "the 8kb Advanced Plus 6 ROM", "AP6v133.rom", 8*1024, 0xe0013cfcu);
@@ -542,7 +542,7 @@ Description::Description(Name name) {
break;
case Name::MasterSystemJapaneseBIOS: *this = Description(name, "MasterSystem", "the Japanese Master System BIOS", "japanese-bios.sms", 8*1024, 0x48d44a13u); break;
- case Name::MasterSystemWesternBIOS: *this = Description(name, "MasterSystem", "the European/US Master System BIOS", "bios.sms", 8*1024, 0x0072ed54u); break;
+ case Name::MasterSystemWesternBIOS: *this = Description(name, "MasterSystem", "the European/US Master System BIOS", "bios.sms", 8*1024, 0x0072ed54u); break;
case Name::Commodore1540: *this = Description(name, "Commodore1540", "the 1540 ROM", "1540.bin", 16*1024, 0x718d42b1u); break;
case Name::Commodore1541: *this = Description(name, "Commodore1540", "the 1541 ROM", "1541.bin", 16*1024, 0xfb760019); break;
diff --git a/Numeric/BitReverse.hpp b/Numeric/BitReverse.hpp
index 440501f1b..af8350918 100644
--- a/Numeric/BitReverse.hpp
+++ b/Numeric/BitReverse.hpp
@@ -19,7 +19,7 @@ template <typename IntT> constexpr IntT bit_reverse(IntT source);
// The single-byte specialisation uses a lookup table.
template<> constexpr uint8_t bit_reverse<uint8_t>(uint8_t source) {
- struct ReverseTable {
+ struct ReverseTable {
static constexpr std::array<uint8_t, 256> reverse_table() {
std::array<uint8_t, 256> map{};
for(std::size_t c = 0; c < 256; ++c) {
@@ -36,7 +36,7 @@ template<> constexpr uint8_t bit_reverse<uint8_t>(uint8_t source) {
}
return map;
}
- };
+ };
const std::array<uint8_t, 256> map = ReverseTable::reverse_table();
return map[source];
diff --git a/OSBindings/Mac/Clock Signal/Documents/MachineDocument.swift b/OSBindings/Mac/Clock Signal/Documents/MachineDocument.swift
index 669b49ab3..5397eb4be 100644
--- a/OSBindings/Mac/Clock Signal/Documents/MachineDocument.swift
+++ b/OSBindings/Mac/Clock Signal/Documents/MachineDocument.swift
@@ -250,7 +250,7 @@ class MachineDocument:
// but may be triggered on an arbitrary thread by a running machine, and that
// running machine may not be able to stop running until it has been called
// (e.g. if it is currently trying to run_until an audio event). Break the
- // deadlock with an async dispatch.
+ // deadlock with an async dispatch.
DispatchQueue.main.async {
self.setupAudioQueueClockRate()
}
diff --git a/OSBindings/Mac/Clock Signal/Joystick Manager/CSJoystickManager.m b/OSBindings/Mac/Clock Signal/Joystick Manager/CSJoystickManager.m
index 0c1d8c4a7..3fd0407f4 100644
--- a/OSBindings/Mac/Clock Signal/Joystick Manager/CSJoystickManager.m
+++ b/OSBindings/Mac/Clock Signal/Joystick Manager/CSJoystickManager.m
@@ -326,7 +326,7 @@ API_AVAILABLE(macos(11.0))
@end
-@implementation CSGCJoystickButton
+@implementation CSGCJoystickButton
- (instancetype)initWithButton:(GCDeviceButtonInput*)element index:(NSInteger)index {
self = [super initWithIndex:index];
@@ -469,7 +469,7 @@ static void DeviceRemoved(void *context, IOReturn result, void *sender, IOHIDDev
- (void)controllerDidConnect:(NSNotification *)note {
GCController *controller = note.object;
-
+
// Double check this joystick isn't already known.
for(CSGCJoystick *joystick in _joysticks) {
if (![joystick isKindOfClass:[CSGCJoystick class]]) {
@@ -491,23 +491,23 @@ static void DeviceRemoved(void *context, IOReturn result, void *sender, IOHIDDev
[buttons addObject:[[CSGCJoystickButton alloc] initWithButton:gp.buttonB index:2]];
[buttons addObject:[[CSGCJoystickButton alloc] initWithButton:gp.buttonX index:3]];
[buttons addObject:[[CSGCJoystickButton alloc] initWithButton:gp.buttonY index:4]];
-
+
[hats addObject:[[CSGCJoystickHat alloc] initWithDirectionPad:gp.dpad]];
-
+
[axes addObject:[[CSGCJoystickAxis alloc] initWithAxis:gp.leftThumbstick.xAxis type:CSJoystickAxisTypeX]];
[axes addObject:[[CSGCJoystickAxis alloc] initWithAxis:gp.leftThumbstick.yAxis type:CSJoystickAxisTypeY]];
[axes addObject:[[CSGCJoystickAxis alloc] initWithAxis:gp.rightThumbstick.xAxis type:CSJoystickAxisTypeZ]];
} else {
return;
}
-
+
// Add this joystick to the list.
[_joysticks addObject:[[CSGCJoystick alloc] initWithButtons:buttons axes:axes hats:hats device:controller]];
}
- (void)controllerDidDisconnect:(NSNotification *)note {
GCController *controller = note.object;
-
+
// If this joystick was recorded, remove it.
for(CSGCJoystick *joystick in [_joysticks copy]) {
if (![joystick isKindOfClass:[CSGCJoystick class]]) {
diff --git a/OSBindings/Mac/Clock Signal/ScanTarget/CSScanTarget.mm b/OSBindings/Mac/Clock Signal/ScanTarget/CSScanTarget.mm
index 96f253089..afe3a9ef5 100644
--- a/OSBindings/Mac/Clock Signal/ScanTarget/CSScanTarget.mm
+++ b/OSBindings/Mac/Clock Signal/ScanTarget/CSScanTarget.mm
@@ -693,9 +693,9 @@ using BufferingScanTarget = Outputs::Display::BufferingScanTarget;
};
const FragmentSamplerDictionary samplerDictionary[8] = {
// Composite formats.
- {@"compositeSampleLuminance1", nil, @"sampleLuminance1", @"sampleLuminance1", @"sampleLuminance1", @"sampleLuminance1"},
- {@"compositeSampleLuminance8", nil, @"sampleLuminance8", @"sampleLuminance8WithGamma", @"sampleLuminance8", @"sampleLuminance8WithGamma"},
- {@"compositeSamplePhaseLinkedLuminance8", nil, @"samplePhaseLinkedLuminance8", @"samplePhaseLinkedLuminance8WithGamma", @"samplePhaseLinkedLuminance8", @"samplePhaseLinkedLuminance8WithGamma"},
+ {@"compositeSampleLuminance1", nil, @"sampleLuminance1", @"sampleLuminance1", @"sampleLuminance1", @"sampleLuminance1"},
+ {@"compositeSampleLuminance8", nil, @"sampleLuminance8", @"sampleLuminance8WithGamma", @"sampleLuminance8", @"sampleLuminance8WithGamma"},
+ {@"compositeSamplePhaseLinkedLuminance8", nil, @"samplePhaseLinkedLuminance8", @"samplePhaseLinkedLuminance8WithGamma", @"samplePhaseLinkedLuminance8", @"samplePhaseLinkedLuminance8WithGamma"},
// S-Video formats.
{@"compositeSampleLuminance8Phase8", @"sampleLuminance8Phase8", @"directCompositeSampleLuminance8Phase8", @"directCompositeSampleLuminance8Phase8WithGamma", @"directCompositeSampleLuminance8Phase8", @"directCompositeSampleLuminance8Phase8WithGamma"},
@@ -808,7 +808,7 @@ using BufferingScanTarget = Outputs::Display::BufferingScanTarget;
if(_pipeline != Pipeline::DirectToDisplay) {
// Create the composition render pass.
- pipelineDescriptor.colorAttachments[0].pixelFormat = _compositionTexture.pixelFormat;
+ pipelineDescriptor.colorAttachments[0].pixelFormat = _compositionTexture.pixelFormat;
pipelineDescriptor.vertexFunction = [library newFunctionWithName:@"scanToComposition"];
pipelineDescriptor.fragmentFunction =
[library newFunctionWithName:isSVideoOutput ? samplerDictionary[int(modals.input_data_type)].compositionSVideo : samplerDictionary[int(modals.input_data_type)].compositionComposite];
diff --git a/OSBindings/Mac/Clock Signal/ScanTarget/ScanTarget.metal b/OSBindings/Mac/Clock Signal/ScanTarget/ScanTarget.metal
index cab2225de..25e1cb387 100644
--- a/OSBindings/Mac/Clock Signal/ScanTarget/ScanTarget.metal
+++ b/OSBindings/Mac/Clock Signal/ScanTarget/ScanTarget.metal
@@ -380,12 +380,12 @@ half3 convertRed1Green1Blue1(SourceInterpolator vert, texture2d<ushort> texture)
} \
\
fragment half4 directCompositeSample##name(SourceInterpolator vert [[stage_in]], texture2d<pixelType> texture [[texture(0)]], constant Uniforms &uniforms [[buffer(0)]]) { \
- const half level = composite##name(vert, texture, uniforms, quadrature(vert.colourPhase)); \
+ const half level = composite##name(vert, texture, uniforms, quadrature(vert.colourPhase)); \
return half4(half3(level), uniforms.outputAlpha); \
} \
\
fragment half4 directCompositeSample##name##WithGamma(SourceInterpolator vert [[stage_in]], texture2d<pixelType> texture [[texture(0)]], constant Uniforms &uniforms [[buffer(0)]]) { \
- const half level = pow(composite##name(vert, texture, uniforms, quadrature(vert.colourPhase)), uniforms.outputGamma); \
+ const half level = pow(composite##name(vert, texture, uniforms, quadrature(vert.colourPhase)), uniforms.outputGamma); \
return half4(half3(level), uniforms.outputAlpha); \
}
diff --git a/OSBindings/Mac/Clock SignalTests/6522Tests.swift b/OSBindings/Mac/Clock SignalTests/6522Tests.swift
index 7126a09c5..09ef644ac 100644
--- a/OSBindings/Mac/Clock SignalTests/6522Tests.swift
+++ b/OSBindings/Mac/Clock SignalTests/6522Tests.swift
@@ -200,7 +200,7 @@ class MOS6522Tests: XCTestCase {
// Conclusions:
//
// after inital ACR and port B value: [original data if not in PB7 output mode, otherwise 1]
- // after starting timer 1: [original data if not in PB7 output mode, otherwise 0]
+ // after starting timer 1: [original data if not in PB7 output mode, otherwise 0]
// after final ACR value: [original data if not in PB7 output mode, 1 if has transitioned to PB7 mode, 0 if was already in PB7 mode]
// after timer 1 expiry: [original data if not in PB7 mode, 1 if timer has expired while in PB7 mode]
//
diff --git a/OSBindings/Mac/Clock SignalTests/68000 Comparative Tests/readme.md b/OSBindings/Mac/Clock SignalTests/68000 Comparative Tests/readme.md
index c50378092..75d3e49be 100644
--- a/OSBindings/Mac/Clock SignalTests/68000 Comparative Tests/readme.md
+++ b/OSBindings/Mac/Clock SignalTests/68000 Comparative Tests/readme.md
@@ -38,7 +38,7 @@ Every generated opcode is followed by three words of mostly-random data; this da
All initial register contents are random except that the lowest bit is never set, to avoid accidental address errors.
-So the output is very scattergun approach, with a lot of redundancy.
+So the output is very scattergun approach, with a lot of redundancy.
## Known Issues
diff --git a/OSBindings/Mac/Clock SignalTests/68000ComparativeTests.mm b/OSBindings/Mac/Clock SignalTests/68000ComparativeTests.mm
index a7ec30320..a85808242 100644
--- a/OSBindings/Mac/Clock SignalTests/68000ComparativeTests.mm
+++ b/OSBindings/Mac/Clock SignalTests/68000ComparativeTests.mm
@@ -177,7 +177,7 @@ struct TestProcessor: public CPU::MC68000::BusHandler {
// NSLog(@"Testing %@", url);
[self testJSONAtURL:url];
}
-
+
XCTAssert(_failures.count == 0);
// Output a summary of failures, if any.
diff --git a/OSBindings/Mac/Clock SignalTests/IIgs Memory Map/readme.md b/OSBindings/Mac/Clock SignalTests/IIgs Memory Map/readme.md
index 2703f97ec..d26e39c01 100644
--- a/OSBindings/Mac/Clock SignalTests/IIgs Memory Map/readme.md
+++ b/OSBindings/Mac/Clock SignalTests/IIgs Memory Map/readme.md
@@ -93,4 +93,4 @@ Starting from a default value of `false`, that means:
* memory remained un-[shadowed/IO] for until page 4 (i.e. pages 0–3);
* it was then marked as [shadowed/IO] until page 12 (i.e. pages 4–11);
* it was then un-[shadowed/IO] to page 32;
-* ...etc.
\ No newline at end of file
+* ...etc.
diff --git a/OSBindings/Mac/Clock SignalTests/IIgsMemoryMapTests.mm b/OSBindings/Mac/Clock SignalTests/IIgsMemoryMapTests.mm
index 5ddad5608..58ebbe4d8 100644
--- a/OSBindings/Mac/Clock SignalTests/IIgsMemoryMapTests.mm
+++ b/OSBindings/Mac/Clock SignalTests/IIgsMemoryMapTests.mm
@@ -154,7 +154,7 @@ namespace {
[self write:value address:c];
XCTAssertEqual(_ram[c], value);
}
-
+
// Reset.
memset(_ram.data(), 0, 128*1024);
diff --git a/OSBindings/Mac/Clock SignalTests/WolfgangLorenzTests.swift b/OSBindings/Mac/Clock SignalTests/WolfgangLorenzTests.swift
index b89bf83b3..127bb5a14 100644
--- a/OSBindings/Mac/Clock SignalTests/WolfgangLorenzTests.swift
+++ b/OSBindings/Mac/Clock SignalTests/WolfgangLorenzTests.swift
@@ -375,7 +375,7 @@ class WolfgangLorenzTests: XCTestCase, CSTestMachineTrapHandler {
let bundle = Bundle(for: type(of: self))
let mainBundle = Bundle.main
- if let testFilename = bundle.url(forResource: name, withExtension: nil),
+ if let testFilename = bundle.url(forResource: name, withExtension: nil),
let kernelFilename = mainBundle.url(forResource: "kernal.901227-02", withExtension: "bin", subdirectory: "ROMImages/Commodore64") {
if let testData = try? Data(contentsOf: testFilename), let kernelData = try? Data(contentsOf: kernelFilename) {
diff --git a/OSBindings/Mac/Clock SignalTests/Z80MemptrTests.swift b/OSBindings/Mac/Clock SignalTests/Z80MemptrTests.swift
index 2f9a460cf..546efa40c 100644
--- a/OSBindings/Mac/Clock SignalTests/Z80MemptrTests.swift
+++ b/OSBindings/Mac/Clock SignalTests/Z80MemptrTests.swift
@@ -141,7 +141,7 @@ class Z80MemptrTester: XCTestCase {
0xb1, // CPIR
0xb2, // INIR
0xb3, // OUIR
- 0xb8, // LDDR
+ 0xb8, // LDDR
0xb9, // CPDR
0xba, // INDR
0xbb, // OTDR
diff --git a/OSBindings/Mac/Clock SignalTests/x86DecoderTests.mm b/OSBindings/Mac/Clock SignalTests/x86DecoderTests.mm
index 77118a266..e1080c3bf 100644
--- a/OSBindings/Mac/Clock SignalTests/x86DecoderTests.mm
+++ b/OSBindings/Mac/Clock SignalTests/x86DecoderTests.mm
@@ -180,8 +180,8 @@ decode(const std::initializer_list<uint8_t> &stream, bool set_32_bit = false) {
test(instructions[11], DataSize::Word, Operation::XCHG, Source::eAX, Source::eSP);
// ODA has:
- // c4 (bad)
- // d4 93 aam $0x93
+ // c4 (bad)
+ // d4 93 aam $0x93
//
// That assumes that upon discovering that the d4 doesn't make a valid LES,
// it can become an instruction byte. I'm not persuaded. So I'm taking:
diff --git a/Outputs/Log.hpp b/Outputs/Log.hpp
index 8d3ed3f75..0ff0b008b 100644
--- a/Outputs/Log.hpp
+++ b/Outputs/Log.hpp
@@ -24,7 +24,7 @@
#include <iomanip>
#define PADHEX(n) std::hex << std::setfill('0') << std::setw(n)
-#define PADDEC(n) std::dec << std::setfill('0') << std::setw(n)
+#define PADDEC(n) std::dec << std::setfill('0') << std::setw(n)
#ifdef LOG_PREFIX
diff --git a/Outputs/OpenGL/ScanTargetGLSLFragments.cpp b/Outputs/OpenGL/ScanTargetGLSLFragments.cpp
index bdfd5649a..70432da83 100644
--- a/Outputs/OpenGL/ScanTargetGLSLFragments.cpp
+++ b/Outputs/OpenGL/ScanTargetGLSLFragments.cpp
@@ -316,7 +316,7 @@ std::unique_ptr<Shader> ScanTarget::conversion_shader() const {
"out float compositeAngle;"
"out float compositeAmplitude;"
"out float oneOverCompositeAmplitude;"
-
+
"uniform float angleOffsets[4];";
fragment_shader +=
"in float compositeAngle;"
diff --git a/Processors/6502/AllRAM/6502AllRAM.hpp b/Processors/6502/AllRAM/6502AllRAM.hpp
index fbf40daca..420e2633c 100644
--- a/Processors/6502/AllRAM/6502AllRAM.hpp
+++ b/Processors/6502/AllRAM/6502AllRAM.hpp
@@ -28,8 +28,6 @@ class AllRAMProcessor:
virtual uint16_t value_of(Register r) = 0;
virtual void set_value_of(Register r, uint16_t value) = 0;
-
-
protected:
AllRAMProcessor(size_t memory_size) : ::CPU::AllRAMProcessor(memory_size) {}
};
diff --git a/Processors/6502/Implementation/6502Implementation.hpp b/Processors/6502/Implementation/6502Implementation.hpp
index b7e1f4707..45e8dcf12 100644
--- a/Processors/6502/Implementation/6502Implementation.hpp
+++ b/Processors/6502/Implementation/6502Implementation.hpp
@@ -421,12 +421,12 @@ template <Personality personality, typename T, bool uses_ready_line> void Proces
case OperationINC: operand_++; flags_.set_nz(operand_); continue;
case OperationDEC: operand_--; flags_.set_nz(operand_); continue;
- case OperationINA: a_++; flags_.set_nz(a_); continue;
- case OperationDEA: a_--; flags_.set_nz(a_); continue;
- case OperationINX: x_++; flags_.set_nz(x_); continue;
- case OperationDEX: x_--; flags_.set_nz(x_); continue;
- case OperationINY: y_++; flags_.set_nz(y_); continue;
- case OperationDEY: y_--; flags_.set_nz(y_); continue;
+ case OperationINA: a_++; flags_.set_nz(a_); continue;
+ case OperationDEA: a_--; flags_.set_nz(a_); continue;
+ case OperationINX: x_++; flags_.set_nz(x_); continue;
+ case OperationDEX: x_--; flags_.set_nz(x_); continue;
+ case OperationINY: y_++; flags_.set_nz(y_); continue;
+ case OperationDEY: y_--; flags_.set_nz(y_); continue;
case OperationANE:
a_ = (a_ | 0xee) & operand_ & x_;
diff --git a/Processors/65816/Implementation/65816Implementation.hpp b/Processors/65816/Implementation/65816Implementation.hpp
index f4575f337..bbb9dcedc 100644
--- a/Processors/65816/Implementation/65816Implementation.hpp
+++ b/Processors/65816/Implementation/65816Implementation.hpp
@@ -504,7 +504,7 @@ template <typename BusHandler, bool uses_ready_line> void Processor<BusHandler,
// Performance.
//
-#define LDA(src) registers_.a.full = (registers_.a.full & registers_.m_masks[0]) | (src & registers_.m_masks[1])
+#define LDA(src) registers_.a.full = (registers_.a.full & registers_.m_masks[0]) | (src & registers_.m_masks[1])
#define LDXY(dest, src) dest = (src) & registers_.x_mask
case OperationPerform:
diff --git a/Processors/65816/Implementation/65816Storage.hpp b/Processors/65816/Implementation/65816Storage.hpp
index ef8c7ed9b..35d4570b6 100644
--- a/Processors/65816/Implementation/65816Storage.hpp
+++ b/Processors/65816/Implementation/65816Storage.hpp
@@ -80,8 +80,8 @@ enum MicroOp: uint8_t {
OperationConstructAbsoluteLongX,
/// Calculates an a, x address; if:
- /// there was no carry into the top byte of the address; and
- /// the process or in emulation or 8-bit index mode;
+ /// there was no carry into the top byte of the address; and
+ /// the process or in emulation or 8-bit index mode;
/// then it also skips the next micro-op.
OperationConstructAbsoluteXRead,
diff --git a/Processors/68000/68000.hpp b/Processors/68000/68000.hpp
index 263ec3588..84c152662 100644
--- a/Processors/68000/68000.hpp
+++ b/Processors/68000/68000.hpp
@@ -53,7 +53,7 @@ struct Microcycle {
static constexpr OperationT SelectWord = 1 << 1;
/// If set, indicates a read. Otherwise, a write.
- static constexpr OperationT Read = 1 << 2;
+ static constexpr OperationT Read = 1 << 2;
// Two-bit gap deliberately left here for PermitRead/Write below.
@@ -69,10 +69,10 @@ struct Microcycle {
static constexpr OperationT Reset = 1 << 7;
/// Contains the value of line FC0 if it is not implicit via InterruptAcknowledge.
- static constexpr OperationT IsData = 1 << 8;
+ static constexpr OperationT IsData = 1 << 8;
/// Contains the value of line FC1 if it is not implicit via InterruptAcknowledge.
- static constexpr OperationT IsProgram = 1 << 9;
+ static constexpr OperationT IsProgram = 1 << 9;
/// The interrupt acknowledge cycle is that during which the 68000 seeks to obtain the vector for
/// an interrupt it plans to observe. Noted on a real 68000 by all FCs being set to 1.
@@ -80,7 +80,7 @@ struct Microcycle {
/// Represents the state of the 68000's valid memory address line — indicating whether this microcycle
/// is synchronised with the E clock to satisfy a valid peripheral address request.
- static constexpr OperationT IsPeripheral = 1 << 11;
+ static constexpr OperationT IsPeripheral = 1 << 11;
/// Provides the 68000's bus grant line — indicating whether a bus request has been acknowledged.
static constexpr OperationT BusGrant = 1 << 12;
@@ -292,7 +292,7 @@ struct Microcycle {
// PermitRead and PermitWrite are used as part of the read/write mask
// supplied to @c apply; they are picked to be small enough values that
// a byte can be used for storage.
- static constexpr OperationT PermitRead = 1 << 3;
+ static constexpr OperationT PermitRead = 1 << 3;
static constexpr OperationT PermitWrite = 1 << 4;
/*!
diff --git a/Processors/68000/Implementation/68000Implementation.hpp b/Processors/68000/Implementation/68000Implementation.hpp
index 0fa7bfb02..cd28afa2d 100644
--- a/Processors/68000/Implementation/68000Implementation.hpp
+++ b/Processors/68000/Implementation/68000Implementation.hpp
@@ -482,7 +482,7 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
// So the below is a cross-your-fingers guess based on the constraints
// that the information writen, from lowest address to highest is:
//
- // R/W, I/N, function code word; [at -14]
+ // R/W, I/N, function code word; [at -14]
// access address; [-12]
// instruction register; [-8]
// status register; [-6]
@@ -716,9 +716,9 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
static_assert( \
InstructionSet::M68k::operand_flags<InstructionSet::M68k::Model::M68000, InstructionSet::M68k::Operation::x>() == \
InstructionSet::M68k::operand_flags<InstructionSet::M68k::Model::M68000, InstructionSet::M68k::Operation::y>() && \
- InstructionSet::M68k::operand_size<InstructionSet::M68k::Operation::x>() == \
+ InstructionSet::M68k::operand_size<InstructionSet::M68k::Operation::x>() == \
InstructionSet::M68k::operand_size<InstructionSet::M68k::Operation::y>() && \
- InstructionSet::M68k::requires_supervisor<InstructionSet::M68k::Model::M68000>(InstructionSet::M68k::Operation::x) == \
+ InstructionSet::M68k::requires_supervisor<InstructionSet::M68k::Model::M68000>(InstructionSet::M68k::Operation::x) == \
InstructionSet::M68k::requires_supervisor<InstructionSet::M68k::Model::M68000>(InstructionSet::M68k::Operation::y) \
); \
[[fallthrough]];
@@ -751,10 +751,10 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
})
Duplicate(CLRb, NEGXb) Duplicate(NEGb, NEGXb) Duplicate(NOTb, NEGXb)
- StdCASE(NEGXb, perform_state_ = Perform_np);
+ StdCASE(NEGXb, perform_state_ = Perform_np);
Duplicate(CLRw, NEGXw) Duplicate(NEGw, NEGXw) Duplicate(NOTw, NEGXw)
- StdCASE(NEGXw, perform_state_ = Perform_np);
+ StdCASE(NEGXw, perform_state_ = Perform_np);
Duplicate(CLRl, NEGXl) Duplicate(NEGl, NEGXl) Duplicate(NOTl, NEGXl)
StdCASE(NEGXl,
@@ -765,11 +765,11 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
}
);
- StdCASE(SWAP, perform_state_ = Perform_np);
- StdCASE(EXG, perform_state_ = Perform_np_n);
+ StdCASE(SWAP, perform_state_ = Perform_np);
+ StdCASE(EXG, perform_state_ = Perform_np_n);
- StdCASE(EXTbtow, perform_state_ = Perform_np);
- StdCASE(EXTwtol, perform_state_ = Perform_np);
+ StdCASE(EXTbtow, perform_state_ = Perform_np);
+ StdCASE(EXTwtol, perform_state_ = Perform_np);
StdCASE(MOVEb, perform_state_ = MOVE_b);
Duplicate(MOVEAw, MOVEw)
@@ -987,10 +987,10 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
});
Duplicate(ORItoCCR, EORItoCCR); Duplicate(ANDItoCCR, EORItoCCR);
- StdCASE(EORItoCCR, perform_state_ = LogicalToSR);
+ StdCASE(EORItoCCR, perform_state_ = LogicalToSR);
Duplicate(ORItoSR, EORItoSR); Duplicate(ANDItoSR, EORItoSR);
- StdCASE(EORItoSR, perform_state_ = LogicalToSR);
+ StdCASE(EORItoSR, perform_state_ = LogicalToSR);
StdCASE(MOVEMtoRl, perform_state_ = MOVEMtoR);
StdCASE(MOVEMtoRw, perform_state_ = MOVEMtoR);
@@ -1032,8 +1032,8 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
}
});
- StdCASE(MOVEtoCCR, perform_state_ = MOVEtoCCRSR);
- StdCASE(MOVEtoSR, perform_state_ = MOVEtoCCRSR);
+ StdCASE(MOVEtoCCR, perform_state_ = MOVEtoCCRSR);
+ StdCASE(MOVEtoSR, perform_state_ = MOVEtoCCRSR);
StdCASE(MOVEfromSR, {
if(instruction_.mode(0) == Mode::DataRegisterDirect) {
perform_state_ = Perform_np_n;
diff --git a/Storage/MassStorage/Formats/HFV.cpp b/Storage/MassStorage/Formats/HFV.cpp
index f4e3b9ae0..3aa8b6f0b 100644
--- a/Storage/MassStorage/Formats/HFV.cpp
+++ b/Storage/MassStorage/Formats/HFV.cpp
@@ -51,7 +51,7 @@ void HFV::set_block(size_t address, const std::vector<uint8_t> &contents) {
file_.write(contents);
} else {
writes_[address] = contents;
- }
+ }
}
void HFV::set_drive_type(Encodings::Macintosh::DriveType drive_type) {
diff --git a/Storage/MassStorage/SCSI/SCSI.hpp b/Storage/MassStorage/SCSI/SCSI.hpp
index f1fc87ef5..c1ca512fc 100644
--- a/Storage/MassStorage/SCSI/SCSI.hpp
+++ b/Storage/MassStorage/SCSI/SCSI.hpp
@@ -20,7 +20,7 @@
namespace SCSI {
/// Provides the current state of the SCSI bus, being comprised of a bitwise combination
-/// of zero or more of the @c BusState flags defined below.
+/// of zero or more of the @c BusState flags defined below.
typedef int BusState;
constexpr BusState DefaultBusState = 0;
@@ -34,9 +34,9 @@ constexpr BusState DefaultBusState = 0;
*/
enum Line: BusState {
/// Provides the value currently on the data lines.
- Data = 0xff,
+ Data = 0xff,
/// Parity of the data lines.
- Parity = 1 << 8,
+ Parity = 1 << 8,
/// Set if the SEL line is currently selecting a target.
/// Reset if it is selecting an initiator.
SelectTarget = 1 << 9,
diff --git a/Storage/MassStorage/SCSI/TargetImplementation.hpp b/Storage/MassStorage/SCSI/TargetImplementation.hpp
index 5a4596d1a..11a4b2904 100644
--- a/Storage/MassStorage/SCSI/TargetImplementation.hpp
+++ b/Storage/MassStorage/SCSI/TargetImplementation.hpp
@@ -139,7 +139,7 @@ template <typename Executor> void Target<Executor>::scsi_bus_did_change(Bus *, B
bus_state_ &= ~0xff;
switch(phase_) {
- case Phase::SendingData: bus_state_ |= data_[data_pointer_]; break;
+ case Phase::SendingData: bus_state_ |= data_[data_pointer_]; break;
case Phase::SendingStatus: bus_state_ |= BusState(status_); break;
default:
case Phase::SendingMessage: bus_state_ |= BusState(message_); break;
diff --git a/Storage/State/Z80.cpp b/Storage/State/Z80.cpp
index e402142ed..cc2e9cbfb 100644
--- a/Storage/State/Z80.cpp
+++ b/Storage/State/Z80.cpp
@@ -96,7 +96,7 @@ std::unique_ptr<Analyser::Static::Target> Z80::load(const std::string &file_name
// Ignored from the next byte:
//
- // bit 2 = 1 => issue 2 emulation
+ // bit 2 = 1 => issue 2 emulation
// bit 3 = 1 => double interrupt frequency (?)
// bit 4–5 => video synchronisation (to do with emulation hackery?)
// bit 6–7 => joystick type