diff --git a/Analyser/Static/AmstradCPC/Target.hpp b/Analyser/Static/AmstradCPC/Target.hpp index 9bffa3358..6db95805c 100644 --- a/Analyser/Static/AmstradCPC/Target.hpp +++ b/Analyser/Static/AmstradCPC/Target.hpp @@ -20,10 +20,18 @@ struct Target: public Analyser::Static::Target, public Reflection::StructImpl cl } } else { line_counter_ = (line_counter_ + 1) & 0x7f; + } - // Check for start of vertical sync. - if(line_counter_ == layout_.vertical.start_sync) { - bus_state_.vsync = true; - vsync_counter_ = 0; - } + // Check for start of vertical sync. + if(line_counter_ == layout_.vertical.start_sync) { + bus_state_.vsync = true; + vsync_counter_ = 0; + } - // Check for end of visible lines. - if(line_counter_ == layout_.vertical.displayed) { - line_is_visible_ = false; - } + // Check for end of visible lines. + if(line_counter_ == layout_.vertical.displayed) { + line_is_visible_ = false; } } else { bus_state_.row_address = (bus_state_.row_address + 1) & 0x1f; diff --git a/Machines/AmstradCPC/AmstradCPC.cpp b/Machines/AmstradCPC/AmstradCPC.cpp index e38d870ca..db780a0ab 100644 --- a/Machines/AmstradCPC/AmstradCPC.cpp +++ b/Machines/AmstradCPC/AmstradCPC.cpp @@ -752,7 +752,8 @@ class i8255PortHandler : public Intel::i8255::PortHandler { /*! The actual Amstrad CPC implementation; tying the 8255, 6845 and AY to the Z80. */ -template class ConcreteMachine: +template +class ConcreteMachine: public MachineTypes::ScanProducer, public MachineTypes::AudioProducer, public MachineTypes::TimedMachine, @@ -942,6 +943,39 @@ template class ConcreteMachine: *cycle.value = 0xc9; break; } + + if constexpr (catches_ssm) { + ssm_code_ = (ssm_code_ << 8) | read_pointers_[address >> 14][address & 16383]; + if(ssm_delegate_) { + if((ssm_code_ & 0xff00ff00) == 0xed00ed00) { + const auto code = uint16_t( + ((ssm_code_ << 8) & 0xff00) | ((ssm_code_ >> 16) & 0x00ff) + ); + + const auto is_valid = [](uint8_t digit) { + return + (digit <= 0x3f) || + (digit >= 0x7f && digit <= 0x9f) || + (digit >= 0xa4 && digit <= 0xa7) || + (digit >= 0xac && digit <= 0xaf) || + (digit >= 0xb4 && digit <= 0xb7) || + (digit >= 0xbc && digit <= 0xbf) || + (digit >= 0xc0 && digit <= 0xfd); + }; + + if( + is_valid(static_cast(code)) && is_valid(static_cast(code >> 8)) + ) { + ssm_delegate_->perform(code); + ssm_code_ = 0; + } + } + } else if((ssm_code_ & 0xffff) == 0xedfe) { + ssm_delegate_->perform(0xfffe); + } else if((ssm_code_ & 0xffff) == 0xedff) { + ssm_delegate_->perform(0xffff); + } + } [[fallthrough]]; case CPU::Z80::PartialMachineCycle::Read: @@ -1115,6 +1149,10 @@ template class ConcreteMachine: tape_player_is_sleeping_ = tape_player_.preferred_clocking() == ClockingHint::Preference::None; } + void set_ssm_delegate(SSMDelegate *delegate) final { + ssm_delegate_ = delegate; + } + // MARK: - Keyboard void type_string(const std::string &string) final { Utility::TypeRecipient::add_typer(string); @@ -1276,6 +1314,9 @@ template class ConcreteMachine: KeyboardState key_state_; AmstradCPC::KeyboardMapper keyboard_mapper_; + SSMDelegate *ssm_delegate_ = nullptr; + uint32_t ssm_code_ = 0; + bool has_run_ = false; uint8_t ram_[128 * 1024]; }; @@ -1284,12 +1325,26 @@ template class ConcreteMachine: using namespace AmstradCPC; +namespace { + +template +std::unique_ptr machine(const Analyser::Static::AmstradCPC::Target &target, const ROMMachine::ROMFetcher &rom_fetcher) { + using Model = Analyser::Static::AmstradCPC::Target::Model; + switch(target.model) { + default: return std::make_unique>(target, rom_fetcher); + case Model::CPC464: return std::make_unique>(target, rom_fetcher); + } +} + +} + // See header; constructs and returns an instance of the Amstrad CPC. std::unique_ptr Machine::AmstradCPC(const Analyser::Static::Target *target, const ROMMachine::ROMFetcher &rom_fetcher) { using Target = Analyser::Static::AmstradCPC::Target; const Target *const cpc_target = dynamic_cast(target); - switch(cpc_target->model) { - default: return std::make_unique>(*cpc_target, rom_fetcher); - case Target::Model::CPC464: return std::make_unique>(*cpc_target, rom_fetcher); + if(cpc_target->catch_ssm_codes) { + return machine(*cpc_target, rom_fetcher); + } else { + return machine(*cpc_target, rom_fetcher); } } diff --git a/Machines/AmstradCPC/AmstradCPC.hpp b/Machines/AmstradCPC/AmstradCPC.hpp index 33304eeb0..e29b46285 100644 --- a/Machines/AmstradCPC/AmstradCPC.hpp +++ b/Machines/AmstradCPC/AmstradCPC.hpp @@ -25,7 +25,10 @@ class Machine { virtual ~Machine() = default; /// Creates and returns an Amstrad CPC. - static std::unique_ptr AmstradCPC(const Analyser::Static::Target *target, const ROMMachine::ROMFetcher &rom_fetcher); + static std::unique_ptr AmstradCPC( + const Analyser::Static::Target *target, + const ROMMachine::ROMFetcher &rom_fetcher + ); /// Defines the runtime options available for an Amstrad CPC. class Options: @@ -47,6 +50,11 @@ class Machine { } } }; + + struct SSMDelegate { + virtual void perform(uint16_t) = 0; + }; + virtual void set_ssm_delegate(SSMDelegate *) = 0; }; } diff --git a/OSBindings/Mac/Clock Signal.xcodeproj/project.pbxproj b/OSBindings/Mac/Clock Signal.xcodeproj/project.pbxproj index 341d4dbbf..7cd0b9f30 100644 --- a/OSBindings/Mac/Clock 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4B1082C02C1A87CA00B07C5D /* CSL.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = CSL.cpp; sourceTree = ""; }; + 4B1082C12C1A87CA00B07C5D /* CSL.hpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.h; path = CSL.hpp; sourceTree = ""; }; 4B121F9A1E06293F00BFDA12 /* PCMSegmentEventSourceTests.mm */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.objcpp; path = PCMSegmentEventSourceTests.mm; sourceTree = ""; }; 4B12C0EB1FCFA98D005BFD93 /* Keyboard.cpp */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.cpp.cpp; path = Keyboard.cpp; sourceTree = ""; }; 4B12C0EC1FCFA98D005BFD93 /* Keyboard.hpp */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.cpp.h; path = Keyboard.hpp; sourceTree = ""; }; @@ -1644,6 +1730,8 @@ 4B8805F61DCFF6C9003085B1 /* Commodore.hpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.h; path = Commodore.hpp; sourceTree = ""; }; 4B8805F91DCFF807003085B1 /* Oric.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; name = Oric.cpp; path = Parsers/Oric.cpp; sourceTree = ""; }; 4B8805FA1DCFF807003085B1 /* Oric.hpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.h; name = Oric.hpp; path = Parsers/Oric.hpp; sourceTree = ""; }; + 4B882F582C2F9C6900D84031 /* CPCShakerTests.mm */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.objcpp; path = CPCShakerTests.mm; sourceTree = ""; }; + 4B882F5A2C2F9C7700D84031 /* Shaker */ = {isa = PBXFileReference; lastKnownFileType = folder; path = Shaker; sourceTree = ""; }; 4B89449220194A47007DE474 /* CSStaticAnalyser+TargetVector.h */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.c.h; name = "CSStaticAnalyser+TargetVector.h"; path = "StaticAnalyser/CSStaticAnalyser+TargetVector.h"; sourceTree = ""; }; 4B8944E4201967B4007DE474 /* ConfidenceSummary.hpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.h; path = ConfidenceSummary.hpp; sourceTree = ""; }; 4B8944E5201967B4007DE474 /* ConfidenceSource.hpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.h; path = ConfidenceSource.hpp; sourceTree = ""; }; @@ -2688,6 +2776,15 @@ path = Keyboard; sourceTree = ""; }; + 4B1082C22C1A87CA00B07C5D /* Automation */ = { + isa = PBXGroup; + children = ( + 4B1082C02C1A87CA00B07C5D /* CSL.cpp */, + 4B1082C12C1A87CA00B07C5D /* CSL.hpp */, + ); + path = Automation; + sourceTree = ""; + }; 4B1414561B58879D00E04248 /* 6502 */ = { isa = PBXGroup; children = ( @@ -2702,7 +2799,6 @@ 4B1414631B588A1100E04248 /* Test Binaries */ = { isa = PBXGroup; children = ( - 4BB505882B9C0E6F0031C43C /* Messy ARM */, 4B680CE323A555CA00451D43 /* 68000 Comparative Tests */, 4B75F97A280D7C7700121055 /* 68000 Decoding */, 4B683B002727BE6F0043E541 /* Amiga Blitter Tests */, @@ -2711,7 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4B778EF923A5EB740000D260 /* MSA.cpp in Sources */, 4B4DEC07252BFA56004583AC /* 65816Base.cpp in Sources */, 4B7752A628217DF80073E2C5 /* Dave.cpp in Sources */, 4B778F2323A5EDE40000D260 /* Tape.cpp in Sources */, 4B7752A728217E060073E2C5 /* Blitter.cpp in Sources */, + 4B06AAD22C645F190034D014 /* I2C.cpp in Sources */, 4B778F4F23A5F21C0000D260 /* StaticAnalyser.cpp in Sources */, + 4B06AAE72C645FBC0034D014 /* DMAController.cpp in Sources */, 4B8DD3682633B2D400B3C866 /* SpectrumVideoContentionTests.mm in Sources */, + 4B06AB162C6461AB0034D014 /* Keyboard.cpp in Sources */, 4B7752A928217E200073E2C5 /* 65816Storage.cpp in Sources */, + 4B06AAFB2C6460920034D014 /* Keyboard.cpp in Sources */, 4BC62FF228A149300036AE59 /* NSData+dataWithContentsOfGZippedFile.m in Sources */, + 4B06AB152C6461A20034D014 /* MultiKeyboardMachine.cpp in Sources */, 4B7752AC28217E6E0073E2C5 /* StaticAnalyser.cpp in Sources */, 4B778F1223A5EC720000D260 /* CRT.cpp in Sources */, 4B778EF423A5DB3A0000D260 /* C1540.cpp in Sources */, 4B778F3C23A5F16F0000D260 /* FIRFilter.cpp in Sources */, + 4B06AB092C64612C0034D014 /* TIA.cpp in Sources */, 4B778F5423A5F2600000D260 /* UnformattedTrack.cpp in Sources */, 4B7752B028217E9A0073E2C5 /* StaticAnalyser.cpp in Sources */, + 4B06AADA2C645F650034D014 /* MemorySlotHandler.cpp in Sources */, 4B778EF823A5EB6E0000D260 /* NIB.cpp in Sources */, 4B9D0C4B22C7D70A00DE1AD3 /* 68000BCDTests.mm in Sources */, 4B778F5E23A5F3230000D260 /* Oric.cpp in Sources */, 4B7752B828217F110073E2C5 /* Amiga.cpp in Sources */, + 4B06AAEF2C6460180034D014 /* Keyboard.cpp in Sources */, 4B3BA0C31D318AEC005DD7A7 /* C1540Tests.swift in Sources */, 4BDA8235261E8E000021AA19 /* Z80ContentionTests.mm in Sources */, + 4B882F592C2F9C6A00D84031 /* CPCShakerTests.mm in Sources */, 4B7752C328217F720073E2C5 /* Z80.cpp in Sources */, + 4B06AACE2C645EEC0034D014 /* PCCompatible.cpp in Sources */, + 4B06AB072C6461160034D014 /* StaticAnalyser.cpp in Sources */, 4B778F1A23A5ED320000D260 /* Video.cpp in Sources */, 4B778F3B23A5F1650000D260 /* KeyboardMachine.cpp in Sources */, 4B5D497C28513F870076E2F9 /* IPF.cpp in Sources */, + 4B06AAF32C64603D0034D014 /* Keyboard.cpp in Sources */, 4B778F2E23A5F09E0000D260 /* IRQDelegatePortHandler.cpp in Sources */, 4B778EF323A5DB230000D260 /* PCMSegment.cpp in Sources */, + 4B06AB0D2C6461610034D014 /* MultiMachine.cpp in Sources */, + 4B06AAD52C645F290034D014 /* AppleII.cpp in Sources */, + 4B06AAFC2C6460970034D014 /* Keyboard.cpp in Sources */, 4B778F0D23A5EC150000D260 /* ZX80O81P.cpp in Sources */, 4B1414621B58888700E04248 /* KlausDormannTests.swift in Sources */, 4B778EFE23A5EB910000D260 /* CPCDSK.cpp in Sources */, 4B778F5823A5F2C60000D260 /* Tape.cpp in Sources */, 4B7752B328217EB90073E2C5 /* State.cpp in Sources */, + 4B06AB032C6460D00034D014 /* OPLL.cpp in Sources */, + 4B06AAFD2C64609D0034D014 /* IMD.cpp in Sources */, 4B1414601B58885000E04248 /* WolfgangLorenzTests.swift in Sources */, 4BD4A8D01E077FD20020D856 /* PCMTrackTests.mm in Sources */, 4B778F2123A5EDD50000D260 /* TrackSerialiser.cpp in Sources */, 4B049CDD1DA3C82F00322067 /* BCDTest.swift in Sources */, + 4B06AADF2C645F830034D014 /* Video.cpp in Sources */, 4BC6237226F94BCB00F83DFE /* MintermTests.mm in Sources */, 4B7752BF28217F250073E2C5 /* Sprites.cpp in Sources */, 4B778F3923A5F11C0000D260 /* Shifter.cpp in Sources */, @@ -6521,10 +6690,14 @@ 4B778F3623A5F1040000D260 /* Target.cpp in Sources */, 4B1D08061E0F7A1100763741 /* TimeTests.mm in Sources */, 4B75EBFE28FF9CA20088AB22 /* MacintoshVolume.cpp in Sources */, + 4B06AB0B2C64614B0034D014 /* Electron.cpp in Sources */, + 4B06AAF52C6460600034D014 /* Mouse.cpp in Sources */, 4B778F3D23A5F1750000D260 /* ncr5380.cpp in Sources */, 4BF701A026FFD32300996424 /* AmigaBlitterTests.mm in Sources */, 4B7752B428217ECB0073E2C5 /* ZXSpectrumTAP.cpp in Sources */, 4B778F6323A5F3630000D260 /* Tape.cpp in Sources */, + 4B06AB012C6460C30034D014 /* Video.cpp in Sources */, + 4B06AADD2C645F790034D014 /* Microdisc.cpp in Sources */, 4B778EF523A5DB440000D260 /* StaticAnalyser.cpp in Sources */, 4BEE1EC022B5E236000A26A6 /* MacGCRTests.mm in Sources */, 4B778F0623A5EC150000D260 /* CAS.cpp in Sources */, @@ -6532,10 +6705,13 @@ 4B778F3F23A5F1890000D260 /* MacintoshDoubleDensityDrive.cpp in Sources */, 4B778F1623A5ECA00000D260 /* Z80AllRAM.cpp in Sources */, 4BEDA40D25B2844B000C2DBD /* Decoder.cpp in Sources */, + 4B06AAE62C645FB10034D014 /* ADB.cpp in Sources */, 4B778EF723A5EB670000D260 /* SSD.cpp in Sources */, 4BDA7F8329C4EA28007A10A5 /* 6809OperationMapperTests.mm in Sources */, 4B778F5723A5F2BB0000D260 /* ZX8081.cpp in Sources */, + 4B06AACF2C645EF40034D014 /* i8272.cpp in Sources */, 4B778F2F23A5F0B10000D260 /* ScanTarget.cpp in Sources */, + 4B882F5D2C3219A400D84031 /* AmstradCPC.cpp in Sources */, 4B69DEB72AB79E4F0055B217 /* Instruction.cpp in Sources */, 4BE90FFD22D5864800FB464D /* MacintoshVideoTests.mm in Sources */, 4B4F478A25367EDC004245B8 /* 65816AddressingTests.swift in Sources */, @@ -6543,16 +6719,23 @@ 4B778F0C23A5EC150000D260 /* TZX.cpp in Sources */, 4B778F1B23A5ED380000D260 /* Video.cpp in Sources */, 4B778F4723A5F1DD0000D260 /* StaticAnalyser.cpp in Sources */, + 4B06AAF62C6460670034D014 /* DiskIIDrive.cpp in Sources */, 4B778F1923A5ED1B0000D260 /* 6502Storage.cpp in Sources */, 4B7752A828217E110073E2C5 /* Nick.cpp in Sources */, 42A5E80C2ABBE04600A0DD5D /* NeskellTests.swift in Sources */, + 4B06AAE92C645FD30034D014 /* Jasmin.cpp in Sources */, 4B7752AE28217E830073E2C5 /* 2MG.cpp in Sources */, + 4B06AB102C6461810034D014 /* SoundGenerator.cpp in Sources */, 4B08A2781EE39306008B7065 /* TestMachine.mm in Sources */, 4B778F1E23A5EDC00000D260 /* DriveSpeedAccumulator.cpp in Sources */, 4B778F4323A5F1B00000D260 /* ImplicitSectors.cpp in Sources */, 4B7752B128217EA30073E2C5 /* StaticAnalyser.cpp in Sources */, 4B778F5123A5F2290000D260 /* StaticAnalyser.cpp in Sources */, + 4B06AB0E2C6461700034D014 /* MultiMediaTarget.cpp in Sources */, 42437B332AC70833006DFED1 /* HDV.cpp in Sources */, + 4B06AAE82C645FCD0034D014 /* RP5C01.cpp in Sources */, + 4B06AAEC2C645FF50034D014 /* Keyboard.cpp in Sources */, + 4B06AAF02C6460240034D014 /* ReactiveDevice.cpp in Sources */, 4B7752C028217F3D0073E2C5 /* Line.cpp in Sources */, 4B7C7A00282C3BCA002D6C0B /* 68000flamewingTests.mm in Sources */, 4B778F0223A5EBA40000D260 /* MFMSectorDump.cpp in Sources */, @@ -6561,6 +6744,7 @@ 4B778F3E23A5F17C0000D260 /* IWM.cpp in Sources */, 4BD91D732401960C007BDC91 /* STX.cpp in Sources */, 4B778F1023A5EC5D0000D260 /* Drive.cpp in Sources */, + 4B06AAF42C6460430034D014 /* ZX8081.cpp in Sources */, 4B9D0C4F22C7E0CF00DE1AD3 /* 68000RollShiftTests.mm in Sources */, ); runOnlyForDeploymentPostprocessing = 0; diff --git a/OSBindings/Mac/Clock Signal.xcodeproj/xcshareddata/xcschemes/Clock Signal.xcscheme b/OSBindings/Mac/Clock Signal.xcodeproj/xcshareddata/xcschemes/Clock Signal.xcscheme index 474fa352e..3534e9926 100644 --- a/OSBindings/Mac/Clock Signal.xcodeproj/xcshareddata/xcschemes/Clock Signal.xcscheme +++ b/OSBindings/Mac/Clock Signal.xcodeproj/xcshareddata/xcschemes/Clock Signal.xcscheme @@ -1,7 +1,7 @@ + version = "1.3"> diff --git a/OSBindings/Mac/Clock Signal.xcodeproj/xcshareddata/xcschemes/Clock SignalTests.xcscheme b/OSBindings/Mac/Clock Signal.xcodeproj/xcshareddata/xcschemes/Clock SignalTests.xcscheme index ab4951d39..1e460a993 100644 --- a/OSBindings/Mac/Clock Signal.xcodeproj/xcshareddata/xcschemes/Clock SignalTests.xcscheme +++ b/OSBindings/Mac/Clock Signal.xcodeproj/xcshareddata/xcschemes/Clock SignalTests.xcscheme @@ -7,7 +7,7 @@ buildImplicitDependencies = "YES"> diff --git a/OSBindings/Mac/Clock SignalTests/8088Tests.mm b/OSBindings/Mac/Clock SignalTests/8088Tests.mm index 2aa017fc0..26c651890 100644 --- a/OSBindings/Mac/Clock SignalTests/8088Tests.mm +++ b/OSBindings/Mac/Clock SignalTests/8088Tests.mm @@ -16,6 +16,7 @@ #include #include #include +#include #include "NSData+dataWithContentsOfGZippedFile.h" diff --git a/OSBindings/Mac/Clock SignalTests/ARMDecoderTests.mm b/OSBindings/Mac/Clock SignalTests/ARMDecoderTests.mm index 86540c0ac..5885f30f6 100644 --- a/OSBindings/Mac/Clock SignalTests/ARMDecoderTests.mm +++ b/OSBindings/Mac/Clock SignalTests/ARMDecoderTests.mm @@ -15,6 +15,7 @@ #include #include +#include using namespace InstructionSet::ARM; diff --git a/OSBindings/Mac/Clock SignalTests/CPCShakerTests.mm b/OSBindings/Mac/Clock SignalTests/CPCShakerTests.mm new file mode 100644 index 000000000..4173d0ee3 --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/CPCShakerTests.mm @@ -0,0 +1,332 @@ +// +// CPCShakerTests.m +// Clock SignalTests +// +// Created by Thomas Harte on 28/06/2024. +// Copyright © 2024 Thomas Harte. All rights reserved. +// + +#import + +#include +#include + +#include "CSL.hpp" +#include "AmstradCPC.hpp" +#include "../../../Analyser/Static/AmstradCPC/Target.hpp" +#include "../../../Machines/AmstradCPC/Keyboard.hpp" +#include "../../../Outputs/ScanTarget.hpp" +#include "CSROMFetcher.hpp" +#include "TimedMachine.hpp" +#include "MediaTarget.hpp" +#include "KeyboardMachine.hpp" +#include "MachineForTarget.hpp" + +struct ScanTarget: public Outputs::Display::ScanTarget { + void set_modals(Modals modals) override { + modals_ = modals; + } + Scan *begin_scan() override { + return &scan_; + } + uint8_t *begin_data(size_t, size_t) override { + return data_.data(); + } + + + void end_scan() override { + // Empirical, CPC-specific observation: x positions end up + // being multiplied by 61 compared to a 1:1 pixel sampling at + // the CPC's highest resolution. + const int WidthDivider = 61; + + const int src_pixels = scan_.end_points[1].data_offset - scan_.end_points[0].data_offset; + const int dst_pixels = (scan_.end_points[1].x - scan_.end_points[0].x) / WidthDivider; + + const int step = (src_pixels << 16) / dst_pixels; + int position = 0; + + const auto x1 = scan_.end_points[0].x / WidthDivider; + const auto x2 = scan_.end_points[1].x / WidthDivider; + + uint8_t *const line = &raw_image_[line_ * ImageWidth]; + if(x_ < x1) { + std::fill(&line[x_], &line[x1], 0); + } + for(int x = x1; x < x2; x++) { + line[x] = data_[position >> 16]; + position += step; + } + x_ = x2; + } + void announce(Event event, bool, const Scan::EndPoint &, uint8_t) override { + switch(event) { + case Event::EndHorizontalRetrace: { + if(line_ == ImageHeight - 1) break; + + if(x_ < ImageWidth) { + uint8_t *const line = &raw_image_[line_ * ImageWidth]; + std::fill(&line[x_], &line[ImageWidth], 0); + } + + ++line_; + x_ = 0; + } break; + case Event::EndVerticalRetrace: + std::fill(&raw_image_[line_ * ImageWidth], &raw_image_[ImageHeight * ImageWidth], 0); + line_ = 0; + x_ = 0; + break; + default: break; + } + } + + NSBitmapImageRep *image_representation() { + NSBitmapImageRep *const result = + [[NSBitmapImageRep alloc] + initWithBitmapDataPlanes:NULL + pixelsWide:ImageWidth + pixelsHigh:ImageHeight + bitsPerSample:8 + samplesPerPixel:4 + hasAlpha:YES + isPlanar:NO + colorSpaceName:NSDeviceRGBColorSpace + bytesPerRow:4 * ImageWidth + bitsPerPixel:0]; + uint8_t *const data = result.bitmapData; + + for(int c = 0; c < ImageWidth * ImageHeight; c++) { + data[c * 4 + 0] = ((raw_image_[c] >> 4) & 3) * 127; + data[c * 4 + 1] = ((raw_image_[c] >> 2) & 3) * 127; + data[c * 4 + 2] = ((raw_image_[c] >> 0) & 3) * 127; + data[c * 4 + 3] = 0xff; + } + + return result; + } + + +private: + Modals modals_; + Scan scan_; + std::array data_; + int line_ = 0; + int x_ = 0; + + static constexpr int ImageWidth = 914; + static constexpr int ImageHeight = 312; + std::array raw_image_; +}; + +struct SSMDelegate: public AmstradCPC::Machine::SSMDelegate { + SSMDelegate(ScanTarget &scan_target) : scan_target_(scan_target) { + temp_dir_ = NSTemporaryDirectory(); + NSLog(@"Outputting to %@", temp_dir_); + } + + void set_crtc(int number) { + crtc_ = number; + } + + void perform(uint16_t code) { + if(!code) { + // A code of 0000 is supposed to end a wait0000 command; at present + // there seem to be no wait0000 commands to unblock. + return; + } + + NSData *const data = + [scan_target_.image_representation() representationUsingType:NSPNGFileType properties:@{}]; + NSString *const name = [temp_dir_ stringByAppendingPathComponent:[NSString stringWithFormat:@"CLK_%d_%04x.png", crtc_, code]]; + [data + writeToFile:name + atomically:NO]; + NSLog(@"Wrote %@", name); + } + +private: + ScanTarget &scan_target_; + NSString *temp_dir_; + int crtc_ = 0; +}; + +// +// Runs a local capture of the test cases found at https://shaker.logonsystem.eu +// +@interface CPCShakerTests : XCTestCase +@end + +@implementation CPCShakerTests {} + +- (void)testCSLPath:(NSString *)path name:(NSString *)name { + using namespace Storage::Automation; + const auto steps = CSL::parse([[path stringByAppendingPathComponent:name] UTF8String]); + + ScanTarget scan_target; + SSMDelegate ssm_delegate(scan_target); + + std::unique_ptr lazy_machine; + CSL::KeyDelay key_delay; + using Target = Analyser::Static::AmstradCPC::Target; + Target target; + target.catch_ssm_codes = true; + target.model = Target::Model::CPC6128; + + NSString *diskPath; + const auto machine = [&]() -> Machine::DynamicMachine& { + if(!lazy_machine) { + Machine::Error error; + lazy_machine = Machine::MachineForTarget(&target, CSROMFetcher(), error); + static_cast(lazy_machine->raw_pointer()) + ->set_ssm_delegate(&ssm_delegate); + lazy_machine->scan_producer()->set_scan_target(&scan_target); + + if(diskPath) { + const auto media = Analyser::Static::GetMedia(diskPath.UTF8String); + lazy_machine->media_target()->insert_media(media); + } + } + return *lazy_machine; + }; + const auto delay = [&](uint64_t micros) { + machine().timed_machine()->run_for((double)micros / 1'000'000.0); + }; + + using Type = CSL::Instruction::Type; + for(const auto &step: steps) { + switch(step.type) { + case Type::Version: + if(std::get(step.argument) != "1.0") { + XCTAssert(false, "Unrecognised file version"); + } + break; + + case Type::CRTCSelect: { + const auto argument = static_cast(std::get(step.argument)); + switch(argument) { + default: + NSLog(@"Unrecognised CRTC type %d", argument); + break; + case 0: target.crtc_type = Target::CRTCType::Type0; break; + case 1: target.crtc_type = Target::CRTCType::Type1; break; + case 2: target.crtc_type = Target::CRTCType::Type2; break; + case 3: target.crtc_type = Target::CRTCType::Type3; break; + } + ssm_delegate.set_crtc(argument); + } break; + + case Type::Reset: + lazy_machine.reset(); + break; + + case Type::Wait: + delay(std::get(step.argument)); + break; + + case Type::DiskInsert: { + const auto &disk = std::get(step.argument); + XCTAssertEqual(disk.drive, 0); // Only drive 0 is supported for now. + + NSString *diskName = [NSString stringWithUTF8String:disk.file.c_str()]; + diskPath = + [[NSBundle bundleForClass:[self class]] + pathForResource:diskName ofType:nil inDirectory:@"Shaker"]; + XCTAssertNotNil(diskPath); + + if(lazy_machine) { + const auto media = Analyser::Static::GetMedia(diskPath.UTF8String); + machine().media_target()->insert_media(media); + } + } break; + + case Type::KeyDelay: + key_delay = std::get(step.argument); + break; + + case Type::KeyOutput: { + auto &key_target = *machine().keyboard_machine(); + + const auto &events = std::get>(step.argument); + bool last_down = false; + for(const auto &event: events) { + // Apply the interpress delay before if this is a second consecutive press; + // if this is a release then apply the regular key delay. + if(event.down && !last_down) { + delay(key_delay.interpress_delay); + } else if(!event.down) { + delay(key_delay.press_delay); + } + + key_target.set_key_state(event.key, event.down); + last_down = event.down; + + // If this was the release of a carriage return, wait some more after release. + if(key_delay.carriage_return_delay && (event.key == AmstradCPC::Key::KeyEnter || event.key == AmstradCPC::Key::KeyReturn)) { + delay(*key_delay.carriage_return_delay); + } + } + } break; + + case Type::LoadCSL: + // Quick fix: just recurse. + [self + testCSLPath:path + name: + [NSString stringWithUTF8String: + (std::get(step.argument) + ".csl").c_str() + ]]; + break; + + default: + XCTAssert(false, "Unrecognised command: %d", step.type); + break; + } + } +} + +- (void)testModulePath:(NSString *)path name:(NSString *)name { + NSString *basePath = + [[NSBundle bundleForClass:[self class]] + pathForResource:@"Shaker" + ofType:nil]; + [self testCSLPath:[basePath stringByAppendingPathComponent:path] name:name]; +} + +- (void)testModuleA { + [self testModulePath:@"MODULE A" name:@"SHAKE26A-0.CSL"]; +// [self testModulePath:@"MODULE A" name:@"SHAKE26A-1.CSL"]; +// [self testModulePath:@"MODULE A" name:@"SHAKE26A-2.CSL"]; +// [self testModulePath:@"MODULE A" name:@"SHAKE26A-3.CSL"]; +// [self testModulePath:@"MODULE A" name:@"SHAKE26A-4.CSL"]; +} +- (void)testModuleB { + [self testModulePath:@"MODULE B" name:@"SHAKE26B-0.CSL"]; +// [self testModulePath:@"MODULE B" name:@"SHAKE26B-1.CSL"]; +// [self testModulePath:@"MODULE B" name:@"SHAKE26B-2.CSL"]; +// [self testModulePath:@"MODULE B" name:@"SHAKE26B-3.CSL"]; +// [self testModulePath:@"MODULE B" name:@"SHAKE26B-4.CSL"]; +} +- (void)testModuleC { + [self testModulePath:@"MODULE C" name:@"SHAKE26C-0.CSL"]; +// [self testModulePath:@"MODULE C" name:@"SHAKE26C-1.CSL"]; +// [self testModulePath:@"MODULE C" name:@"SHAKE26C-2.CSL"]; +// [self testModulePath:@"MODULE C" name:@"SHAKE26C-3.CSL"]; +// [self testModulePath:@"MODULE C" name:@"SHAKE26C-4.CSL"]; +} +- (void)testModuleD { + [self testModulePath:@"MODULE D" name:@"SHAKE26D-0.CSL"]; +// [self testModulePath:@"MODULE D" name:@"SHAKE26D-1.CSL"]; +// [self testModulePath:@"MODULE D" name:@"SHAKE26D-2.CSL"]; +// [self testModulePath:@"MODULE D" name:@"SHAKE26D-3.CSL"]; +// [self testModulePath:@"MODULE D" name:@"SHAKE26D-4.CSL"]; +} +- (void)testModuleE { + [self testModulePath:@"MODULE E" name:@"SHAKE26E-0.CSL"]; +// [self testModulePath:@"MODULE E" name:@"SHAKE26E-1.CSL"]; +// [self testModulePath:@"MODULE E" name:@"SHAKE26E-2.CSL"]; +// [self testModulePath:@"MODULE E" name:@"SHAKE26E-3.CSL"]; +// [self testModulePath:@"MODULE E" name:@"SHAKE26E-4.CSL"]; +} + +@end diff --git a/OSBindings/Mac/Clock SignalTests/Shaker/MODULE A/SHAKE26A-0.CSL b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE A/SHAKE26A-0.CSL new file mode 100644 index 000000000..4e80e428c --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE A/SHAKE26A-0.CSL @@ -0,0 +1,297 @@ +; +; Fichier de script CSL +; Execution du module SHAKE26A du DSK SHAKER26.DSK en CRTC 0 +; Le module genere des instructions au format SSM +; +csl_version 1.0 +crtc_select 0 +reset +wait 3000000 +disk_insert 'shaker26.dsk' +key_delay 70000 70000 400000 +key_output 'RUN"SHAKE26A"\(RET)' +wait 10000000 +; +; test 1 +key_output '1' +wait 800000 ; fin affichage 1er ecran & ssm 595215 +key_output ' ' +wait 800000 ; fin affichage 2nd ecran & ssm 659451 +key_output ' ' +wait 800000 ; fin affichage 3eme ecran & ssm 627963 +key_output ' ' +wait 800000 ; fin affichage 4eme ecran & ssm 698883 +key_output ' ' +wait 800000 ; fin affichage 5eme ecran & ssm 551415 +key_output ' ' +wait 1000000 ; retour menu +; +; test 2 +key_output '2' +wait 800000 ; 519961 crt 0 1 ecran +key_output ' ' +wait 800000 ; 2 ecrans +wait 800000 ; +key_output ' ' +wait 800000 ; 723923 +key_output ' ' +wait 800000 ; 599040 +key_output ' ' +wait 1000000 ; retour menu +; +; test 3 +key_output '3' +wait 800000 ; 596058 +wait 1500000 ; 1337856 +key_output ' ' +wait 800000 ; 730624 +wait 1500000 ; 1337856 +key_output ' ' +wait 800000 ; 750685 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 750592 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 750592 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 750592 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 710656 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 726016 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 726952 +wait 800000 ; 698880 +key_output ' ' +wait 1000000 ; 845824 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 666112 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 666112 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 706048 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 610816 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 610816 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 610816 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 730624 +wait 800000 ; 698880 +key_output ' ' +wait 900000 ; 745984 +wait 800000 ; 698880 +key_output ' ' +wait 900000 ; 805888 +wait 800000 ; 698880 +key_output ' ' +wait 1000000 ; 865792 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 686080 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 686080 +wait 800000 ; 698880 +key_output ' ' +wait 10000000 +; +key_output '4' +wait 9000000 ; 6743019 +key_output ' ' +wait 1000000 +; +key_output '5' +wait 800000 ; 434016 +key_output ' ' +wait 800000 ; 547328 +key_output ' ' +wait 800000 ; 567296 +key_output ' ' +wait 800000 ; 587264 +key_output ' ' +wait 800000 ; 607232 +key_output ' ' +wait 1000000 +; +key_output '6' +wait 800000 ; 473960 +key_output ' ' +wait 800000 ; 607232 +key_output ' ' +wait 800000 ; 627200 +key_output ' ' +wait 800000 ; 647168 +key_output ' ' +wait 800000 ; 667136 +key_output ' ' +wait 1000000 +; +key_output '7' +wait 800000 ; 473957 +key_output ' ' +wait 800000 ; 667072 +key_output ' ' +wait 800000 ; 527296 +key_output ' ' +wait 800000 ; 547264 +key_output ' ' +wait 800000 ; 567232 +key_output ' ' +wait 1000000 +; +key_output '8' +wait 800000 ; 431083 +key_output ' ' +wait 1000000 +; +key_output '9' +wait 800000 ; 474048 +key_output ' ' +wait 800000 ; 559104 +key_output ' ' +wait 800000 ; 598363 +key_output ' ' +wait 1000000 +; +key_output 'E' +wait 800000 ; 514468 +key_output ' ' +wait 1000000 +; +key_output 'R' +wait 800000 ; 592695 +wait 1200000 ; 998400 +key_output ' ' +wait 800000 ; 599040 +wait 1200000 ; 998400 +key_output ' ' +wait 800000 ; 658944 +wait 1200000 ; 998400 +key_output ' ' +wait 1000000 +; +key_output 'T' +wait 800000 ; 531832 +key_output ' ' +wait 800000 ; 579072 +key_output ' ' +wait 800000 ; 579072 +key_output ' ' +wait 800000 ; 579072 +key_output ' ' +wait 800000 ; 579072 +key_output ' ' +wait 800000 ; 638976 +key_output ' ' +wait 1000000 +; +key_output 'Y' +wait 800000 ; 511931 +key_output ' ' +wait 800000 ; 619008 +key_output ' ' +wait 800000 ; 619008 +key_output ' ' +wait 800000 ; 619008 +key_output ' ' +wait 800000 ; 619008 +key_output ' ' +wait 800000 ; 619008 +key_output ' ' +wait 800000 ; 619008 +key_output ' ' +wait 800000 ; ??? +key_output ' ' +wait 1000000 +; +key_output 'U' +wait 14000000 ; 11803953+1007210 +key_output ' ' +wait 1000000 +; +key_output 'I' +wait 2200000 ; 2013010 +key_output ' ' +wait 2200000 ; 2315008 +key_output ' ' +wait 5000000 ; 4233216 +key_output ' ' +wait 35000000 ; 31301630 +key_output ' ' +wait 2000000 ; 1557507 +key_output ' ' +wait 1000000 +; +key_output 'O' +wait 800000 ; 576098 +key_output ' ' +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 599040 +key_output ' ' +wait 800000 ; 497671 +key_output ' ' +wait 800000 ; 469504 +key_output ' ' +wait 800000 ; 522696 +key_output ' ' +wait 800000 ; 547978 +key_output ' ' +wait 800000 ; 579072 +; crtc 1 +;key_output ' ' +;wait 800000 ; 482251 +;key_output ' ' +;wait 800000 ; 599552 +;key_output ' ' +;wait 800000 ; 599552 +;key_output ' ' +;wait 800000 ; 599552 +;key_output ' ' +;wait 800000 ; 519680 +key_output ' ' +wait 1000000 +; +key_output 'P' +wait 450000 ; 427222 +wait 5200000 ; 5111808 +key_output ' ' +wait 800000 ; 529408 +key_output ' ' +wait 800000 ; 489472 +key_output ' ' +wait 800000 ; 449536 +key_output ' ' +wait 800000 ; 509440 +key_output ' ' +wait 800000 ; 587307 +key_output ' ' +wait 800000 ; 479104 +key_output ' ' +wait 800000 ; 479360 +key_output ' ' +wait 800000 ; 490944 +key_output ' ' +wait 800000 ; 638464 +key_output ' ' +wait 800000 ; 619008 +key_output ' ' +wait 1000000 +; +csl_load 'SHAKE26A-1' \ No newline at end of file diff --git a/OSBindings/Mac/Clock SignalTests/Shaker/MODULE A/SHAKE26A-1.CSL b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE A/SHAKE26A-1.CSL new file mode 100644 index 000000000..3e0bddd6b --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE A/SHAKE26A-1.CSL @@ -0,0 +1,297 @@ +; +; Fichier de script CSL +; Execution du module SHAKE26A du DSK SHAKER26.DSK en CRTC 1 +; Le module genere des instructions au format SSM +; +csl_version 1.0 +crtc_select 1 +reset +wait 3000000 +disk_insert 'shaker26.dsk' +key_delay 70000 70000 400000 +key_output 'RUN"SHAKE26A"\(RET)' +wait 10000000 +; +; test 1 +key_output '1' +wait 800000 ; fin affichage 1er ecran & ssm 595215 +key_output ' ' +wait 800000 ; fin affichage 2nd ecran & ssm 659451 +key_output ' ' +wait 800000 ; fin affichage 3eme ecran & ssm 627963 +key_output ' ' +wait 800000 ; fin affichage 4eme ecran & ssm 698883 +key_output ' ' +wait 800000 ; fin affichage 5eme ecran & ssm 551415 +key_output ' ' +wait 1000000 ; retour menu +; +; test 2 +key_output '2' +wait 800000 ; 519961 crt 0 1 ecran +wait 800000 ; 2 ecrans +key_output ' ' +wait 800000 ; +key_output ' ' +wait 800000 ; 723923 +key_output ' ' +wait 800000 ; 599040 +key_output ' ' +wait 1000000 ; retour menu +; +; test 3 +key_output '3' +wait 800000 ; 596058 +wait 1500000 ; 1337856 +key_output ' ' +wait 800000 ; 730624 +wait 1500000 ; 1337856 +key_output ' ' +wait 800000 ; 750685 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 750592 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 750592 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 750592 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 710656 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 726016 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 726952 +wait 800000 ; 698880 +key_output ' ' +wait 1000000 ; 845824 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 666112 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 666112 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 706048 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 610816 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 610816 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 610816 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 730624 +wait 800000 ; 698880 +key_output ' ' +wait 900000 ; 745984 +wait 800000 ; 698880 +key_output ' ' +wait 900000 ; 805888 +wait 800000 ; 698880 +key_output ' ' +wait 1000000 ; 865792 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 686080 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 686080 +wait 800000 ; 698880 +key_output ' ' +wait 10000000 +; +key_output '4' +wait 8000000 ; 6743019 +key_output ' ' +wait 1000000 +; +key_output '5' +wait 800000 ; 434016 +key_output ' ' +wait 800000 ; 547328 +key_output ' ' +wait 800000 ; 567296 +key_output ' ' +wait 800000 ; 587264 +key_output ' ' +wait 800000 ; 607232 +key_output ' ' +wait 1000000 +; +key_output '6' +wait 800000 ; 473960 +key_output ' ' +wait 800000 ; 607232 +key_output ' ' +wait 800000 ; 627200 +key_output ' ' +wait 800000 ; 647168 +key_output ' ' +wait 800000 ; 667136 +key_output ' ' +wait 1000000 +; +key_output '7' +wait 800000 ; 473957 +key_output ' ' +wait 800000 ; 667072 +key_output ' ' +wait 800000 ; 527296 +key_output ' ' +wait 800000 ; 547264 +key_output ' ' +wait 800000 ; 567232 +key_output ' ' +wait 1000000 +; +key_output '8' +wait 800000 ; 431083 +key_output ' ' +wait 1000000 +; +key_output '9' +wait 800000 ; 474048 +key_output ' ' +wait 800000 ; 559104 +key_output ' ' +wait 800000 ; 598363 +key_output ' ' +wait 1000000 +; +key_output 'E' +wait 800000 ; 514468 +key_output ' ' +wait 1000000 +; +key_output 'R' +wait 800000 ; 592695 +wait 1200000 ; 998400 +key_output ' ' +wait 800000 ; 599040 +wait 1200000 ; 998400 +key_output ' ' +wait 800000 ; 658944 +wait 1200000 ; 998400 +key_output ' ' +wait 1000000 +; +key_output 'T' +wait 800000 ; 531832 +key_output ' ' +wait 800000 ; 579072 +key_output ' ' +wait 800000 ; 579072 +key_output ' ' +wait 800000 ; 579072 +key_output ' ' +wait 800000 ; 579072 +key_output ' ' +wait 800000 ; 638976 +key_output ' ' +wait 1000000 +; +key_output 'Y' +wait 800000 ; 511931 +key_output ' ' +wait 800000 ; 619008 +key_output ' ' +wait 800000 ; 619008 +key_output ' ' +wait 800000 ; 619008 +key_output ' ' +wait 800000 ; 619008 +key_output ' ' +wait 800000 ; 619008 +key_output ' ' +wait 800000 ; 619008 +key_output ' ' +wait 800000 ; ??? +key_output ' ' +wait 1000000 +; +key_output 'U' +wait 14000000 ; 11803953+1007210 +key_output ' ' +wait 1000000 +; +key_output 'I' +wait 2200000 ; 2013010 +key_output ' ' +wait 2200000 ; 2315008 +key_output ' ' +wait 5000000 ; 4233216 +key_output ' ' +wait 35000000 ; 31301630 +key_output ' ' +wait 2000000 ; 1557507 +key_output ' ' +wait 1000000 +; +key_output 'O' +wait 800000 ; 576098 +key_output ' ' +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 599040 +key_output ' ' +wait 800000 ; 497671 +key_output ' ' +wait 800000 ; 469504 +key_output ' ' +wait 800000 ; 522696 +key_output ' ' +wait 800000 ; 547978 +key_output ' ' +wait 800000 ; 579072 +; crtc 1 +;key_output ' ' +;wait 800000 ; 482251 +;key_output ' ' +;wait 800000 ; 599552 +;key_output ' ' +;wait 800000 ; 599552 +;key_output ' ' +;wait 800000 ; 599552 +;key_output ' ' +;wait 800000 ; 519680 +key_output ' ' +wait 1000000 +; +key_output 'P' +wait 450000 ; 427222 +wait 5200000 ; 5111808 +key_output ' ' +wait 800000 ; 529408 +key_output ' ' +wait 800000 ; 489472 +key_output ' ' +wait 800000 ; 449536 +key_output ' ' +wait 800000 ; 509440 +key_output ' ' +wait 800000 ; 587307 +key_output ' ' +wait 800000 ; 479104 +key_output ' ' +wait 800000 ; 479360 +key_output ' ' +wait 800000 ; 490944 +key_output ' ' +wait 800000 ; 638464 +key_output ' ' +wait 800000 ; 619008 +key_output ' ' +wait 1000000 + +csl_load 'SHAKE26A-2' \ No newline at end of file diff --git a/OSBindings/Mac/Clock SignalTests/Shaker/MODULE A/SHAKE26A-2.CSL b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE A/SHAKE26A-2.CSL new file mode 100644 index 000000000..182d3719a --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE A/SHAKE26A-2.CSL @@ -0,0 +1,267 @@ +; +; Fichier de script CSL +; Execution du module SHAKE26A du DSK SHAKER26.DSK en CRTC 2 +; Le module genere des instructions au format SSM +; +csl_version 1.0 +crtc_select 2 +reset +wait 3000000 +disk_insert 'shaker26.dsk' +key_delay 70000 70000 400000 +key_output 'RUN"SHAKE26A"\(RET)' +wait 10000000 +; +; test 1 +key_output '1' +wait 800000 ; fin affichage 1er ecran & ssm 595215 +key_output ' ' +wait 800000 ; fin affichage 2nd ecran & ssm 659451 +key_output ' ' +wait 800000 ; fin affichage 3eme ecran & ssm 627963 +key_output ' ' +wait 800000 ; fin affichage 4eme ecran & ssm 698883 +key_output ' ' +wait 800000 ; fin affichage 5eme ecran & ssm 551415 +key_output ' ' +wait 1000000 ; retour menu +; +; test 2 +key_output '2' +wait 800000 ; 519961 crt 0 1 ecran +key_output ' ' +wait 800000 ; 2 ecrans +wait 800000 ; +key_output ' ' +wait 800000 ; 723923 +key_output ' ' +wait 800000 ; 599040 +key_output ' ' +wait 1000000 ; retour menu +; +; test 3 +key_output '3' +wait 800000 ; 596058 +wait 1500000 ; 1337856 +key_output ' ' +wait 800000 ; 730624 +wait 1500000 ; 1337856 +key_output ' ' +wait 800000 ; 750685 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 750592 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 750592 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 750592 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 710656 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 726016 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 726952 +wait 800000 ; 698880 +key_output ' ' +wait 1000000 ; 845824 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 666112 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 666112 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 706048 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 610816 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 610816 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 610816 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 730624 +wait 800000 ; 698880 +key_output ' ' +wait 900000 ; 745984 +wait 800000 ; 698880 +key_output ' ' +wait 900000 ; 805888 +wait 800000 ; 698880 +key_output ' ' +wait 1000000 ; 865792 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 686080 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 686080 +wait 800000 ; 698880 +key_output ' ' +wait 10000000 +; +key_output '4' +wait 8000000 ; 6743019 +key_output ' ' +wait 1000000 +; +key_output '8' +wait 800000 ; 431083 +key_output ' ' +wait 1000000 +; +key_output '9' +wait 800000 ; 474048 +key_output ' ' +wait 800000 ; 559104 +key_output ' ' +wait 800000 ; 598363 +key_output ' ' +wait 1000000 +; +key_output 'E' +wait 800000 ; 514468 +key_output ' ' +wait 1000000 +; +key_output 'R' +wait 800000 ; 592695 +wait 1200000 ; 998400 +key_output ' ' +wait 800000 ; 599040 +wait 1200000 ; 998400 +key_output ' ' +wait 800000 ; 658944 +wait 1200000 ; 998400 +key_output ' ' +wait 1000000 +; +key_output 'T' +wait 800000 ; 531832 +key_output ' ' +wait 800000 ; 579072 +key_output ' ' +wait 800000 ; 579072 +key_output ' ' +wait 800000 ; 579072 +key_output ' ' +wait 800000 ; 579072 +key_output ' ' +wait 800000 ; 638976 +key_output ' ' +wait 1000000 +; +key_output 'Y' +wait 800000 ; 511931 +key_output ' ' +wait 800000 ; 619008 +key_output ' ' +wait 800000 ; 619008 +key_output ' ' +wait 800000 ; 619008 +key_output ' ' +wait 800000 ; 619008 +key_output ' ' +wait 800000 ; 619008 +key_output ' ' +wait 800000 ; 619008 +key_output ' ' +wait 800000 ; ??? +key_output ' ' +wait 1000000 +; +key_output 'U' +wait 14000000 ; 11803953+1007210 +key_output ' ' +wait 1000000 +; +key_output 'I' +wait 2200000 ; 2013010 +key_output ' ' +wait 2200000 ; 2315008 +key_output ' ' +wait 5000000 ; 4233216 +key_output ' ' +wait 35000000 ; 31301630 +key_output ' ' +wait 2000000 ; 1557507 +key_output ' ' +wait 1000000 +; +key_output 'O' +wait 800000 ; 576098 +key_output ' ' +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 599040 +key_output ' ' +wait 800000 ; 497671 +key_output ' ' +wait 800000 ; 469504 +key_output ' ' +wait 800000 ; 522696 +key_output ' ' +wait 800000 ; 547978 +key_output ' ' +wait 800000 ; 579072 +; crtc 1 +;key_output ' ' +;wait 800000 ; 482251 +;key_output ' ' +;wait 800000 ; 599552 +;key_output ' ' +;wait 800000 ; 599552 +;key_output ' ' +;wait 800000 ; 599552 +;key_output ' ' +;wait 800000 ; 519680 +key_output ' ' +wait 1000000 +; +key_output 'P' +wait 450000 ; 427222 +wait 5200000 ; 5111808 +key_output ' ' +wait 800000 ; 529408 +key_output ' ' +wait 800000 ; 489472 +key_output ' ' +wait 800000 ; 449536 +key_output ' ' +wait 800000 ; 509440 +key_output ' ' +wait 800000 ; 587307 +key_output ' ' +wait 800000 ; 479104 +key_output ' ' +wait 800000 ; 479360 +key_output ' ' +wait 800000 ; 490944 +key_output ' ' +wait 800000 ; 638464 +key_output ' ' +wait 800000 ; 619008 +key_output ' ' +wait 1000000 +; +; crtc 2 +; +key_output '\(COP)' +wait 8500000 ; 8313240 +wait 500000 ; 319488 +key_output ' ' +wait 1000000 +; +; +csl_load 'SHAKE26A-4' diff --git a/OSBindings/Mac/Clock SignalTests/Shaker/MODULE A/SHAKE26A-3.CSL b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE A/SHAKE26A-3.CSL new file mode 100644 index 000000000..f6c3c95a3 --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE A/SHAKE26A-3.CSL @@ -0,0 +1,296 @@ +; +; Fichier de script CSL +; Execution du module SHAKE26A du DSK SHAKER26.DSK en CRTC 3 +; Le module genere des instructions au format SSM +; +csl_version 1.0 +crtc_select 3 +reset +wait 3000000 +disk_insert 'shaker26.dsk' +key_delay 70000 70000 400000 +key_output 'RUN"SHAKE26A"\(RET)' +wait 10000000 +; +; test 1 +key_output '1' +wait 800000 ; fin affichage 1er ecran & ssm 595215 +key_output ' ' +wait 800000 ; fin affichage 2nd ecran & ssm 659451 +key_output ' ' +wait 800000 ; fin affichage 3eme ecran & ssm 627963 +key_output ' ' +wait 800000 ; fin affichage 4eme ecran & ssm 698883 +key_output ' ' +wait 800000 ; fin affichage 5eme ecran & ssm 551415 +key_output ' ' +wait 1000000 ; retour menu +; +; test 2 +key_output '2' +wait 800000 ; 519961 crt 0 1 ecran +key_output ' ' +wait 800000 ; 2 ecrans +wait 800000 ; +key_output ' ' +wait 800000 ; 723923 +key_output ' ' +wait 800000 ; 599040 +key_output ' ' +wait 1000000 ; retour menu +; +; test 3 +key_output '3' +wait 800000 ; 596058 +wait 1500000 ; 1337856 +key_output ' ' +wait 800000 ; 730624 +wait 1500000 ; 1337856 +key_output ' ' +wait 800000 ; 750685 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 750592 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 750592 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 750592 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 710656 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 726016 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 726952 +wait 800000 ; 698880 +key_output ' ' +wait 1000000 ; 845824 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 666112 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 666112 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 706048 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 610816 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 610816 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 610816 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 730624 +wait 800000 ; 698880 +key_output ' ' +wait 900000 ; 745984 +wait 800000 ; 698880 +key_output ' ' +wait 900000 ; 805888 +wait 800000 ; 698880 +key_output ' ' +wait 1000000 ; 865792 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 686080 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 686080 +wait 800000 ; 698880 +key_output ' ' +wait 10000000 +; +key_output '4' +wait 8000000 ; 6743019 +key_output ' ' +wait 1000000 +; +key_output '5' +wait 800000 ; 434016 +key_output ' ' +wait 800000 ; 547328 +key_output ' ' +wait 800000 ; 567296 +key_output ' ' +wait 800000 ; 587264 +key_output ' ' +wait 800000 ; 607232 +key_output ' ' +wait 1000000 +; +key_output '6' +wait 800000 ; 473960 +key_output ' ' +wait 800000 ; 607232 +key_output ' ' +wait 800000 ; 627200 +key_output ' ' +wait 800000 ; 647168 +key_output ' ' +wait 800000 ; 667136 +key_output ' ' +wait 1000000 +; +key_output '7' +wait 800000 ; 473957 +key_output ' ' +wait 800000 ; 667072 +key_output ' ' +wait 800000 ; 527296 +key_output ' ' +wait 800000 ; 547264 +key_output ' ' +wait 800000 ; 567232 +key_output ' ' +wait 1000000 +; +key_output '8' +wait 800000 ; 431083 +key_output ' ' +wait 1000000 +; +key_output '9' +wait 800000 ; 474048 +key_output ' ' +wait 800000 ; 559104 +key_output ' ' +wait 800000 ; 598363 +key_output ' ' +wait 1000000 +; +key_output 'E' +wait 800000 ; 514468 +key_output ' ' +wait 1000000 +; +key_output 'R' +wait 800000 ; 592695 +wait 1200000 ; 998400 +key_output ' ' +wait 800000 ; 599040 +wait 1200000 ; 998400 +key_output ' ' +wait 800000 ; 658944 +wait 1200000 ; 998400 +key_output ' ' +wait 1000000 +; +key_output 'T' +wait 800000 ; 531832 +key_output ' ' +wait 800000 ; 579072 +key_output ' ' +wait 800000 ; 579072 +key_output ' ' +wait 800000 ; 579072 +key_output ' ' +wait 800000 ; 579072 +key_output ' ' +wait 800000 ; 638976 +key_output ' ' +wait 1000000 +; +key_output 'Y' +wait 800000 ; 511931 +key_output ' ' +wait 800000 ; 619008 +key_output ' ' +wait 800000 ; 619008 +key_output ' ' +wait 800000 ; 619008 +key_output ' ' +wait 800000 ; 619008 +key_output ' ' +wait 800000 ; 619008 +key_output ' ' +wait 800000 ; 619008 +key_output ' ' +wait 800000 ; ??? +key_output ' ' +wait 1000000 +; +key_output 'U' +wait 14000000 ; 11803953+1007210 +key_output ' ' +wait 1000000 +; +key_output 'I' +wait 2200000 ; 2013010 +key_output ' ' +wait 2200000 ; 2315008 +key_output ' ' +wait 5000000 ; 4233216 +key_output ' ' +wait 35000000 ; 31301630 +key_output ' ' +wait 2000000 ; 1557507 +key_output ' ' +wait 1000000 +; +key_output 'O' +wait 800000 ; 576098 +key_output ' ' +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 599040 +key_output ' ' +wait 800000 ; 497671 +key_output ' ' +wait 800000 ; 469504 +key_output ' ' +wait 800000 ; 522696 +key_output ' ' +wait 800000 ; 547978 +key_output ' ' +wait 800000 ; 579072 +; crtc 1 +;key_output ' ' +;wait 800000 ; 482251 +;key_output ' ' +;wait 800000 ; 599552 +;key_output ' ' +;wait 800000 ; 599552 +;key_output ' ' +;wait 800000 ; 599552 +;key_output ' ' +;wait 800000 ; 519680 +key_output ' ' +wait 1000000 +; +key_output 'P' +wait 450000 ; 427222 +wait 5200000 ; 5111808 +key_output ' ' +wait 800000 ; 529408 +key_output ' ' +wait 800000 ; 489472 +key_output ' ' +wait 800000 ; 449536 +key_output ' ' +wait 800000 ; 509440 +key_output ' ' +wait 800000 ; 587307 +key_output ' ' +wait 800000 ; 479104 +key_output ' ' +wait 800000 ; 479360 +key_output ' ' +wait 800000 ; 490944 +key_output ' ' +wait 800000 ; 638464 +key_output ' ' +wait 800000 ; 619008 +key_output ' ' +wait 1000000 +reset \ No newline at end of file diff --git a/OSBindings/Mac/Clock SignalTests/Shaker/MODULE A/SHAKE26A-4.CSL b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE A/SHAKE26A-4.CSL new file mode 100644 index 000000000..019e34612 --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE A/SHAKE26A-4.CSL @@ -0,0 +1,297 @@ +; +; Fichier de script CSL +; Execution du module SHAKE26A du DSK SHAKER26.DSK en CRTC 4 +; Le module genere des instructions au format SSM +; +csl_version 1.0 +crtc_select 4 +reset +wait 3000000 +disk_insert 'shaker26.dsk' +key_delay 70000 70000 400000 +key_output 'RUN"SHAKE26A"\(RET)' +wait 10000000 +; +; test 1 +key_output '1' +wait 800000 ; fin affichage 1er ecran & ssm 595215 +key_output ' ' +wait 800000 ; fin affichage 2nd ecran & ssm 659451 +key_output ' ' +wait 800000 ; fin affichage 3eme ecran & ssm 627963 +key_output ' ' +wait 800000 ; fin affichage 4eme ecran & ssm 698883 +key_output ' ' +wait 800000 ; fin affichage 5eme ecran & ssm 551415 +key_output ' ' +wait 1000000 ; retour menu +; +; test 2 +key_output '2' +wait 800000 ; 519961 crt 0 1 ecran +key_output ' ' +wait 800000 ; 2 ecrans +wait 800000 ; +key_output ' ' +wait 800000 ; 723923 +key_output ' ' +wait 800000 ; 599040 +key_output ' ' +wait 1000000 ; retour menu +; +; test 3 +key_output '3' +wait 800000 ; 596058 +wait 1500000 ; 1337856 +key_output ' ' +wait 800000 ; 730624 +wait 1500000 ; 1337856 +key_output ' ' +wait 800000 ; 750685 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 750592 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 750592 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 750592 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 710656 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 726016 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 726952 +wait 800000 ; 698880 +key_output ' ' +wait 1000000 ; 845824 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 666112 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 666112 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 706048 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 610816 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 610816 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 610816 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 730624 +wait 800000 ; 698880 +key_output ' ' +wait 900000 ; 745984 +wait 800000 ; 698880 +key_output ' ' +wait 900000 ; 805888 +wait 800000 ; 698880 +key_output ' ' +wait 1000000 ; 865792 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 686080 +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 686080 +wait 800000 ; 698880 +key_output ' ' +wait 10000000 +; +key_output '4' +wait 12000000 ; 6743019 +key_output ' ' +wait 1000000 +; +key_output '5' +wait 800000 ; 434016 +key_output ' ' +wait 800000 ; 547328 +key_output ' ' +wait 800000 ; 567296 +key_output ' ' +wait 800000 ; 587264 +key_output ' ' +wait 800000 ; 607232 +key_output ' ' +wait 1000000 +; +key_output '6' +wait 800000 ; 473960 +key_output ' ' +wait 800000 ; 607232 +key_output ' ' +wait 800000 ; 627200 +key_output ' ' +wait 800000 ; 647168 +key_output ' ' +wait 800000 ; 667136 +key_output ' ' +wait 1000000 +; +key_output '7' +wait 800000 ; 473957 +key_output ' ' +wait 800000 ; 667072 +key_output ' ' +wait 800000 ; 527296 +key_output ' ' +wait 800000 ; 547264 +key_output ' ' +wait 800000 ; 567232 +key_output ' ' +wait 1000000 +; +key_output '8' +wait 800000 ; 431083 +key_output ' ' +wait 1000000 +; +key_output '9' +wait 800000 ; 474048 +key_output ' ' +wait 800000 ; 559104 +key_output ' ' +wait 800000 ; 598363 +key_output ' ' +wait 1000000 +; +key_output 'E' +wait 800000 ; 514468 +key_output ' ' +wait 1000000 +; +key_output 'R' +wait 800000 ; 592695 +wait 1200000 ; 998400 +key_output ' ' +wait 800000 ; 599040 +wait 1200000 ; 998400 +key_output ' ' +wait 800000 ; 658944 +wait 1200000 ; 998400 +key_output ' ' +wait 1000000 +; +key_output 'T' +wait 800000 ; 531832 +key_output ' ' +wait 800000 ; 579072 +key_output ' ' +wait 800000 ; 579072 +key_output ' ' +wait 800000 ; 579072 +key_output ' ' +wait 800000 ; 579072 +key_output ' ' +wait 800000 ; 638976 +key_output ' ' +wait 1000000 +; +key_output 'Y' +wait 800000 ; 511931 +key_output ' ' +wait 800000 ; 619008 +key_output ' ' +wait 800000 ; 619008 +key_output ' ' +wait 800000 ; 619008 +key_output ' ' +wait 800000 ; 619008 +key_output ' ' +wait 800000 ; 619008 +key_output ' ' +wait 800000 ; 619008 +key_output ' ' +wait 800000 ; ??? +key_output ' ' +wait 1000000 +; +key_output 'U' +wait 14000000 ; 11803953+1007210 +key_output ' ' +wait 1000000 +; +key_output 'I' +wait 2200000 ; 2013010 +key_output ' ' +wait 2200000 ; 2315008 +key_output ' ' +wait 5000000 ; 4233216 +key_output ' ' +wait 35000000 ; 31301630 +key_output ' ' +wait 2000000 ; 1557507 +key_output ' ' +wait 1000000 +; +key_output 'O' +wait 800000 ; 576098 +key_output ' ' +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 698880 +key_output ' ' +wait 800000 ; 599040 +key_output ' ' +wait 800000 ; 497671 +key_output ' ' +wait 800000 ; 469504 +key_output ' ' +wait 800000 ; 522696 +key_output ' ' +wait 800000 ; 547978 +key_output ' ' +wait 800000 ; 579072 +; crtc 1 +;key_output ' ' +;wait 800000 ; 482251 +;key_output ' ' +;wait 800000 ; 599552 +;key_output ' ' +;wait 800000 ; 599552 +;key_output ' ' +;wait 800000 ; 599552 +;key_output ' ' +;wait 800000 ; 519680 +key_output ' ' +wait 1000000 +; +key_output 'P' +wait 450000 ; 427222 +wait 5200000 ; 5111808 +key_output ' ' +wait 800000 ; 529408 +key_output ' ' +wait 800000 ; 489472 +key_output ' ' +wait 800000 ; 449536 +key_output ' ' +wait 800000 ; 509440 +key_output ' ' +wait 800000 ; 587307 +key_output ' ' +wait 800000 ; 479104 +key_output ' ' +wait 800000 ; 479360 +key_output ' ' +wait 800000 ; 490944 +key_output ' ' +wait 800000 ; 638464 +key_output ' ' +wait 800000 ; 619008 +key_output ' ' +wait 1000000 + +csl_load 'SHAKE26A-3' \ No newline at end of file diff --git a/OSBindings/Mac/Clock SignalTests/Shaker/MODULE B/SHAKE26B-0.CSL b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE B/SHAKE26B-0.CSL new file mode 100644 index 000000000..1c7731399 --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE B/SHAKE26B-0.CSL @@ -0,0 +1,390 @@ +; +; Fichier de script CSL +; Execution du module SHAKE26B du DSK SHAKER26.DSK en CRTC 0 +; Le module genere des instructions au format SSM +; +csl_version 1.0 +crtc_select 0 +reset +wait 3000000 +disk_insert 'shaker26.dsk' +key_delay 70000 70000 400000 +key_output 'RUN"SHAKE26B"\(RET)' +wait 10000000 +; +; test 1 interlace c4/c9 counters R9 base=07 Parity Odd +key_output '1' +wait 5000000 ; Ecran settings, ecran intermediaire +wait 7000000 ; 1er ecran +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; menu +key_output 'Y' ; bascule sur parity Even (R9 Base=7) +wait 300000 +; +key_output '1' +wait 5000000 ; Ecran settings, ecran intermediaire +wait 7000000 ; 1er ecran +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; menu +key_output 'Z' ; Passe sur R9 BASE=6 (parity Even) +wait 300000 +; +key_output '1' +wait 5000000 ; Ecran settings, ecran intermediaire +wait 7000000 ; 1er ecran +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; menu +; +key_output 'Y' ; bascule sur parity Odd (R9 base=6) +wait 300000 +key_output '1' +wait 5000000 ; Ecran settings, ecran intermediaire +wait 7000000 ; 1er ecran +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; menu +; +; test 9 (garder la foi tu dois, mecreant) +key_output '9' ; En Odd +wait 20000000 ; +key_output ' ' +wait 20000000 +key_output ' ' +wait 1000000 +; +key_output 'Y' ; Repasser en Even +wait 100000 +key_output '9' ; En even +wait 20000000 ; +key_output ' ' +wait 20000000 +key_output ' ' +wait 1000000 +; +key_output '0' ; vertical sub pixel scroll +wait 1000000 ; 816677 1/8 +key_output ' ' +wait 1000000 ; 890842 1/16 +key_output ' ' +wait 1000000 ; 830950 1/32 +key_output ' ' +wait 1000000 ; 870899 1/64 +key_output ' ' +wait 1000000 ; 830965 1/128 +key_output ' ' +wait 1000000 ; menu +; +; +key_output '4' ; +wait 2000000 ; 1913669 +wait 900000 ; 730624 +key_output ' ' +wait 900000 ; 730624 +key_output ' ' +wait 900000 ; 730624 +key_output ' ' +wait 900000 ; 730624 +key_output ' ' +wait 900000 ; 730624 +key_output ' ' +wait 900000 ; 730624 +key_output ' ' +wait 900000 ; 730624 +key_output ' ' +wait 1000000 ; +key_output ' ' +wait 1000000 ; menu +; +key_output '5' ; rlal crtc 2 (tous crtc) +wait 900000 +key_output ' ' +wait 2000000 +key_output ' ' ; Menu +wait 1000000 +; +; +key_output '\(RET)' +wait 800000 ; 632429 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +key_output ' ' +wait 800000 ; 647344 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +key_output ' ' +wait 800000 ; 667312 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +key_output ' ' +wait 1000000 +; +;Test Bounga +key_output '\(FN0)' +wait 30000000 ; ??? +key_output ' ' +wait 1000000 +; +; Test RVNI LTD +; +key_output '\(CAP)' +wait 6000000 ; 753563 +key_output ' ' +wait 6000000 ; 727728 +key_output ' ' +wait 6000000 ; 728880 +key_output ' ' +wait 6000000 +; +; Shaker Killer Don't be afraid +; +key_output 'R' +wait 5000000 ; 2615301 z80aintb +key_output ' ' +wait 6000000 ; 4692484 r52Reset +key_output ' ' +wait 9000000 ; 7867387 Inter Test IM1 +key_output ' ' +wait 9000000 ; 6888966 Inter Test IM2 +key_output ' ' +wait 3000000 ; 1711766 R52 Incr +key_output ' ' +wait 900000 ; 486262 Otir Zone +key_output ' ' +wait 1000000 ; menu +; +; R3 JIT +key_output 'I' +wait 1000000 ; 474622 +key_output ' ' +wait 1000000 ; 519168 +key_output ' ' +wait 1000000 ; 519168 +key_output ' ' +wait 1000000 ; 499200 +key_output ' ' +wait 1000000 ; 619008 +key_output ' ' +wait 1000000 ; 619008 +key_output ' ' +wait 1000000 ; 619008 +key_output ' ' +wait 1000000 ; 599040 +key_output ' ' +wait 1000000 ; Menu +; +; test crtc 0,1 only +; +key_output '\(COP)' +wait 1000000 ; 787700 +key_output ' ' +wait 1000000 ; 778752 +key_output ' ' +wait 2000000 ; 702326+19968 +key_output ' ' +wait 2000000 ; 835656 +key_output ' ' +wait 2000000 ; 924826 +key_output ' ' +wait 4000000 +; +; +; test crtc 1 , ouvert aux autres CRTCs +; +key_output '6' +wait 10000000 ; 1676617 +key_output ' ' +wait 1000000 +; +; test crtc 0 only +; +key_output '7' ; resultat a verifier +wait 800000 ; 613742 +wait 600000 ; 511808 +wait 2000000 ; 1277952 +wait 5000000 ; 3833856 +wait 2000000 ; 1277952 +wait 5000000 ; 3833856 +wait 2000000 ; 1277952 +key_output ' ' +wait 800000 ; 533680 +wait 6000000 ; 5111808 +wait 2000000 ; 1277952 +wait 6000000 ; 3833856 +wait 2000000 ; 1277952 +wait 6000000 ; 3833856 +wait 2000000 ; 1277952 +key_output ' ' +wait 800000 ; 565936 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 2000000 ; 1277952 +wait 6000000 ; 3833856 +wait 2000000 ; 1277952 +key_output ' ' +key_output ' ' +wait 800000 ; 565936 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 2000000 ; 1277952 +wait 6000000 ; 3833856 +wait 2000000 ; 1277952 +key_output ' ' +wait 1000000 ; menu +; +; test crtc 0 only +; +key_output 'U' +wait 1200000 ; +key_output ' ' ; A +wait 1200000 ; +key_output ' ' ; B +wait 1200000 ; +key_output ' ' ; C +wait 1200000 ; +key_output ' ' ; D +wait 1200000 ; +key_output ' ' ; E +wait 1200000 ; +key_output ' ' ; F +wait 1200000 ; +key_output ' ' ; G +wait 1200000 ; +key_output ' ' ; H +wait 1200000 ; +key_output ' ' ; I +wait 1200000 ; +key_output ' ' ; J +wait 1200000 ; +key_output ' ' ; K +wait 1200000 ; +key_output ' ' ; L +wait 1200000 ; +key_output ' ' ; M +wait 1200000 ; +key_output ' ' ; N +wait 1200000 ; +key_output ' ' ; O +wait 1200000 ; +key_output ' ' ; P +wait 1200000 ; +key_output ' ' ; Q +wait 1200000 ; +key_output ' ' ; R +wait 1200000 ; +key_output ' ' ; S +wait 1200000 ; +; +; Test Analyzer des premieres heures +; +key_output 'P' +wait 100000000 ; 12828735+638976 +key_output ' ' +wait 100000000 ; 5440000+638976 +key_output ' ' +wait 100000000 ; 11637760+638976 +key_output ' ' +wait 100000000 ; 13560624+638976 +key_output ' ' +wait 1000000 + +csl_load 'SHAKE26B-1' \ No newline at end of file diff --git a/OSBindings/Mac/Clock SignalTests/Shaker/MODULE B/SHAKE26B-1.CSL b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE B/SHAKE26B-1.CSL new file mode 100644 index 000000000..320858e85 --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE B/SHAKE26B-1.CSL @@ -0,0 +1,278 @@ +; +; Fichier de script CSL +; Execution du module SHAKE26B du DSK SHAKER26.DSK en CRTC 1 +; Le module genere des instructions au format SSM +; +csl_version 1.0 +crtc_select 1A +reset +wait 3000000 +disk_insert 'shaker26.dsk' +key_delay 70000 70000 400000 +key_output 'RUN"SHAKE26B"\(RET)' +wait 10000000 +; +; test 1 interlace c4/c9 counters R9 base=07 +key_output '1' +wait 5000000 ; Ecran settings, ecran intermediaire +wait 7000000 ; 1er ecran +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; menu +; +key_output 'Z' ; Passe sur R9 BASE=6 +wait 300000 +; +key_output '1' +wait 5000000 ; Ecran settings, ecran intermediaire +wait 7000000 ; 1er ecran +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; menu +; +; test 9 (garder la foi tu dois, mecreant) +key_output '9' +wait 20000000 ; +key_output ' ' +wait 20000000 +key_output ' ' +wait 1000000 +; +key_output '0' ; vertical sub pixel scroll +wait 1000000 ; 816677 1/8 +key_output ' ' +wait 1000000 ; 890842 1/16 +key_output ' ' +wait 1000000 ; 830950 1/32 +key_output ' ' +wait 1000000 ; 870899 1/64 +key_output ' ' +wait 1000000 ; 830965 1/128 +key_output ' ' +wait 1000000 ; menu +; +key_output '4' ; +wait 2000000 ; 1913669 +wait 900000 ; 730624 +key_output ' ' +wait 900000 ; 730624 +key_output ' ' +wait 900000 ; 730624 +key_output ' ' +wait 900000 ; 730624 +key_output ' ' +wait 900000 ; 730624 +key_output ' ' +wait 900000 ; 730624 +key_output ' ' +wait 900000 ; 730624 +key_output ' ' +wait 1000000 ; +key_output ' ' +wait 1000000 ; menu +; +key_output '5' ; rlal crtc 2 (tous crtc) +wait 900000 +key_output ' ' +wait 2000000 +key_output ' ' ; Menu +wait 1000000 +; +; +key_output '\(RET)' +wait 800000 ; 632429 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +key_output ' ' +wait 800000 ; 647344 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +key_output ' ' +wait 800000 ; 667312 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +key_output ' ' +wait 1000000 +; +;Test Bounga +key_output '\(FN0)' +wait 30000000 ; ??? +key_output ' ' +wait 1000000 +; +; Test RVNI LTD +; +key_output '\(CAP)' +wait 6000000 ; 753563 +key_output ' ' +wait 6000000 ; 727728 +key_output ' ' +wait 6000000 ; 728880 +key_output ' ' +wait 6000000 +; +; Shaker Killer Don't be afraid +; +key_output 'R' +wait 5000000 ; 2615301 z80aintb +key_output ' ' +wait 6000000 ; 4692484 r52Reset +key_output ' ' +wait 9000000 ; 7867387 Inter Test IM1 +key_output ' ' +wait 9000000 ; 6888966 Inter Test IM2 +key_output ' ' +wait 3000000 ; 1711766 R52 Incr +key_output ' ' +wait 900000 ; 486262 Otir Zone +key_output ' ' +wait 1000000 ; menu +; +; R3 JIT +key_output 'I' +wait 1000000 ; 474622 +key_output ' ' +wait 1000000 ; 519168 +key_output ' ' +wait 1000000 ; 519168 +key_output ' ' +wait 1000000 ; 499200 +key_output ' ' +wait 1000000 ; 619008 +key_output ' ' +wait 1000000 ; 619008 +key_output ' ' +wait 1000000 ; 619008 +key_output ' ' +wait 1000000 ; 599040 +key_output ' ' +wait 1000000 ; Menu +; +; test crtc 0,1 only +; +key_output '\(COP)' +wait 1000000 ; 787700 +key_output ' ' +wait 1000000 ; 778752 +key_output ' ' +wait 2000000 ; 702326+19968 +key_output ' ' +wait 2000000 ; 835656 +key_output ' ' +wait 2000000 ; 924826 +key_output ' ' +wait 4000000 +; +; +; test crtc 1 , ouvert aux autres CRTCs +; +key_output '6' +wait 10000000 ; 1676617 +key_output ' ' +wait 1000000 +; +; test crtc 1 only : identification crtc 1A/1B +; pour le 1A +key_output 'O' +wait 500000 ; 336980 +key_output ' ' +wait 1000000 +; +; +; test crtc 1 only : BE00 check +; +key_output 'S' +wait 5000000 ; 1976392 +key_output ' ' +wait 1000000 +; +; +; Test Analyzer des premieres heures +; +key_output 'P' +wait 100000000 ; 12828735+638976 +key_output ' ' +wait 100000000 ; 5440000+638976 +key_output ' ' +wait 100000000 ; 11637760+638976 +key_output ' ' +wait 100000000 ; 13560624+638976 +key_output ' ' +wait 1000000 +; +; Test RFD +; +key_output '\(CTR)' +wait 10000000 +; +; Si la selection de crtc en cours de route pose prb sortir ce test +; +crtc_select 1B +; +; test crtc 1 only : identification crtc 1A/1B +; pour le 1B +key_output 'E' +wait 500000 ; 336980 +key_output ' ' +wait 1000000 +; +csl_load 'SHAKE26B-2' \ No newline at end of file diff --git a/OSBindings/Mac/Clock SignalTests/Shaker/MODULE B/SHAKE26B-2.CSL b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE B/SHAKE26B-2.CSL new file mode 100644 index 000000000..ef806a1de --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE B/SHAKE26B-2.CSL @@ -0,0 +1,306 @@ +; +; Fichier de script CSL +; Execution du module SHAKE26B du DSK SHAKER26.DSK en CRTC 2 +; Le module genere des instructions au format SSM +; +csl_version 1.0 +crtc_select 2 +reset +wait 3000000 +disk_insert 'shaker26.dsk' +key_delay 70000 70000 400000 +key_output 'RUN"SHAKE26B"\(RET)' +wait 10000000 +; +; test 1 interlace c4/c9 counters R9 base=07 Parity Odd +key_output '1' +wait 5000000 ; Ecran settings, ecran intermediaire +wait 7000000 ; 1er ecran +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; menu +key_output 'Y' ; bascule sur parity Even (R9 Base=7) +wait 300000 +; +key_output '1' +wait 5000000 ; Ecran settings, ecran intermediaire +wait 7000000 ; 1er ecran +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; menu +key_output 'Z' ; Passe sur R9 BASE=6 (parity Even) +wait 300000 +; +key_output '1' +wait 5000000 ; Ecran settings, ecran intermediaire +wait 7000000 ; 1er ecran +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; menu +; +key_output 'Y' ; bascule sur parity Odd (R9 base=6) +wait 300000 +key_output '1' +wait 5000000 ; Ecran settings, ecran intermediaire +wait 7000000 ; 1er ecran +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; menu +; +; test 9 (garder la foi tu dois, mecreant) +key_output '9' ; En Odd +wait 20000000 ; +key_output ' ' +wait 20000000 +key_output ' ' +wait 1000000 +; +key_output 'Y' ; Repasser en Even +wait 100000 +key_output '9' ; En even +wait 20000000 ; +key_output ' ' +wait 20000000 +key_output ' ' +wait 1000000 +; +key_output '0' ; vertical sub pixel scroll +wait 1000000 ; 816677 1/8 +key_output ' ' +wait 1000000 ; 890842 1/16 +key_output ' ' +wait 1000000 ; 830950 1/32 +key_output ' ' +wait 1000000 ; 870899 1/64 +key_output ' ' +wait 1000000 ; 830965 1/128 +key_output ' ' +wait 1000000 ; menu +; +; ** crtc 2 only Even mode 1 ecran +key_output '2' ; +wait 3000000 ; 1245718 +key_output ' ' ; +wait 1000000 ; menu +key_output 'Y' ; repasser en Odd +key_output '2' +wait 3000000 ; 1245718 +key_output ' ' ; +wait 3000000 ; 1245718 2 ecrans +; +key_output '4' ; +wait 2000000 ; 1913669 +wait 900000 ; 730624 +key_output ' ' +wait 900000 ; 730624 +key_output ' ' +wait 900000 ; 730624 +key_output ' ' +wait 900000 ; 730624 +key_output ' ' +wait 900000 ; 730624 +key_output ' ' +wait 900000 ; 730624 +key_output ' ' +wait 900000 ; 730624 +key_output ' ' +wait 1000000 ; +key_output ' ' +wait 1000000 ; menu +; +key_output '5' ; rlal crtc 2 (tous crtc) +wait 900000 +key_output ' ' +wait 2000000 +key_output ' ' ; Menu +wait 1000000 +; +; +key_output '\(RET)' +wait 800000 ; 632429 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +key_output ' ' +wait 800000 ; 647344 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +key_output ' ' +wait 800000 ; 667312 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +key_output ' ' +wait 1000000 +; +;Test Bounga +key_output '\(FN0)' +wait 30000000 ; ??? +key_output ' ' +wait 1000000 +; +; Test RVNI LTD +; +key_output '\(CAP)' +wait 6000000 ; 753563 +key_output ' ' +wait 6000000 ; 727728 +key_output ' ' +wait 6000000 ; 728880 +key_output ' ' +wait 6000000 +; +; Shaker Killer Don't be afraid +; +key_output 'R' +wait 5000000 ; 2615301 z80aintb +key_output ' ' +wait 6000000 ; 4692484 r52Reset +key_output ' ' +wait 9000000 ; 7867387 Inter Test IM1 +key_output ' ' +wait 9000000 ; 6888966 Inter Test IM2 +key_output ' ' +wait 3000000 ; 1711766 R52 Incr +key_output ' ' +wait 900000 ; 486262 Otir Zone +key_output ' ' +wait 1000000 ; menu +; +; R3 JIT +key_output 'I' +wait 1000000 ; 474622 +key_output ' ' +wait 1000000 ; 519168 +key_output ' ' +wait 1000000 ; 519168 +key_output ' ' +wait 1000000 ; 499200 +key_output ' ' +wait 1000000 ; 619008 +key_output ' ' +wait 1000000 ; 619008 +key_output ' ' +wait 1000000 ; 619008 +key_output ' ' +wait 1000000 ; 599040 +key_output ' ' +wait 1000000 ; Menu +; +; test crtc 1 , ouvert aux autres CRTCs +; +key_output '6' +wait 20000000 ; 1676617 +key_output ' ' +wait 1000000 +; +; +; Test Analyzer des premieres heures +; +key_output 'P' +wait 100000000 ; 12828735+638976 +key_output ' ' +wait 100000000 ; 5440000+638976 +key_output ' ' +wait 100000000 ; 11637760+638976 +key_output ' ' +wait 100000000 ; 13560624+638976 +key_output ' ' +wait 1000000 + +csl_load 'SHAKE26B-4' \ No newline at end of file diff --git a/OSBindings/Mac/Clock SignalTests/Shaker/MODULE B/SHAKE26B-3.CSL b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE B/SHAKE26B-3.CSL new file mode 100644 index 000000000..c536aff21 --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE B/SHAKE26B-3.CSL @@ -0,0 +1,242 @@ +; +; Fichier de script CSL +; Execution du module SHAKE26B du DSK SHAKER26.DSK en CRTC 3 +; Le module genere des instructions au format SSM +; +csl_version 1.0 +crtc_select 3 +reset +wait 3000000 +disk_insert 'shaker26.dsk' +key_delay 70000 70000 400000 +key_output 'RUN"SHAKE26B"\(RET)' +wait 10000000 +; +; test 1 interlace c4/c9 counters R9 base=07 +key_output '1' +wait 5000000 ; Ecran settings, ecran intermediaire +wait 7000000 ; 1er ecran +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; menu +; +key_output 'Z' ; Passe sur R9 BASE=6 +wait 300000 +; +key_output '1' +wait 5000000 ; Ecran settings, ecran intermediaire +wait 7000000 ; 1er ecran +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; menu +; +; test 9 (garder la foi tu dois, mecreant) +key_output '9' +wait 20000000 ; +key_output ' ' +wait 20000000 +key_output ' ' +wait 1000000 +; +key_output 'Y' ; Repasser en Even +wait 100000 +key_output '9' ; En even +wait 20000000 ; +key_output ' ' +wait 20000000 +key_output ' ' +wait 1000000 +; +key_output '0' ; vertical sub pixel scroll +wait 1000000 ; 816677 1/8 +key_output ' ' +wait 1000000 ; 890842 1/16 +key_output ' ' +wait 1000000 ; 830950 1/32 +key_output ' ' +wait 1000000 ; 870899 1/64 +key_output ' ' +wait 1000000 ; 830965 1/128 +key_output ' ' +wait 1000000 ; menu +; +key_output '4' ; +wait 2000000 ; 1913669 +wait 900000 ; 730624 +key_output ' ' +wait 900000 ; 730624 +key_output ' ' +wait 900000 ; 730624 +key_output ' ' +wait 900000 ; 730624 +key_output ' ' +wait 900000 ; 730624 +key_output ' ' +wait 900000 ; 730624 +key_output ' ' +wait 900000 ; 730624 +key_output ' ' +wait 1000000 ; +key_output ' ' +wait 1000000 ; menu +; +key_output '5' ; rlal crtc 2 (tous crtc) +wait 900000 +key_output ' ' +wait 2000000 +key_output ' ' ; Menu +wait 1000000 +; +; +key_output '\(RET)' +wait 800000 ; 632429 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +key_output ' ' +wait 800000 ; 647344 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +key_output ' ' +wait 800000 ; 667312 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +key_output ' ' +wait 1000000 +; +;Test Bounga +key_output '\(FN0)' +wait 30000000 ; ??? +key_output ' ' +wait 1000000 +; +; Test RVNI LTD +; +key_output '\(CAP)' +wait 6000000 ; 753563 +key_output ' ' +wait 6000000 ; 727728 +key_output ' ' +wait 6000000 ; 728880 +key_output ' ' +wait 6000000 +; +; Shaker Killer Don't be afraid +; +key_output 'R' +wait 5000000 ; 2615301 z80aintb +key_output ' ' +wait 6000000 ; 4692484 r52Reset +key_output ' ' +wait 9000000 ; 7867387 Inter Test IM1 +key_output ' ' +wait 9000000 ; 6888966 Inter Test IM2 +key_output ' ' +wait 3000000 ; 1711766 R52 Incr +key_output ' ' +wait 900000 ; 486262 Otir Zone +key_output ' ' +wait 1000000 ; menu +; +; R3 JIT +key_output 'I' +wait 1000000 ; 474622 +key_output ' ' +wait 1000000 ; 519168 +key_output ' ' +wait 1000000 ; 519168 +key_output ' ' +wait 1000000 ; 499200 +key_output ' ' +wait 1000000 ; 619008 +key_output ' ' +wait 1000000 ; 619008 +key_output ' ' +wait 1000000 ; 619008 +key_output ' ' +wait 1000000 ; 599040 +key_output ' ' +wait 1000000 ; Menu +; +; +; test crtc 1 , ouvert aux autres CRTCs +; +key_output '6' +wait 2000000 ; 1676617 +key_output ' ' +wait 1000000 + +; +; Test Analyzer des premieres heures +; +key_output 'P' +wait 100000000 ; 12828735+638976 +key_output ' ' +wait 100000000 ; 5440000+638976 +key_output ' ' +wait 100000000 ; 11637760+638976 +key_output ' ' +wait 100000000 ; 13560624+638976 +key_output ' ' +wait 1000000 +; +reset +; \ No newline at end of file diff --git a/OSBindings/Mac/Clock SignalTests/Shaker/MODULE B/SHAKE26B-4.CSL b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE B/SHAKE26B-4.CSL new file mode 100644 index 000000000..f54c20e28 --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE B/SHAKE26B-4.CSL @@ -0,0 +1,241 @@ +; +; Fichier de script CSL +; Execution du module SHAKE26B du DSK SHAKER26.DSK en CRTC 4 +; Le module genere des instructions au format SSM +; +csl_version 1.0 +crtc_select 4 +reset +wait 3000000 +disk_insert 'shaker26.dsk' +key_delay 70000 70000 400000 +key_output 'RUN"SHAKE26B"\(RET)' +wait 10000000 +; +; test 1 interlace c4/c9 counters R9 base=06 +key_output '1' +wait 5000000 ; Ecran settings, ecran intermediaire +wait 7000000 ; 1er ecran +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; menu +; +key_output 'X' ; Passe sur R9 BASE=7 +wait 300000 +; +key_output '1' +wait 5000000 ; Ecran settings, ecran intermediaire +wait 7000000 ; 1er ecran +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; 5251584 +key_output ' ' +wait 7000000 ; menu +; +; test 9 (garder la foi tu dois, mecreant) +key_output '9' +wait 20000000 ; +key_output ' ' +wait 20000000 +key_output ' ' +wait 1000000 +; +key_output 'Y' ; Repasser en Even +wait 100000 +key_output '9' ; En even +wait 20000000 ; +key_output ' ' +wait 20000000 +key_output ' ' +wait 1000000 +; +key_output '0' ; vertical sub pixel scroll +wait 1000000 ; 816677 1/8 +key_output ' ' +wait 1000000 ; 890842 1/16 +key_output ' ' +wait 1000000 ; 830950 1/32 +key_output ' ' +wait 1000000 ; 870899 1/64 +key_output ' ' +wait 1000000 ; 830965 1/128 +key_output ' ' +wait 1000000 ; menu +; +key_output '4' ; +wait 2000000 ; 1913669 +wait 900000 ; 730624 +key_output ' ' +wait 900000 ; 730624 +key_output ' ' +wait 900000 ; 730624 +key_output ' ' +wait 900000 ; 730624 +key_output ' ' +wait 900000 ; 730624 +key_output ' ' +wait 900000 ; 730624 +key_output ' ' +wait 900000 ; 730624 +key_output ' ' +wait 1000000 ; +key_output ' ' +wait 1000000 ; menu +; +key_output '5' ; rlal crtc 2 (tous crtc) +wait 900000 +key_output ' ' +wait 2000000 +key_output ' ' ; Menu +wait 1000000 +; +; +key_output '\(RET)' +wait 800000 ; 632429 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +key_output ' ' +wait 800000 ; 647344 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +key_output ' ' +wait 800000 ; 667312 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +wait 6000000 ; 5111808 +key_output ' ' +wait 1000000 +; +;Test Bounga +key_output '\(FN0)' +wait 50000000 ; ??? +key_output ' ' +wait 1000000 +; +; Test RVNI LTD +; +key_output '\(CAP)' +wait 6000000 ; 753563 +key_output ' ' +wait 6000000 ; 727728 +key_output ' ' +wait 6000000 ; 728880 +key_output ' ' +wait 6000000 +; +; Shaker Killer Don't be afraid +; +key_output 'R' +wait 5000000 ; 2615301 z80aintb +key_output ' ' +wait 6000000 ; 4692484 r52Reset +key_output ' ' +wait 9000000 ; 7867387 Inter Test IM1 +key_output ' ' +wait 9000000 ; 6888966 Inter Test IM2 +key_output ' ' +wait 3000000 ; 1711766 R52 Incr +key_output ' ' +wait 900000 ; 486262 Otir Zone +key_output ' ' +wait 1000000 ; menu +; +; R3 JIT +key_output 'I' +wait 1000000 ; 474622 +key_output ' ' +wait 1000000 ; 519168 +key_output ' ' +wait 1000000 ; 519168 +key_output ' ' +wait 1000000 ; 499200 +key_output ' ' +wait 1000000 ; 619008 +key_output ' ' +wait 1000000 ; 619008 +key_output ' ' +wait 1000000 ; 619008 +key_output ' ' +wait 1000000 ; 599040 +key_output ' ' +wait 1000000 ; Menu +; +; +; test crtc 1 , ouvert aux autres CRTCs +; +key_output '6' +wait 12000000 ; 1676617 +key_output ' ' +wait 1000000 + +; +; Test Analyzer des premieres heures +; +key_output 'P' +wait 100000000 ; 12828735+638976 +key_output ' ' +wait 100000000 ; 5440000+638976 +key_output ' ' +wait 100000000 ; 11637760+638976 +key_output ' ' +wait 100000000 ; 13560624+638976 +key_output ' ' +wait 1000000 +; +csl_load 'SHAKE26B-3' \ No newline at end of file diff --git a/OSBindings/Mac/Clock SignalTests/Shaker/MODULE C/SHAKE26C-0.CSL b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE C/SHAKE26C-0.CSL new file mode 100644 index 000000000..ed724fffb --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE C/SHAKE26C-0.CSL @@ -0,0 +1,96 @@ +; +; Fichier de script CSL +; Execution du module SHAKE26C du DSK SHAKER26.DSK en CRTC 0 +; Le module genere des instructions au format SSM +; +csl_version 1.0 +crtc_select 0 +reset +wait 3000000 +disk_insert 'shaker26.dsk' +key_delay 70000 70000 400000 +key_output 'RUN"SHAKE26C"\(RET)' +wait 10000000 +; +; test 5 Parity Check Select CRTC 0, 2 +key_output '5' +wait 10000000 +key_output ' ' +wait 1000000 ; menu + +; test prevu pour CRTC 2 mais disp autre crc Last Line cond +key_output '7' +wait 64000000 +key_output ' ' +wait 1000000 ; menu + +; test crtc 2 vma' sur R1=0 +key_output 'T' +wait 1100000 +key_output ' ' +wait 1200000 +key_output ' ' +wait 1200000 +key_output ' ' +wait 1200000 +key_output ' ' +wait 1000000 ; menu + +; crtc 2 ghost vsync vs Last Line (others crtc welcome) +key_output '\(RET)' +wait 5000000 +key_output ' ' +wait 2000000 +key_output ' ' +wait 1000000 ; menu + +; Add Line R5 on last line +key_output 'E' +wait 10000000 +key_output ' ' +wait 5000000 +key_output ' ' +wait 1000000 ; menu + +; Add line R8 +key_output 'P' +wait 12000000 +key_output ' ' +wait 1000000 ; menu + +; r5 additional line in interlace mode +key_output 'S' +wait 2000000 +key_output ' ' +wait 1000000 ; menu + +; CRTC 0,3,4 Interlace vsync nightmare (2 1er test uniqu CRTC1) +key_output 'O' +wait 4000000 +key_output ' ' +wait 6000000 +key_output ' ' +wait 1000000 +wait 8000000 +key_output ' ' +wait 9000000 +key_output ' ' +wait 9000000 +key_output ' ' +wait 10000000 +key_output ' ' +wait 9000000 +key_output ' ' +wait 10000000 +key_output ' ' +wait 10000000 +key_output ' ' +wait 1000000 ; menu + +; R9/R4 UPD LAST LIMIT +key_output 'R' +wait 5000000 +key_output ' ' +wait 10000000 ; menu + +csl_load 'SHAKE26C-1' \ No newline at end of file diff --git a/OSBindings/Mac/Clock SignalTests/Shaker/MODULE C/SHAKE26C-1.CSL b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE C/SHAKE26C-1.CSL new file mode 100644 index 000000000..2c41dc58b --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE C/SHAKE26C-1.CSL @@ -0,0 +1,187 @@ +; +; Fichier de script CSL +; Execution du module SHAKE26C du DSK SHAKER26.DSK en CRTC 1 +; Le module genere des instructions au format SSM +; +csl_version 1.0 +crtc_select 1 +reset +wait 3000000 +disk_insert 'shaker26.dsk' +key_delay 70000 70000 400000 +key_output 'RUN"SHAKE26C"\(RET)' +wait 10000000 +; +; R8 IVM ODD C9 +key_output '2' +wait 1000000 +key_output ' ' +wait 1000000 +key_output ' ' +wait 1000000 +key_output ' ' +wait 1000000 +key_output ' ' +wait 1000000 +key_output ' ' +wait 1000000 +key_output ' ' +wait 1000000 +key_output ' ' +wait 1000000 +key_output ' ' +wait 1000000 +key_output ' ' +wait 1000000 ; menu + +; Parity Switch Status +key_output '3' +wait 5000000 +key_output ' ' +wait 1000000 ; menu + +; Ivm On/Off +key_output '4' +wait 800000 ; 23D +key_output ' ' +wait 1000000 ; 23E +key_output ' ' +wait 1000000 ; 23F +key_output ' ' +wait 1000000 ; 27F +key_output ' ' +wait 1000000 ; 280 +key_output ' ' +wait 1000000 ; 281 +key_output ' ' +wait 1000000 ; 282 +key_output ' ' +wait 1000000 ; 283 +key_output ' ' +wait 1000000 ; 284 +key_output ' ' +wait 1000000 ; 285, 286 +key_output ' ' +wait 1000000 ; 287, 288 +key_output ' ' +wait 1000000 ; 289 +key_output ' ' +wait 1000000 ; 28A +key_output ' ' +wait 1000000 ; 28B +key_output ' ' +wait 1000000 ; 28c +key_output ' ' +wait 1000000 ; 28d +key_output ' ' +wait 1000000 ; 28e +key_output ' ' +wait 1000000 ; 28f +key_output ' ' +wait 1000000 ; 290 +key_output ' ' +wait 1000000 ; 291 +key_output ' ' +wait 1000000 ; 292 +key_output ' ' +wait 1000000 ; 293 +key_output ' ' +wait 1000000 ; 294 +key_output ' ' +wait 1000000 ; 295 +key_output ' ' +wait 1000000 ; 296, 297 +key_output ' ' +wait 1000000 ; 298, 299 +key_output ' ' +wait 1000000 ; 29a +key_output ' ' +wait 1000000 ; 29b +key_output ' ' +wait 1000000 ; 29c +key_output ' ' +wait 1000000 ; 29d +key_output ' ' + +; test prevu pour CRTC 2 mais disp autre crc Last Line cond +key_output '7' +wait 64000000 +key_output ' ' +wait 1000000 ; menu + +; test crtc 2 vma' sur R1=0 +key_output 'T' +wait 1100000 +key_output ' ' +wait 1200000 +key_output ' ' +wait 1200000 +key_output ' ' +wait 1200000 +key_output ' ' +wait 1000000 ; menu + +; crtc 2 ghost vsync vs Last Line (others crtc welcome) +key_output '\(RET)' +wait 5000000 +key_output ' ' +wait 2000000 +key_output ' ' +wait 1000000 ; menu + +; Add Line R5 on last line +key_output 'E' +wait 20000000 +key_output ' ' +wait 10000000 +key_output ' ' +wait 1000000 ; menu + +; Add line R8 +key_output 'P' +wait 20000000 +key_output ' ' +wait 1000000 ; menu + +; r5 additional line in interlace mode +key_output 'S' +wait 4000000 +key_output ' ' +wait 1000000 ; menu + +; CRTC 1 Interlace vsync nightmare (2 1er test uniqu CRTC1) +key_output 'O' +wait 12000000 ; cvsct1_a +key_output ' ' +wait 6000000 ; cvsct1_b +key_output ' ' +wait 3500000 ; cvstot +key_output ' ' +wait 2000000 ; parity00 +wait 8000000 +key_output ' ' +wait 6000000 ; cvms_a +key_output ' ' +wait 6000000 ; cvms_b +key_output ' ' +wait 6000000 ; cvms_b +key_output ' ' +wait 6000000 ; cvms_c +key_output ' ' +wait 6000000 ; cvms_c +key_output ' ' +wait 3000000 ; parity01a +key_output ' ' +wait 3000000 ; parity01b +key_output ' ' +wait 3000000 ; parity01c +key_output ' ' +wait 3000000 ; parity01d +key_output ' ' +wait 3000000 ; parity01e +key_output ' ' +wait 3000000 ; parity01f +key_output ' ' +wait 1000000 + +csl_load 'SHAKE26C-2' \ No newline at end of file diff --git a/OSBindings/Mac/Clock SignalTests/Shaker/MODULE C/SHAKE26C-2.CSL b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE C/SHAKE26C-2.CSL new file mode 100644 index 000000000..761966518 --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE C/SHAKE26C-2.CSL @@ -0,0 +1,154 @@ +; +; Fichier de script CSL +; Execution du module SHAKE26C du DSK SHAKER26.DSK en CRTC 2 +; Le module genere des instructions au format SSM +; +csl_version 1.0 +crtc_select 2 +reset +wait 3000000 +disk_insert 'shaker26.dsk' +key_delay 70000 70000 400000 +key_output 'RUN"SHAKE26C"\(RET)' +wait 10000000 +; +; test 5 Parity Check Select CRTC 0, 2 +key_output '5' +wait 10000000 +key_output ' ' +wait 1000000 ; menu + +; C9 IVM Switch +key_output '6' +wait 1200000 ; 29f +key_output ' ' +wait 1200000 ; 2a4 +key_output ' ' +wait 1200000 ; 2a5 +key_output ' ' +wait 1200000 ; 2a6 +key_output ' ' +wait 1200000 ; 2a7 +key_output ' ' +wait 1200000 ; 2ac +key_output ' ' +wait 1200000 ; 2ad +key_output ' ' +wait 1200000 ; 2ae +key_output ' ' +wait 1200000 ; 2af +key_output ' ' +wait 1200000 ; 2b4 +key_output ' ' +wait 1200000 ; 2b5 +key_output ' ' +wait 1200000 ; 2b6 +key_output ' ' +wait 1200000 ; 2b7 +key_output ' ' +wait 1200000 ; 2bc +key_output ' ' +wait 1200000 ; 2bd +key_output ' ' +wait 1200000 ; 2be +key_output ' ' +wait 1000000 ; menu + + +; test prevu pour CRTC 2 mais disp autre crc Last Line cond +key_output '7' +wait 64000000 +key_output ' ' +wait 1000000 ; menu +; +; add line on parity bug +key_output '8' +wait 2000000 ; 2c0 +key_output ' ' +wait 2000000 ; 2c1 +key_output ' ' +wait 2000000 ; 2c2 +key_output ' ' +wait 2000000 ; 2c3 +key_output ' ' +wait 2000000 ; 2c4 +key_output ' ' +wait 2000000 ; 2c5 +key_output ' ' +wait 2000000 ; 2c6 +key_output ' ' +wait 1000000 ; menu + +; add line rq & trigger +key_output '9' +wait 2000000 ; 2c7 +key_output ' ' +wait 300000000 +key_output ' ' + +; test crtc 2 vma' sur R1=0 +key_output 'T' +wait 1100000 +key_output ' ' +wait 1200000 +key_output ' ' +wait 1200000 +key_output ' ' +wait 1200000 +key_output ' ' +wait 1000000 ; menu + +; crtc 2 ghost vsync vs Last Line (others crtc welcome) +key_output '\(RET)' +wait 5000000 +key_output ' ' +wait 2000000 +key_output ' ' +wait 1000000 ; menu + +; Add Line R5 on last line +key_output 'E' +wait 20000000 +key_output ' ' +wait 10000000 +key_output ' ' +wait 1000000 ; menu + +; Add line R8 +key_output 'P' +wait 20000000 +key_output ' ' +wait 1000000 ; menu + +; r5 additional line in interlace mode +key_output 'S' +wait 2000000 +key_output ' ' +wait 1000000 ; menu + +; CRTC 2 Interlace vsync nightmare (2 1er test uniqu CRTC1) +key_output 'O' +wait 6000000 ; cvstot +key_output ' ' +wait 2000000 ; parity00 2d8 +wait 8000000 ; 2d9 +key_output ' ' +wait 10000000 ; cvms_a ; 2da +key_output ' ' +wait 10000000 ; cvms_b ; 2db +key_output ' ' +wait 10000000 ; cvms_b ; 2dc +key_output ' ' +wait 10000000 ; cvms_c ; 2dd +key_output ' ' +wait 10000000 ; cvms_c ; 2de +key_output ' ' +wait 10000000 ; menu + +; R9/R4 UPD LAST LIMIT +key_output 'R' +wait 5000000 ; 3ad +key_output ' ' +wait 10000000 ; menu + +csl_load 'SHAKE26C-4' ; corrected from cls_load \ No newline at end of file diff --git a/OSBindings/Mac/Clock SignalTests/Shaker/MODULE C/SHAKE26C-3.CSL b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE C/SHAKE26C-3.CSL new file mode 100644 index 000000000..ccd58e9b6 --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE C/SHAKE26C-3.CSL @@ -0,0 +1,94 @@ +; +; Fichier de script CSL +; Execution du module SHAKE26C du DSK SHAKER26.DSK en CRTC 3 +; Le module genere des instructions au format SSM +; +csl_version 1.0 +crtc_select 3 +reset +wait 3000000 +disk_insert 'shaker26.dsk' +key_delay 70000 70000 400000 +key_output 'RUN"SHAKE26C"\(RET)' +wait 10000000 + +; test prevu pour CRTC 2 mais disp autre crc Last Line cond +key_output '7' +wait 64000000 +key_output ' ' +wait 1000000 ; menu +; +; test crtc 2 vma' sur R1=0 +key_output 'T' +wait 1100000 +key_output ' ' +wait 1200000 +key_output ' ' +wait 1200000 +key_output ' ' +wait 1200000 +key_output ' ' +wait 1000000 ; menu + +; crtc 2 ghost vsync vs Last Line (others crtc welcome) +key_output '\(RET)' +wait 5000000 ; 2cd +key_output ' ' +wait 2000000 ; 2ce +key_output ' ' +wait 1000000 ; menu + +; Add Line R5 on last line +key_output 'E' +wait 10000000 ; 2c9 +key_output ' ' +wait 5000000 ; 2ca +key_output ' ' +wait 1000000 ; menu + +; r5 additional line in interlace mode +key_output 'S' +wait 2000000 ; 2d3 +key_output ' ' +wait 1000000 ; menu + +; CRTC 2 Interlace vsync nightmare (2 1er test uniqu CRTC1) +key_output 'O' +wait 6000000 ; cvstot 2d6 +key_output ' ' +wait 3500000 ; cvstot 2d7 +key_output ' ' +wait 2000000 ; parity00 +wait 8000000 +key_output ' ' +wait 10000000 ; cvms_a 2d8 +key_output ' ' +wait 10000000 ; cvms_b +key_output ' ' +wait 10000000 ; cvms_b +key_output ' ' +wait 10000000 ; cvms_c +key_output ' ' +wait 10000000 ; cvms_c +key_output ' ' +wait 10000000 ; menu + +; Y crtc 3/4 parity +key_output 'Y' +wait 4500000 ; 2df +key_output ' ' +wait 1000000 ; 2e0 +key_output ' ' +wait 1000000 ; 2e1 +key_output ' ' +wait 1000000 ; 2e2 +key_output ' ' +wait 10000000 ; menu + +; R9/R4 UPD LAST LIMIT +key_output 'R' +wait 5000000 +key_output ' ' +wait 10000000 ; menu + +reset \ No newline at end of file diff --git a/OSBindings/Mac/Clock SignalTests/Shaker/MODULE C/SHAKE26C-4.CSL b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE C/SHAKE26C-4.CSL new file mode 100644 index 000000000..efd2f791b --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE C/SHAKE26C-4.CSL @@ -0,0 +1,94 @@ +; +; Fichier de script CSL +; Execution du module SHAKE26C du DSK SHAKER26.DSK en CRTC 4 +; Le module genere des instructions au format SSM +; +csl_version 1.0 +crtc_select 4 +reset +wait 3000000 +disk_insert 'shaker26.dsk' +key_delay 70000 70000 400000 +key_output 'RUN"SHAKE26C"\(RET)' +wait 10000000 + +; test prevu pour CRTC 2 mais disp autre crc Last Line cond +key_output '7' +wait 64000000 +key_output ' ' +wait 1000000 ; menu +; +; test crtc 2 vma' sur R1=0 +key_output 'T' +wait 1100000 +key_output ' ' +wait 1200000 +key_output ' ' +wait 1200000 +key_output ' ' +wait 1200000 +key_output ' ' +wait 1000000 ; menu + +; crtc 2 ghost vsync vs Last Line (others crtc welcome) +key_output '\(RET)' +wait 5000000 ; 2cd +key_output ' ' +wait 2000000 ; 2ce +key_output ' ' +wait 1000000 ; menu + +; Add Line R5 on last line +key_output 'E' +wait 10000000 ; 2c9 +key_output ' ' +wait 5000000 ; 2ca +key_output ' ' +wait 1000000 ; menu + +; r5 additional line in interlace mode +key_output 'S' +wait 2000000 ; 2d3 +key_output ' ' +wait 1000000 ; menu + +; CRTC 2 Interlace vsync nightmare (2 1er test uniqu CRTC1) +key_output 'O' +wait 6000000 ; cvstot 2d6 +key_output ' ' +wait 3500000 ; cvstot 2d7 +key_output ' ' +wait 2000000 ; parity00 +wait 8000000 +key_output ' ' +wait 10000000 ; cvms_a 2d8 +key_output ' ' +wait 10000000 ; cvms_b +key_output ' ' +wait 10000000 ; cvms_b +key_output ' ' +wait 10000000 ; cvms_c +key_output ' ' +wait 10000000 ; cvms_c +key_output ' ' +wait 10000000 ; menu + +; Y crtc 3/4 parity +key_output 'Y' +wait 4500000 ; 2df +key_output ' ' +wait 1000000 ; 2e0 +key_output ' ' +wait 1000000 ; 2e1 +key_output ' ' +wait 1000000 ; 2e2 +key_output ' ' +wait 10000000 ; menu + +; R9/R4 UPD LAST LIMIT +key_output 'R' +wait 5000000 +key_output ' ' +wait 10000000 ; menu + +csl_load 'SHAKE26C-3' \ No newline at end of file diff --git a/OSBindings/Mac/Clock SignalTests/Shaker/MODULE D/SHAKE26D-0.CSL b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE D/SHAKE26D-0.CSL new file mode 100644 index 000000000..50bef1179 --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE D/SHAKE26D-0.CSL @@ -0,0 +1,201 @@ +; +; Fichier de script CSL +; Execution du module SHAKE26D du DSK SHAKER26.DSK en CRTC 0 +; Le module genere des instructions au format SSM +; +csl_version 1.0 +crtc_select 0 +reset +wait 3000000 +disk_insert 'shaker26.dsk' +key_delay 70000 70000 400000 +key_output 'RUN"SHAKE26D"\(RET)' +wait 10000000 +; +; SHAKER KILLER 2 +key_output 'I' +wait 2000000 ; 2e3 ecran bleu +key_output ' ' +wait 2000000 ; 2e4 +key_output ' ' +wait 2000000 ; 2e5 +key_output ' ' +wait 2000000 ; 2e6 +key_output ' ' +wait 2000000 ; 2e7 +key_output ' ' +wait 2000000 ; 2e8 +key_output ' ' +wait 2000000 ; 2e9 +key_output ' ' +wait 1000000 ; menu + +; VSYNC TORTURE (LOCK MECHANISM) +; Eventuellement ajouter des SS sur les 3 tests desync crtc 0 +key_output 'R' +wait 22000000 ; 2ea +key_output ' ' +wait 1000000 ; menu + +; VSYNC/CSYNC GATE ARRAY +key_output 'T' +wait 800000 ; 2eb +key_output ' ' +wait 2000000 ; 2ec +key_output ' ' +wait 2000000 ; 2ed +key_output ' ' +wait 2000000 ; 2ee +key_output ' ' +wait 2000000 ; 2ef +key_output ' ' +wait 2000000 ; 2ef +key_output ' ' +wait 2000000 ; 2f0 +key_output ' ' +wait 2000000 ; 2f1 +key_output ' ' +wait 2000000 ; 2f2 +key_output ' ' +wait 2000000 ; 2f3 +key_output ' ' +wait 2000000 ; 2f4 +key_output ' ' +wait 2000000 ; 2f5 +key_output ' ' +wait 2000000 ; 2fb +key_output ' ' +wait 8000000 ; 2fc 2fd +key_output ' ' +wait 4000000 ; 2fe +key_output ' ' +wait 4000000 ; 2ff +key_output ' ' +wait 4000000 ; 300 +key_output ' ' +wait 4000000 ; 301 +key_output ' ' +wait 1000000 +key_delay 90000 +key_output ' ' +key_output ' ' +wait 1000000 ; menu + + +; HSYNC CSYNC GATE ARRAY +key_output 'H' +wait 1000000 ; 306 +key_output ' ' +wait 1200000 ; 307 +key_output ' ' +wait 1200000 ; 308 +key_output ' ' +wait 1200000 ; 309 +key_output ' ' +wait 1200000 ; 30A +key_output ' ' +wait 1200000 ; 30B +key_output ' ' +wait 1200000 ; 30C +key_output ' ' +wait 1200000 ; 30D +key_output ' ' +wait 1200000 ; 30E +key_output ' ' +wait 1200000 ; 30F +key_output ' ' +wait 1000000 ; menu + +; CSYNC4 VS 2XCSYNC2 +; +key_output '1' +wait 4600000 ; 310 +wait 4000000 ; 311 +wait 8000000 +key_output ' ' +wait 1000000 ; menu + +; R2JIT >> NO CSYNC UPD +; +key_output '2' +wait 4500000 ; 312 +wait 4000000 ; 313 +wait 4000000 +key_output ' ' +wait 10000000 +key_output ' ' +wait 1000000 + +; 2 CSYNC RELATIVE; +key_output '3' +wait 1000000 +key_output ' ' +wait 1000000 +key_output ' ' +wait 1000000 +key_output ' ' +wait 1000000 +key_output ' ' +wait 1000000 +key_output ' ' +wait 1000000 + +; CSYNC MULTIPLES +key_output '4' +wait 1000000 ; 37f +key_output ' ' +wait 3000000 ; 380 +key_output ' ' +wait 1000000 + +; Hardware scroll 1 pixel mode 1/0 (no buffering) +key_output '6' +wait 10000000 ; 381 +key_output ' ' +wait 10000000 ; 382 +key_output ' ' +wait 1000000 + +; +; R2 oscillation story; +key_output '7' +wait 10000000 ; 383 +key_output ' ' +wait 4000000 ; 384 +key_output ' ' +wait 4000000 ; 385 +key_output ' ' +wait 4000000 ; 386 +key_output ' ' +wait 4000000 ; 387 +key_output ' ' +wait 4000000 ; 388 +key_output ' ' +wait 4000000 ; 389 +key_output ' ' +wait 4000000 ; 38a +key_output ' ' +wait 4000000 ; 38b +key_output ' ' +wait 4000000 ; 38c +key_output ' ' +wait 1000000 ; menu +; +; no hsync for xx line +key_output '8' +wait 3000000 ; 38d +key_output ' ' +wait 3000000 ; 38e +key_output ' ' +wait 3000000 ; 38f +key_output ' ' +wait 3000000 ; 390 +key_output ' ' +wait 3000000 ; 391 +key_output ' ' +wait 3000000 ; 392 +key_output ' ' +wait 1000000 ; menu + + +csl_load 'SHAKE26D-1' \ No newline at end of file diff --git a/OSBindings/Mac/Clock SignalTests/Shaker/MODULE D/SHAKE26D-1.CSL b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE D/SHAKE26D-1.CSL new file mode 100644 index 000000000..b7c4fd486 --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE D/SHAKE26D-1.CSL @@ -0,0 +1,238 @@ +; +; Fichier de script CSL +; Execution du module SHAKE26D du DSK SHAKER26.DSK en CRTC 1 +; Le module genere des instructions au format SSM +; +csl_version 1.0 +crtc_select 1 +reset +wait 3000000 +disk_insert 'shaker26.dsk' +key_delay 70000 70000 400000 +key_output 'RUN"SHAKE26D"\(RET)' +wait 10000000 +; +; SHAKER KILLER 2 +key_output 'I' +wait 2000000 ; 2e3 ecran bleu +key_output ' ' +wait 2000000 ; 2e4 +key_output ' ' +wait 2000000 ; 2e5 +key_output ' ' +wait 2000000 ; 2e6 +key_output ' ' +wait 2000000 ; 2e7 +key_output ' ' +wait 2000000 ; 2e8 +key_output ' ' +wait 2000000 ; 2e9 +key_output ' ' +wait 1000000 ; menu + +; VSYNC TORTURE (LOCK MECHANISM) +; Eventuellement ajouter des SS sur les 3 tests desync crtc 0 +key_output 'R' +wait 22000000 ; 2ea +key_output ' ' +wait 1000000 ; menu + +; VSYNC/CSYNC GATE ARRAY +key_output 'T' +wait 800000 ; 2eb +key_output ' ' +wait 2000000 ; 2ec +key_output ' ' +wait 2000000 ; 2ed +key_output ' ' +wait 2000000 ; 2ee +key_output ' ' +wait 2000000 ; 2ef +key_output ' ' +wait 2000000 ; 2ef +key_output ' ' +wait 2000000 ; 2f0 +key_output ' ' +wait 2000000 ; 2f1 +key_output ' ' +wait 2000000 ; 2f2 +key_output ' ' +wait 2000000 ; 2f3 +key_output ' ' +wait 2000000 ; 2f4 +key_output ' ' +wait 2000000 ; 2f5 +key_output ' ' +wait 2000000 ; 2fb +key_output ' ' +wait 8000000 ; 2fc 2fd +key_output ' ' +wait 4000000 ; 2fe +key_output ' ' +wait 4000000 ; 2ff +key_output ' ' +wait 4000000 ; 300 +key_output ' ' +wait 4000000 ; 301 +key_output ' ' +wait 1000000 +key_delay 90000 +key_output ' ' +key_output ' ' +wait 1000000 ; menu + +; HSYNC CSYNC GATE ARRAY +key_output 'H' +wait 1000000 ; 306 +key_output ' ' +wait 1200000 ; 307 +key_output ' ' +wait 1200000 ; 308 +key_output ' ' +wait 1200000 ; 309 +key_output ' ' +wait 1200000 ; 30A +key_output ' ' +wait 1200000 ; 30B +key_output ' ' +wait 1200000 ; 30C +key_output ' ' +wait 1200000 ; 30D +key_output ' ' +wait 1200000 ; 30E +key_output ' ' +wait 1200000 ; 30F +key_output ' ' +wait 1000000 ; menu + +; CSYNC4 VS 2XCSYNC2 +; +key_output '1' +wait 4600000 ; 310 +wait 4000000 ; 311 +wait 8000000 +key_output ' ' +wait 1000000 ; menu + +; R2JIT >> NO CSYNC UPD +; +key_output '2' +wait 4500000 ; 312 +wait 4000000 ; 313 +wait 4000000 +key_output ' ' +wait 10000000 +key_output ' ' +wait 1000000 + +; 2 CSYNC RELATIVE; +key_output '3' +wait 1000000 +key_output ' ' +wait 1000000 +key_output ' ' +wait 1000000 +key_output ' ' +wait 1000000 +key_output ' ' +wait 1000000 +key_output ' ' +wait 1000000 + +; CSYNC MULTIPLES +key_output '4' +wait 1000000 ; 37f +key_output ' ' +wait 3000000 ; 380 +key_output ' ' +wait 1000000 + +; Hardware scroll 1 pixel mode 1/0 (no buffering) +key_output '6' +wait 10000000 ; 381 +key_output ' ' +wait 10000000 ; 382 +key_output ' ' +wait 1000000 + +; +; R2 oscillation story; +key_output '7' +wait 10000000 ; 383 +key_output ' ' +wait 4000000 ; 384 +key_output ' ' +wait 4000000 ; 385 +key_output ' ' +wait 4000000 ; 386 +key_output ' ' +wait 4000000 ; 387 +key_output ' ' +wait 4000000 ; 388 +key_output ' ' +wait 4000000 ; 389 +key_output ' ' +wait 4000000 ; 38a +key_output ' ' +wait 4000000 ; 38b +key_output ' ' +wait 4000000 ; 38c +key_output ' ' +wait 1000000 ; menu +; +; no hsync for xx line +key_output '8' +wait 3000000 ; 38d +key_output ' ' +wait 3000000 ; 38e +key_output ' ' +wait 3000000 ; 38f +key_output ' ' +wait 3000000 ; 390 +key_output ' ' +wait 3000000 ; 391 +key_output ' ' +wait 3000000 ; 392 +key_output ' ' + +; rfd round 2 +; +key_output '9' +wait 2000000 ; 393, 3f7 +key_output ' ' +wait 2000000 ; 394, 3f8 +key_output ' ' +wait 2000000 ; 395, 3f9 +key_output ' ' +wait 2000000 ; 396 +key_output ' ' +wait 2000000 ; 397 +key_output ' ' +wait 2000000 ; 398 +key_output ' ' +wait 2000000 ; 399 +key_output ' ' +wait 2000000 ; 39a +key_output ' ' +wait 2000000 ; 39b +key_output ' ' +wait 1000000 ; menu + +; ofs upd in add managment +; +key_output 'E' +wait 1000000 ; 3ae +key_output ' ' +wait 1000000 ; 3af +key_output ' ' +wait 1000000 ; 3b4 +key_output ' ' +wait 1000000 ; 3b5 +key_output ' ' +wait 1000000 ; 3b6 +key_output ' ' +wait 1000000 ; 3b7 +key_output ' ' +wait 1000000 ; menu + +csl_load 'SHAKE26D-2' \ No newline at end of file diff --git a/OSBindings/Mac/Clock SignalTests/Shaker/MODULE D/SHAKE26D-2.CSL b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE D/SHAKE26D-2.CSL new file mode 100644 index 000000000..609458da0 --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE D/SHAKE26D-2.CSL @@ -0,0 +1,199 @@ +; +; Fichier de script CSL +; Execution du module SHAKE26D du DSK SHAKER26.DSK en CRTC 2 +; Le module genere des instructions au format SSM +; +csl_version 1.0 +crtc_select 2 +reset +wait 3000000 +disk_insert 'shaker26.dsk' +key_delay 70000 70000 400000 +key_output 'RUN"SHAKE26D"\(RET)' +wait 10000000 +; +; SHAKER KILLER 2 +key_output 'I' +wait 2000000 ; 2e3 ecran bleu +key_output ' ' +wait 2000000 ; 2e4 +key_output ' ' +wait 2000000 ; 2e5 +key_output ' ' +wait 2000000 ; 2e6 +key_output ' ' +wait 2000000 ; 2e7 +key_output ' ' +wait 2000000 ; 2e8 +key_output ' ' +wait 2000000 ; 2e9 +key_output ' ' +wait 1000000 ; menu + +; VSYNC TORTURE (LOCK MECHANISM) +; Eventuellement ajouter des SS sur les 3 tests desync crtc 0 +key_output 'R' +wait 22000000 ; 2ea +key_output ' ' +wait 1000000 ; menu + +; VSYNC/CSYNC GATE ARRAY +key_output 'T' +wait 800000 ; 2eb +key_output ' ' +wait 2000000 ; 2ec +key_output ' ' +wait 2000000 ; 2ed +key_output ' ' +wait 2000000 ; 2ee +key_output ' ' +wait 2000000 ; 2ef +key_output ' ' +wait 2000000 ; 2ef +key_output ' ' +wait 2000000 ; 2f0 +key_output ' ' +wait 2000000 ; 2f1 +key_output ' ' +wait 2000000 ; 2f2 +key_output ' ' +wait 2000000 ; 2f3 +key_output ' ' +wait 2000000 ; 2f4 +key_output ' ' +wait 2000000 ; 2f5 +key_output ' ' +wait 2000000 ; 2fb +key_output ' ' +wait 8000000 ; 2fc 2fd +key_output ' ' +wait 4000000 ; 2fe +key_output ' ' +wait 4000000 ; 2ff +key_output ' ' +wait 4000000 ; 300 +key_output ' ' +wait 4000000 ; 301 +key_output ' ' +wait 1000000 +key_delay 90000 +key_output ' ' +key_output ' ' +wait 1000000 ; menu + +; HSYNC CSYNC GATE ARRAY +key_output 'H' +wait 1000000 ; 306 +key_output ' ' +wait 1200000 ; 307 +key_output ' ' +wait 1200000 ; 308 +key_output ' ' +wait 1200000 ; 309 +key_output ' ' +wait 1200000 ; 30A +key_output ' ' +wait 1200000 ; 30B +key_output ' ' +wait 1200000 ; 30C +key_output ' ' +wait 1200000 ; 30D +key_output ' ' +wait 1200000 ; 30E +key_output ' ' +wait 1200000 ; 30F +key_output ' ' +wait 1000000 ; menu + +; CSYNC4 VS 2XCSYNC2 +; +key_output '1' +wait 4600000 ; 310 +wait 4000000 ; 311 +wait 8000000 +key_output ' ' +wait 1000000 ; menu + +; R2JIT >> NO CSYNC UPD +; +key_output '2' +wait 4500000 ; 312 +wait 4000000 ; 313 +wait 4000000 +key_output ' ' +wait 10000000 +key_output ' ' +wait 1000000 + +; 2 CSYNC RELATIVE; +key_output '3' +wait 1000000 +key_output ' ' +wait 1000000 +key_output ' ' +wait 1000000 +key_output ' ' +wait 1000000 +key_output ' ' +wait 1000000 +key_output ' ' +wait 1000000 + +; CSYNC MULTIPLES +key_output '4' +wait 1000000 ; 37f +key_output ' ' +wait 3000000 ; 380 +key_output ' ' +wait 1000000 + +; Hardware scroll 1 pixel mode 1/0 (no buffering) +key_output '6' +wait 10000000 ; 381 +key_output ' ' +wait 10000000 ; 382 +key_output ' ' +wait 1000000 +; +; R2 oscillation story; +key_output '7' +wait 10000000 ; 383 +key_output ' ' +wait 4000000 ; 384 +key_output ' ' +wait 4000000 ; 385 +key_output ' ' +wait 4000000 ; 386 +key_output ' ' +wait 4000000 ; 387 +key_output ' ' +wait 4000000 ; 388 +key_output ' ' +wait 4000000 ; 389 +key_output ' ' +wait 4000000 ; 38a +key_output ' ' +wait 4000000 ; 38b +key_output ' ' +wait 4000000 ; 38c +key_output ' ' +wait 1000000 ; menu +; +; no hsync for xx line +key_output '8' +wait 3000000 ; 38d +key_output ' ' +wait 3000000 ; 38e +key_output ' ' +wait 3000000 ; 38f +key_output ' ' +wait 3000000 ; 390 +key_output ' ' +wait 3000000 ; 391 +key_output ' ' +wait 3000000 ; 392 +key_output ' ' +wait 1000000 ; menu + + +csl_load 'SHAKE26D-4' \ No newline at end of file diff --git a/OSBindings/Mac/Clock SignalTests/Shaker/MODULE D/SHAKE26D-3.CSL b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE D/SHAKE26D-3.CSL new file mode 100644 index 000000000..41bcd1693 --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE D/SHAKE26D-3.CSL @@ -0,0 +1,285 @@ +; +; Fichier de script CSL +; Execution du module SHAKE26D du DSK SHAKER26.DSK en CRTC 4 +; Le module genere des instructions au format SSM +; +csl_version 1.0 +crtc_select 3 +reset +wait 3000000 +disk_insert 'shaker26.dsk' +key_delay 70000 70000 400000 +key_output 'RUN"SHAKE26D"\(RET)' +wait 10000000 +; +; SHAKER KILLER 2 +key_output 'I' +wait 2000000 ; 2e3 ecran bleu +key_output ' ' +wait 2000000 ; 2e4 +key_output ' ' +wait 2000000 ; 2e5 +key_output ' ' +wait 2000000 ; 2e6 +key_output ' ' +wait 2000000 ; 2e7 +key_output ' ' +wait 2000000 ; 2e8 +key_output ' ' +wait 2000000 ; 2e9 +key_output ' ' +wait 1000000 ; menu + +; VSYNC TORTURE (LOCK MECHANISM) +; Eventuellement ajouter des SS sur les 3 tests desync crtc 0 +key_output 'R' +wait 22000000 ; 2ea +key_output ' ' +wait 1000000 ; menu + +; VSYNC/CSYNC GATE ARRAY +key_output 'T' +wait 800000 ; 2eb +key_output ' ' +wait 2000000 ; 2ec +key_output ' ' +wait 2000000 ; 2ed +key_output ' ' +wait 2000000 ; 2ee +key_output ' ' +wait 2000000 ; 2ef +key_output ' ' +wait 2000000 ; 2ef +key_output ' ' +wait 2000000 ; 2f0 +key_output ' ' +wait 2000000 ; 2f1 +key_output ' ' +wait 2000000 ; 2f2 +key_output ' ' +wait 2000000 ; 2f3 +key_output ' ' +wait 2000000 ; 2f4 +key_output ' ' +wait 2000000 ; 2f5 +key_output ' ' +wait 2000000 ; 2fb +key_output ' ' +wait 8000000 ; 2fc 2fd +key_output ' ' +wait 4000000 ; 2fe +key_output ' ' +wait 4000000 ; 2ff +key_output ' ' +wait 4000000 ; 300 +key_output ' ' +wait 4000000 ; 301 +key_output ' ' +wait 1000000 +key_delay 90000 +key_output ' ' +key_output ' ' +wait 1000000 ; menu + +; HSYNC CSYNC GATE ARRAY +key_output 'H' +wait 1000000 ; 306 +key_output ' ' +wait 1200000 ; 307 +key_output ' ' +wait 1200000 ; 308 +key_output ' ' +wait 1200000 ; 309 +key_output ' ' +wait 1200000 ; 30A +key_output ' ' +wait 1200000 ; 30B +key_output ' ' +wait 1200000 ; 30C +key_output ' ' +wait 1200000 ; 30D +key_output ' ' +wait 1200000 ; 30E +key_output ' ' +wait 1200000 ; 30F +key_output ' ' +wait 1000000 ; menu + +; CSYNC4 VS 2XCSYNC2 +; +key_output '1' +wait 4600000 ; 310 +wait 4000000 ; 311 +wait 8000000 +key_output ' ' +wait 1000000 ; menu + +; R2JIT >> NO CSYNC UPD +; +key_output '2' +wait 4500000 ; 312 +wait 4000000 ; 313 +wait 4000000 +key_output ' ' +wait 10000000 +key_output ' ' +wait 1000000 + +; 2 CSYNC RELATIVE; +key_output '3' +wait 1000000 +key_output ' ' +wait 1000000 +key_output ' ' +wait 1000000 +key_output ' ' +wait 1000000 +key_output ' ' +wait 1000000 +key_output ' ' +wait 1000000 + +; CSYNC MULTIPLES +key_output '4' +wait 1000000 ; 37f +key_output ' ' +wait 3000000 ; 380 +key_output ' ' +wait 1000000 + +; Hardware scroll 1 pixel mode 1/0 (no buffering) +key_output '6' +wait 10000000 ; 381 +key_output ' ' +wait 10000000 ; 382 +key_output ' ' +wait 1000000 + +; +; R2 oscillation story; +key_output '7' +wait 10000000 ; 383 +key_output ' ' +wait 4000000 ; 384 +key_output ' ' +wait 4000000 ; 385 +key_output ' ' +wait 4000000 ; 386 +key_output ' ' +wait 4000000 ; 387 +key_output ' ' +wait 4000000 ; 388 +key_output ' ' +wait 4000000 ; 389 +key_output ' ' +wait 4000000 ; 38a +key_output ' ' +wait 4000000 ; 38b +key_output ' ' +wait 4000000 ; 38c +key_output ' ' +wait 1000000 ; menu +; +; no hsync for xx line +key_output '8' +wait 3000000 ; 38d +key_output ' ' +wait 3000000 ; 38e +key_output ' ' +wait 3000000 ; 38f +key_output ' ' +wait 3000000 ; 390 +key_output ' ' +wait 3000000 ; 391 +key_output ' ' +wait 3000000 ; 392 +key_output ' ' +wait 1000000 ; menu + +; +; CRTC 3/4 STATUS +key_output 'U' +wait 10000000 ; 3bc +key_output ' ' +wait 10000000 ; 3bd +key_output ' ' +wait 10000000 ; 3be +key_output ' ' +wait 15000000 ; 3bf +key_output ' ' +wait 45000000 ; 3c0 +key_output ' ' +wait 10000000 ; 3c1 +key_output ' ' +wait 4000000 ; 3c2 +key_output ' ' +wait 4000000 ; 3c3 +key_output ' ' +wait 4000000 ; 3c4 +key_output ' ' +wait 4000000 ; 3c5 +key_output ' ' +wait 4000000 ; 3c6 +key_output ' ' +wait 4000000 ; 3c7 +key_output ' ' +wait 4000000 ; 3c8 +key_output ' ' +wait 4000000 ; 3c9 +key_output ' ' +wait 4000000 ; 3ca +key_output ' ' +wait 4000000 ; 3cb +key_output ' ' +wait 4000000 ; 3cc +key_output ' ' +wait 4000000 ; 3cd +key_output ' ' +wait 4000000 ; 3ce +key_output ' ' +wait 4000000 ; 3cf +key_output ' ' +wait 4000000 ; 3d0 +key_output ' ' +wait 4000000 ; 3d1 +key_output ' ' +wait 4000000 ; 3d2 +key_output ' ' +wait 4000000 ; 3d3 +key_output ' ' +wait 4000000 ; 3d4 +key_output ' ' +wait 4000000 ; 3d5 +key_output ' ' +wait 4000000 ; 3d6 +key_output ' ' +wait 4000000 ; 3d7 +key_output ' ' +wait 4000000 ; 3d8 +key_output ' ' +wait 4000000 ; 3d9 +key_output ' ' +wait 4000000 ; 3da +key_output ' ' +wait 4000000 ; 3db +key_output ' ' +wait 4000000 ; 3dc +key_output ' ' +wait 4000000 ; 3dd +key_output ' ' +wait 4000000 ; 3de +key_output ' ' +wait 4000000 ; 3df +key_output ' ' +wait 4000000 ; 3e0 +key_output ' ' +wait 4000000 ; 3e1 +key_output ' ' +wait 4000000 ; 3e2 +key_output ' ' +wait 4000000 ; 3e3 +key_output ' ' +wait 4000000 ; 3e4 +key_output ' ' +wait 4000000 ; menu +reset diff --git a/OSBindings/Mac/Clock SignalTests/Shaker/MODULE D/SHAKE26D-4.CSL b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE D/SHAKE26D-4.CSL new file mode 100644 index 000000000..dc2efadd9 --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE D/SHAKE26D-4.CSL @@ -0,0 +1,286 @@ +; +; Fichier de script CSL +; Execution du module SHAKE26D du DSK SHAKER26.DSK en CRTC 4 +; Le module genere des instructions au format SSM +; +csl_version 1.0 +crtc_select 4 +reset +wait 3000000 +disk_insert 'shaker26.dsk' +key_delay 70000 70000 400000 +key_output 'RUN"SHAKE26D"\(RET)' +wait 10000000 +; +; SHAKER KILLER 2 +key_output 'I' +wait 2000000 ; 2e3 ecran bleu +key_output ' ' +wait 2000000 ; 2e4 +key_output ' ' +wait 2000000 ; 2e5 +key_output ' ' +wait 2000000 ; 2e6 +key_output ' ' +wait 2000000 ; 2e7 +key_output ' ' +wait 2000000 ; 2e8 +key_output ' ' +wait 2000000 ; 2e9 +key_output ' ' +wait 1000000 ; menu + +; VSYNC TORTURE (LOCK MECHANISM) +; Eventuellement ajouter des SS sur les 3 tests desync crtc 0 +key_output 'R' +wait 22000000 ; 2ea +key_output ' ' +wait 1000000 ; menu + +; VSYNC/CSYNC GATE ARRAY +key_output 'T' +wait 800000 ; 2eb +key_output ' ' +wait 2000000 ; 2ec +key_output ' ' +wait 2000000 ; 2ed +key_output ' ' +wait 2000000 ; 2ee +key_output ' ' +wait 2000000 ; 2ef +key_output ' ' +wait 2000000 ; 2ef +key_output ' ' +wait 2000000 ; 2f0 +key_output ' ' +wait 2000000 ; 2f1 +key_output ' ' +wait 2000000 ; 2f2 +key_output ' ' +wait 2000000 ; 2f3 +key_output ' ' +wait 2000000 ; 2f4 +key_output ' ' +wait 2000000 ; 2f5 +key_output ' ' +wait 2000000 ; 2fb +key_output ' ' +wait 8000000 ; 2fc 2fd +key_output ' ' +wait 4000000 ; 2fe +key_output ' ' +wait 4000000 ; 2ff +key_output ' ' +wait 4000000 ; 300 +key_output ' ' +wait 4000000 ; 301 +key_output ' ' +wait 1000000 +key_delay 90000 +key_output ' ' +key_output ' ' +wait 1000000 ; menu + +; HSYNC CSYNC GATE ARRAY +key_output 'H' +wait 1000000 ; 306 +key_output ' ' +wait 1200000 ; 307 +key_output ' ' +wait 1200000 ; 308 +key_output ' ' +wait 1200000 ; 309 +key_output ' ' +wait 1200000 ; 30A +key_output ' ' +wait 1200000 ; 30B +key_output ' ' +wait 1200000 ; 30C +key_output ' ' +wait 1200000 ; 30D +key_output ' ' +wait 1200000 ; 30E +key_output ' ' +wait 1200000 ; 30F +key_output ' ' +wait 1000000 ; menu + +; CSYNC4 VS 2XCSYNC2 +; +key_output '1' +wait 4600000 ; 310 +wait 4000000 ; 311 +wait 8000000 +key_output ' ' +wait 1000000 ; menu + +; R2JIT >> NO CSYNC UPD +; +key_output '2' +wait 4500000 ; 312 +wait 4000000 ; 313 +wait 4000000 +key_output ' ' +wait 10000000 +key_output ' ' +wait 1000000 + +; 2 CSYNC RELATIVE; +key_output '3' +wait 1000000 +key_output ' ' +wait 1000000 +key_output ' ' +wait 1000000 +key_output ' ' +wait 1000000 +key_output ' ' +wait 1000000 +key_output ' ' +wait 1000000 + +; CSYNC MULTIPLES +key_output '4' +wait 1000000 ; 37f +key_output ' ' +wait 3000000 ; 380 +key_output ' ' +wait 1000000 + +; Hardware scroll 1 pixel mode 1/0 (no buffering) +key_output '6' +wait 10000000 ; 381 +key_output ' ' +wait 10000000 ; 382 +key_output ' ' +wait 1000000 + +; +; R2 oscillation story; +key_output '7' +wait 10000000 ; 383 +key_output ' ' +wait 4000000 ; 384 +key_output ' ' +wait 4000000 ; 385 +key_output ' ' +wait 4000000 ; 386 +key_output ' ' +wait 4000000 ; 387 +key_output ' ' +wait 4000000 ; 388 +key_output ' ' +wait 4000000 ; 389 +key_output ' ' +wait 4000000 ; 38a +key_output ' ' +wait 4000000 ; 38b +key_output ' ' +wait 4000000 ; 38c +key_output ' ' +wait 1000000 ; menu +; +; no hsync for xx line +key_output '8' +wait 3000000 ; 38d +key_output ' ' +wait 3000000 ; 38e +key_output ' ' +wait 3000000 ; 38f +key_output ' ' +wait 3000000 ; 390 +key_output ' ' +wait 3000000 ; 391 +key_output ' ' +wait 3000000 ; 392 +key_output ' ' +wait 1000000 ; menu + +; +; CRTC 3/4 STATUS +key_output 'U' +wait 10000000 ; 3bc +key_output ' ' +wait 10000000 ; 3bd +key_output ' ' +wait 10000000 ; 3be +key_output ' ' +wait 15000000 ; 3bf +key_output ' ' +wait 45000000 ; 3c0 +key_output ' ' +wait 10000000 ; 3c1 +key_output ' ' +wait 4000000 ; 3c2 +key_output ' ' +wait 4000000 ; 3c3 +key_output ' ' +wait 4000000 ; 3c4 +key_output ' ' +wait 4000000 ; 3c5 +key_output ' ' +wait 4000000 ; 3c6 +key_output ' ' +wait 4000000 ; 3c7 +key_output ' ' +wait 4000000 ; 3c8 +key_output ' ' +wait 4000000 ; 3c9 +key_output ' ' +wait 4000000 ; 3ca +key_output ' ' +wait 4000000 ; 3cb +key_output ' ' +wait 4000000 ; 3cc +key_output ' ' +wait 4000000 ; 3cd +key_output ' ' +wait 4000000 ; 3ce +key_output ' ' +wait 4000000 ; 3cf +key_output ' ' +wait 4000000 ; 3d0 +key_output ' ' +wait 4000000 ; 3d1 +key_output ' ' +wait 4000000 ; 3d2 +key_output ' ' +wait 4000000 ; 3d3 +key_output ' ' +wait 4000000 ; 3d4 +key_output ' ' +wait 4000000 ; 3d5 +key_output ' ' +wait 4000000 ; 3d6 +key_output ' ' +wait 4000000 ; 3d7 +key_output ' ' +wait 4000000 ; 3d8 +key_output ' ' +wait 4000000 ; 3d9 +key_output ' ' +wait 4000000 ; 3da +key_output ' ' +wait 4000000 ; 3db +key_output ' ' +wait 4000000 ; 3dc +key_output ' ' +wait 4000000 ; 3dd +key_output ' ' +wait 4000000 ; 3de +key_output ' ' +wait 4000000 ; 3df +key_output ' ' +wait 4000000 ; 3e0 +key_output ' ' +wait 4000000 ; 3e1 +key_output ' ' +wait 4000000 ; 3e2 +key_output ' ' +wait 4000000 ; 3e3 +key_output ' ' +wait 4000000 ; 3e4 +key_output ' ' +wait 4000000 ; menu + +csl_load 'SHAKE26D-3' \ No newline at end of file diff --git a/OSBindings/Mac/Clock SignalTests/Shaker/MODULE E/SHAKE26E-0.CSL b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE E/SHAKE26E-0.CSL new file mode 100644 index 000000000..05abdace4 --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE E/SHAKE26E-0.CSL @@ -0,0 +1,37 @@ +; +; Fichier de script CSL +; Execution du module SHAKE26E du DSK SHAKER26.DSK en CRTC 0 +; Le module genere des instructions au format SSM +; +csl_version 1.0 +crtc_select 0 +reset +wait 3000000 +disk_insert 'shaker26.dsk' +key_delay 70000 70000 400000 +key_output 'RUN"SHAKE26E"\(RET)' +wait 10000000 +; +; R5 STORIES 2ND ROUND +key_output '1' +wait 2000000 ; 3fa +key_output ' ' +wait 2000000 ; 3fb +key_output ' ' +wait 2000000 ; 3fc +key_output ' ' +wait 2000000 ; 3fd +key_output ' ' +; +; +; CRTC 0 : C4/C9 COUNTER LOGIC +key_output '3' +wait 2000000 ; 403 +key_output ' ' +wait 2000000 ; 404 +key_output ' ' +wait 2000000 ; 405 +key_output ' ' +; +; +csl_load 'SHAKE26E-1' \ No newline at end of file diff --git a/OSBindings/Mac/Clock SignalTests/Shaker/MODULE E/SHAKE26E-1.CSL b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE E/SHAKE26E-1.CSL new file mode 100644 index 000000000..66f04deb0 --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE E/SHAKE26E-1.CSL @@ -0,0 +1,38 @@ +; +; Fichier de script CSL +; Execution du module SHAKE26E du DSK SHAKER26.DSK en CRTC 1 +; Le module genere des instructions au format SSM +; +csl_version 1.0 +crtc_select 1 +reset +wait 3000000 +disk_insert 'shaker26.dsk' +key_delay 70000 70000 400000 +key_output 'RUN"SHAKE26E"\(RET)' +wait 10000000 +; +; R5 STORIES 2ND ROUND +key_output '1' +wait 2000000 ; 3fa +key_output ' ' +wait 2000000 ; 3fb +key_output ' ' +wait 2000000 ; 3fc +key_output ' ' +wait 2000000 ; 3fd +key_output ' ' +; +; +; CRTC 1 : VMA TRT C4=R4=0 ON ADJ LINE +; +key_output '2' +wait 2000000 ; 400 +key_output ' ' +wait 2000000 ; 401 +key_output ' ' +wait 2000000 ; 402 +key_output ' ' +; +; +csl_load 'SHAKE26E-2' \ No newline at end of file diff --git a/OSBindings/Mac/Clock SignalTests/Shaker/MODULE E/SHAKE26E-2.CSL b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE E/SHAKE26E-2.CSL new file mode 100644 index 000000000..9ff24d678 --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE E/SHAKE26E-2.CSL @@ -0,0 +1,28 @@ +; +; Fichier de script CSL +; Execution du module SHAKE26E du DSK SHAKER26.DSK en CRTC 2 +; Le module genere des instructions au format SSM +; +csl_version 1.0 +crtc_select 2 +reset +wait 3000000 +disk_insert 'shaker26.dsk' +key_delay 70000 70000 400000 +key_output 'RUN"SHAKE26E"\(RET)' +wait 10000000 +; +; R5 STORIES 2ND ROUND +key_output '1' +wait 2000000 ; 3fa +key_output ' ' +wait 2000000 ; 3fb +key_output ' ' +wait 2000000 ; 3fc +key_output ' ' +wait 2000000 ; 3fd +key_output ' ' +; +; +; +csl_load 'SHAKE26E-4' \ No newline at end of file diff --git a/OSBindings/Mac/Clock SignalTests/Shaker/MODULE E/SHAKE26E-3.CSL b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE E/SHAKE26E-3.CSL new file mode 100644 index 000000000..e25fa783c --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE E/SHAKE26E-3.CSL @@ -0,0 +1,27 @@ +; +; Fichier de script CSL +; Execution du module SHAKE26E du DSK SHAKER26.DSK en CRTC 3 +; Le module genere des instructions au format SSM +; +csl_version 1.0 +crtc_select 3 +reset +wait 3000000 +disk_insert 'shaker26.dsk' +key_delay 70000 70000 400000 +key_output 'RUN"SHAKE26E"\(RET)' +wait 10000000 +; +; R5 STORIES 2ND ROUND +key_output '1' +wait 2000000 ; 3fa +key_output ' ' +wait 2000000 ; 3fb +key_output ' ' +wait 2000000 ; 3fc +key_output ' ' +wait 2000000 ; 3fd +key_output ' ' +; +; +; \ No newline at end of file diff --git a/OSBindings/Mac/Clock SignalTests/Shaker/MODULE E/SHAKE26E-4.CSL b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE E/SHAKE26E-4.CSL new file mode 100644 index 000000000..27684887e --- /dev/null +++ b/OSBindings/Mac/Clock SignalTests/Shaker/MODULE E/SHAKE26E-4.CSL @@ -0,0 +1,28 @@ +; +; Fichier de script CSL +; Execution du module SHAKE26E du DSK SHAKER26.DSK en CRTC 4 +; Le module genere des instructions au format SSM +; +csl_version 1.0 +crtc_select 4 +reset +wait 3000000 +disk_insert 'shaker26.dsk' +key_delay 70000 70000 400000 +key_output 'RUN"SHAKE26E"\(RET)' +wait 10000000 +; +; R5 STORIES 2ND ROUND +key_output '1' +wait 2000000 ; 3fa +key_output ' ' +wait 2000000 ; 3fb +key_output ' ' +wait 2000000 ; 3fc +key_output ' ' +wait 2000000 ; 3fd +key_output ' ' +; +; +; +csl_load 'SHAKE26E-3' \ No newline at end of file diff --git a/OSBindings/Mac/Clock SignalTests/Shaker/shaker26.dsk b/OSBindings/Mac/Clock SignalTests/Shaker/shaker26.dsk new file mode 100644 index 000000000..8965d5175 Binary files /dev/null and b/OSBindings/Mac/Clock SignalTests/Shaker/shaker26.dsk differ diff --git a/Storage/Automation/CSL.cpp b/Storage/Automation/CSL.cpp new file mode 100644 index 000000000..08368ee50 --- /dev/null +++ b/Storage/Automation/CSL.cpp @@ -0,0 +1,377 @@ +// +// CSL.cpp +// Clock Signal +// +// Created by Thomas Harte on 12/06/2024. +// Copyright © 2024 Thomas Harte. All rights reserved. +// + +#include "CSL.hpp" + +#include +#include +#include +#include +#include + +#include "../../Machines/AmstradCPC/Keyboard.hpp" + +using namespace Storage::Automation; + +namespace { + +bool append_typed(std::vector &down, std::vector &up, std::istringstream &stream) { + const auto press = [&](uint16_t key) { + CSL::KeyEvent event; + event.key = key; + event.down = true; + down.push_back(event); + event.down = false; + up.push_back(event); + }; + + const auto shift = [&](uint16_t key) { + CSL::KeyEvent event; + event.key = AmstradCPC::Key::KeyShift; + event.down = true; + down.push_back(event); + press(key); + event.down = false; + up.push_back(event); + }; + + const auto next = stream.get(); + if(stream.eof()) return false; + + switch(next) { + default: throw CSL::InvalidArgument; + case '\'': return false; + case '}': return false; + + case 'A': press(AmstradCPC::Key::KeyA); break; + case 'B': press(AmstradCPC::Key::KeyB); break; + case 'C': press(AmstradCPC::Key::KeyC); break; + case 'D': press(AmstradCPC::Key::KeyD); break; + case 'E': press(AmstradCPC::Key::KeyE); break; + case 'F': press(AmstradCPC::Key::KeyF); break; + case 'G': press(AmstradCPC::Key::KeyG); break; + case 'H': press(AmstradCPC::Key::KeyH); break; + case 'I': press(AmstradCPC::Key::KeyI); break; + case 'J': press(AmstradCPC::Key::KeyJ); break; + case 'K': press(AmstradCPC::Key::KeyK); break; + case 'L': press(AmstradCPC::Key::KeyL); break; + case 'M': press(AmstradCPC::Key::KeyM); break; + case 'N': press(AmstradCPC::Key::KeyN); break; + case 'O': press(AmstradCPC::Key::KeyO); break; + case 'P': press(AmstradCPC::Key::KeyP); break; + case 'Q': press(AmstradCPC::Key::KeyQ); break; + case 'R': press(AmstradCPC::Key::KeyR); break; + case 'S': press(AmstradCPC::Key::KeyS); break; + case 'T': press(AmstradCPC::Key::KeyT); break; + case 'U': press(AmstradCPC::Key::KeyU); break; + case 'V': press(AmstradCPC::Key::KeyV); break; + case 'W': press(AmstradCPC::Key::KeyW); break; + case 'X': press(AmstradCPC::Key::KeyX); break; + case 'Y': press(AmstradCPC::Key::KeyY); break; + case 'Z': press(AmstradCPC::Key::KeyZ); break; + case ' ': press(AmstradCPC::Key::KeySpace); break; + case '0': press(AmstradCPC::Key::Key0); break; + case '1': press(AmstradCPC::Key::Key1); break; + case '2': press(AmstradCPC::Key::Key2); break; + case '3': press(AmstradCPC::Key::Key3); break; + case '4': press(AmstradCPC::Key::Key4); break; + case '5': press(AmstradCPC::Key::Key5); break; + case '6': press(AmstradCPC::Key::Key6); break; + case '7': press(AmstradCPC::Key::Key7); break; + case '8': press(AmstradCPC::Key::Key8); break; + case '9': press(AmstradCPC::Key::Key9); break; + + case '"': shift(AmstradCPC::Key::Key2); break; + + case '\\': { + if(stream.peek() != '(') { + press(AmstradCPC::Key::KeyBackSlash); + break; + } + stream.get(); + + std::string name; + while(stream.peek() != ')') { + name.push_back(char(stream.get())); + } + stream.get(); + + static const std::unordered_map names = { + {"ESC", AmstradCPC::Key::KeyEscape}, + {"TAB", AmstradCPC::Key::KeyTab}, + {"CAP", AmstradCPC::Key::KeyCapsLock}, + {"SHI", AmstradCPC::Key::KeyShift}, + {"CTR", AmstradCPC::Key::KeyControl}, + {"COP", AmstradCPC::Key::KeyCopy}, + {"CLR", AmstradCPC::Key::KeyClear}, + {"DEL", AmstradCPC::Key::KeyDelete}, + {"RET", AmstradCPC::Key::KeyReturn}, + {"ENT", AmstradCPC::Key::KeyEnter}, + {"ARL", AmstradCPC::Key::KeyLeft}, + {"ARR", AmstradCPC::Key::KeyRight}, + {"ARU", AmstradCPC::Key::KeyUp}, + {"ARD", AmstradCPC::Key::KeyDown}, + {"FN0", AmstradCPC::Key::KeyF0}, + {"FN1", AmstradCPC::Key::KeyF1}, + {"FN2", AmstradCPC::Key::KeyF2}, + {"FN3", AmstradCPC::Key::KeyF3}, + {"FN4", AmstradCPC::Key::KeyF4}, + {"FN5", AmstradCPC::Key::KeyF5}, + {"FN6", AmstradCPC::Key::KeyF6}, + {"FN7", AmstradCPC::Key::KeyF7}, + {"FN8", AmstradCPC::Key::KeyF8}, + {"FN9", AmstradCPC::Key::KeyF9}, + //TODO: { } \ ' KOF + }; + const auto name_pair = names.find(name); + if(name_pair == names.end()) { + throw CSL::InvalidArgument; + } + press(name_pair->second); + } break; + + case '{': + while(append_typed(down, up, stream)); + break; + } + + return true; +} + +} + +std::vector CSL::parse(const std::string &file_name) { + std::vector instructions; + std::ifstream file; + file.open(file_name); + + using Type = Instruction::Type; + static const std::unordered_map keywords = { + {"csl_version", Type::Version}, + {"reset", Type::Reset}, + {"crtc_select", Type::CRTCSelect}, + {"disk_insert", Type::DiskInsert}, + {"disk_dir", Type::SetDiskDir}, + {"tape_insert", Type::TapeInsert}, + {"tape_dir", Type::SetTapeDir}, + {"tape_play", Type::TapeInsert}, + {"tape_stop", Type::TapeStop}, + {"tape_rewind", Type::TapeRewind}, + {"snapshot_load", Type::LoadSnapshot}, + {"snapshot_dir", Type::SetSnapshotDir}, + {"key_delay", Type::KeyDelay}, + {"key_output", Type::KeyOutput}, + {"key_from_file", Type::KeyFromFile}, + {"wait", Type::Wait}, + {"wait_driveonoff", Type::WaitDriveOnOff}, + {"wait_ssm0000", Type::WaitSSM0000}, + {"screenshot_name", Type::SetScreenshotName}, + {"screenshot_dir", Type::SetScreenshotDir}, + {"screenshot", Type::Screenshot}, + {"snapshot_name", Type::SetSnapshotDir}, + {"csl_load", Type::LoadCSL}, + }; + + for(std::string line; std::getline(file, line); ) { + // Ignore comments and empty lines. + if(line.empty() || line[0] == ';') { + continue; + } + + std::istringstream stream(line); + std::string keyword; + stream >> keyword; + + // Second way for a line to be empty: purely whitespace. + if(keyword.empty()) { + continue; + } + + const auto key_pair = keywords.find(keyword); + if(key_pair == keywords.end()) { + throw InvalidKeyword; + } + + Instruction instruction; + instruction.type = key_pair->second; + + // TODO: strings are encoded specially in order to capture whitespace. + // They're surrounded in single quotes with some special keys escaped. + const auto require = [&](auto &&target) { + stream >> target; + if(stream.fail()) { + throw InvalidArgument; + } + }; + + switch(instruction.type) { + // Keywords with no argument. + case Type::TapePlay: + case Type::TapeStop: + case Type::TapeRewind: + case Type::WaitVsyncOnOff: + case Type::WaitSSM0000: + break; + + // Keywords with a single string mandatory argument + // that can be directly captured as a string. + case Type::Version: { + std::string argument; + require(argument); + instruction.argument = argument; + } break; + + // Keywords with a single string mandatory argument + // that is within quotes but otherwise directly usable + // as a string. + case Type::LoadCSL: + case Type::SetScreenshotDir: + case Type::SetScreenshotName: + case Type::SetSnapshotDir: + case Type::SetSnapshotName: + case Type::LoadSnapshot: + case Type::SetTapeDir: + case Type::TapeInsert: + case Type::SetDiskDir: + case Type::KeyFromFile: { + std::string argument; + + char next; + stream >> next; + if(next != '\'') { + throw InvalidArgument; + } + + while(true) { + next = static_cast(stream.get()); + if(stream.eof()) break; + + // Take a bit of a random guess about what's escaped + // in regular string arguments. + if(next == '\\' && stream.peek() == '(') { + stream.get(); + if(stream.peek() != '\'') { + argument.push_back('\\'); + argument.push_back('('); + continue; + } + } + + if(next == '\'') { + break; + } + argument.push_back(next); + } + instruction.argument = argument; + } break; + + // Keywords with a single number mandatory argument. + case Type::WaitDriveOnOff: + case Type::Wait: { + uint64_t argument; + require(argument); + instruction.argument = argument; + } break; + + // Miscellaneous: + case Type::Snapshot: + case Type::Screenshot: { + std::string vsync; + stream >> vsync; + if(stream.fail()) { + instruction.argument = ScreenshotOrSnapshot::Now; + break; + } + if(vsync != "vsync") { + throw InvalidArgument; + } + instruction.argument = ScreenshotOrSnapshot::WaitForVSync; + } break; + + case Type::Reset: { + std::string type; + stream >> type; + if(!stream.fail()) { + if(type != "soft" && type != "hard") { + throw InvalidArgument; + } + instruction.argument = (type == "soft") ? Reset::Soft : Reset::Hard; + } + } break; + + case Type::CRTCSelect: { + std::string type; + require(type); + + static const std::set allowed_types = { + "0", "1", "1A", "1B", "2", "3", "4", + }; + if(allowed_types.find(type) == allowed_types.end()) { + throw InvalidArgument; + } + + instruction.argument = static_cast(std::stoi(type)); + } break; + + case Type::DiskInsert: { + std::string name; + require(name); + + // Crop the assumed opening and closing quotes. + name.erase(name.end() - 1); + name.erase(name.begin()); + + DiskInsert argument; + if(name.size() == 1) { + argument.drive = toupper(name[0]) - 'A'; + require(name); + } + + argument.file = name; + instruction.argument = argument; + } break; + + case Type::KeyOutput: { + std::vector argument; + + char next; + stream >> next; + if(next != '\'') { + throw InvalidArgument; + } + + std::vector down; + std::vector up; + while(append_typed(down, up, stream)) { + std::copy(down.begin(), down.end(), std::back_inserter(argument)); + std::copy(up.begin(), up.end(), std::back_inserter(argument)); + down.clear(); + up.clear(); + } + instruction.argument = argument; + } break; + + case Type::KeyDelay: { + KeyDelay argument; + require(argument.press_delay); + require(argument.interpress_delay); + + uint64_t carriage_return_delay; + stream >> carriage_return_delay; + if(!stream.fail()) { + argument.carriage_return_delay = carriage_return_delay; + } + instruction.argument = argument; + } break; + } + + instructions.push_back(std::move(instruction)); + } + + return instructions; +} diff --git a/Storage/Automation/CSL.hpp b/Storage/Automation/CSL.hpp new file mode 100644 index 000000000..9e84ee100 --- /dev/null +++ b/Storage/Automation/CSL.hpp @@ -0,0 +1,93 @@ +// +// CSL.hpp +// Clock Signal +// +// Created by Thomas Harte on 12/06/2024. +// Copyright © 2024 Thomas Harte. All rights reserved. +// + +#pragma once + +#include +#include +#include +#include +#include + +namespace Storage::Automation::CSL { + +enum Reset { + Hard, Soft +}; +struct DiskInsert { + int drive = 0; + std::string file; +}; +enum ScreenshotOrSnapshot { + WaitForVSync, Now, +}; +struct KeyDelay { + uint64_t press_delay; + uint64_t interpress_delay; + std::optional carriage_return_delay; +}; +struct KeyEvent { + bool down; + uint16_t key; +}; + +struct Instruction { + enum class Type { + Version, + Reset, + CRTCSelect, + LoadCSL, + + DiskInsert, + SetDiskDir, + + TapeInsert, + SetTapeDir, + TapePlay, + TapeStop, + TapeRewind, + + SetSnapshotDir, + LoadSnapshot, + SetSnapshotName, + Snapshot, + + KeyDelay, + KeyOutput, + KeyFromFile, + + Wait, + WaitDriveOnOff, + WaitVsyncOnOff, + WaitSSM0000, + + SetScreenshotName, + SetScreenshotDir, + Screenshot, + } type; + + std::variant< + std::monostate, + DiskInsert, + Reset, + ScreenshotOrSnapshot, + KeyDelay, + std::string, + std::vector, + uint64_t + > argument; +}; + + +enum Errors { + InvalidKeyword, + InvalidArgument, +}; +std::vector parse(const std::string &file_name); + +}