diff --git a/OSBindings/Mac/Clock SignalTests/65816kromTests.swift b/OSBindings/Mac/Clock SignalTests/65816kromTests.swift index 62a3af6f5..eaefc0cb7 100644 --- a/OSBindings/Mac/Clock SignalTests/65816kromTests.swift +++ b/OSBindings/Mac/Clock SignalTests/65816kromTests.swift @@ -59,6 +59,12 @@ class Krom65816Tests: XCTestCase { var lineNumber = 1 var previousPC = 0 for line in outputLines { + // At least one of the traces ends with an empty line; my preference is not to + // modify the originals if possible. + if line == "" { + break + } + machine.runForNumber(ofInstructions: 1) func machineState() -> String { diff --git a/Processors/65816/Implementation/65816Implementation.hpp b/Processors/65816/Implementation/65816Implementation.hpp index 944761ef7..f35b97912 100644 --- a/Processors/65816/Implementation/65816Implementation.hpp +++ b/Processors/65816/Implementation/65816Implementation.hpp @@ -622,8 +622,9 @@ template void Processor void Processor= limit) result = ((result + (adjustment)) & (carry - 1)) + carry; nibble(0x000f, 0x000a, 0x0006, 0x00010); @@ -912,11 +919,13 @@ template void Processor> (1 + registers_.m_shift))&0x40; + } else { result = int(a + data_buffer_.value + registers_.flags.carry); + registers_.flags.overflow = (( (uint16_t(result) ^ registers_.a.full) & (uint16_t(result) ^ data_buffer_.value) ) >> (1 + registers_.m_shift))&0x40; } - registers_.flags.overflow = (( (uint16_t(result) ^ registers_.a.full) & (uint16_t(result) ^ data_buffer_.value) ) >> (1 + registers_.m_shift))&0x40; registers_.flags.set_nz(uint16_t(result), registers_.m_shift); registers_.flags.carry = (result >> (8 + registers_.m_shift))&1; LD(registers_.a, result, registers_.m_masks); diff --git a/Processors/65816/Implementation/65816Storage.cpp b/Processors/65816/Implementation/65816Storage.cpp index e170659e3..b2a1ffbb4 100644 --- a/Processors/65816/Implementation/65816Storage.cpp +++ b/Processors/65816/Implementation/65816Storage.cpp @@ -310,6 +310,7 @@ struct CPU::WDC65816::ProcessorStorageConstructor { target(CycleFetchIncrementPC); // New PCH. target(CycleFetchPC); // New PBR. + target(OperationCopyInstructionToData); target(OperationPerform); // ['JMP' (though it's JML in internal terms)] }