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mirror of https://github.com/TomHarte/CLK.git synced 2024-12-25 03:32:01 +00:00

Corrected CP[I/D]R termination logic; all tests now passing to the extent of interrogation.

This commit is contained in:
Thomas Harte 2017-05-29 10:52:54 -04:00
parent b67331e018
commit c322410783
2 changed files with 1 additions and 13 deletions

View File

@ -159,7 +159,6 @@ class FUSETests: XCTestCase {
XCTAssert(inputArray != nil && outputArray != nil)
var index = 0
// var failures = 0
for item in inputArray {
let itemDictionary = item as! [String: Any]
let outputDictionary = outputArray[index] as! [String: Any]
@ -167,10 +166,6 @@ class FUSETests: XCTestCase {
let name = itemDictionary["name"] as! String
// if name != "eda3" {
// continue;
// }
let initialState = RegisterState(dictionary: itemDictionary["state"] as! [String: Any])
let targetState = RegisterState(dictionary: outputDictionary["state"] as! [String: Any])
@ -195,15 +190,8 @@ class FUSETests: XCTestCase {
let finalState = RegisterState(machine: machine)
XCTAssertEqual(finalState, targetState, "Failed \(name)")
// if finalState != targetState {
// failures = failures + 1
// if failures == 5 {
// return
// }
// }
// TODO compare bus operations and final memory state
}
}
}

View File

@ -1122,7 +1122,7 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
case MicroOp::CPDR:
case MicroOp::CPIR: {
CPxR_STEP(MicroOp::CPIR);
REPEAT(bc_.full);
REPEAT(bc_.full && sign_result_);
} break;
case MicroOp::CPD: