diff --git a/OSBindings/Mac/Clock SignalTests/FUSETests.swift b/OSBindings/Mac/Clock SignalTests/FUSETests.swift index a8ce1350c..78ab3418d 100644 --- a/OSBindings/Mac/Clock SignalTests/FUSETests.swift +++ b/OSBindings/Mac/Clock SignalTests/FUSETests.swift @@ -167,7 +167,7 @@ class FUSETests: XCTestCase { let name = itemDictionary["name"] as! String -// if name != "ed62" { +// if name != "edb1" { // continue; // } @@ -194,7 +194,7 @@ class FUSETests: XCTestCase { let finalState = RegisterState(machine: machine) - XCTAssert(finalState == targetState, "Failed \(name)") + XCTAssertEqual(finalState, targetState, "Failed \(name)") // if finalState != targetState { // failures = failures + 1 // if failures == 5 { diff --git a/Processors/Z80/Z80.hpp b/Processors/Z80/Z80.hpp index 9ec8b0493..f06fc0d62 100644 --- a/Processors/Z80/Z80.hpp +++ b/Processors/Z80/Z80.hpp @@ -1076,6 +1076,14 @@ template class Processor: public MicroOpScheduler { #pragma mark - Repetition +#define REPEAT() \ + if(parity_overflow_flag_) { \ + pc_.full -= 2; \ + } else { \ + move_to_next_program(); \ + checkSchedule(); \ + } + #define LDxR_STEP(incr) \ bc_.full--; \ de_.full += (operation->type == incr) ? 1 : -1; \ @@ -1088,13 +1096,7 @@ template class Processor: public MicroOpScheduler { case MicroOp::LDDR: case MicroOp::LDIR: { LDxR_STEP(MicroOp::LDIR); - - if(parity_overflow_flag_) { - pc_.full -= 2; - } else { - move_to_next_program(); - checkSchedule(); - } + REPEAT(); } break; case MicroOp::LDD: @@ -1104,37 +1106,31 @@ template class Processor: public MicroOpScheduler { #undef LDxR_STEP +#define CPxR_STEP(incr) \ + hl_.full += (operation->type == incr) ? 1 : -1; \ + bc_.full--; \ + \ + uint8_t result = a_ - temp8_; \ + uint8_t halfResult = (a_&0xf) - (temp8_&0xf); \ + \ + parity_overflow_flag_ = bc_.full ? Flag::Parity : 0; \ + half_carry_flag_ = halfResult & Flag::HalfCarry; \ + subtract_flag_ = Flag::Subtract; \ + bit5_result_ = bit3_result_ = (uint8_t)((result&0x8) | ((result&0x2) << 4)); \ + sign_result_ = zero_result_ = result; + case MicroOp::CPDR: case MicroOp::CPIR: { - bc_.full--; - de_.full += (operation->type == MicroOp::LDIR) ? 1 : -1; - hl_.full += (operation->type == MicroOp::LDIR) ? 1 : -1; - - bit3_result_ = bit5_result_ = a_ + temp8_; - subtract_flag_ = 0; - half_carry_flag_ = 0; - - if(bc_.full) { - parity_overflow_flag_ = Flag::Parity; - pc_.full -= 2; - } else { - parity_overflow_flag_ = 0; - move_to_next_program(); - checkSchedule(); - } + CPxR_STEP(MicroOp::CPIR); + REPEAT(); } break; -// case MicroOp::CPD: -// case MicroOp::CPI: { -// bc_.full--; -// de_.full += (operation->type == MicroOp::LDI) ? 1 : -1; -// hl_.full += (operation->type == MicroOp::LDI) ? 1 : -1; -// -// bit3_result_ = bit5_result_ = a_ + temp8_; -// subtract_flag_ = 0; -// half_carry_flag_ = 0; -// parity_overflow_flag_ = bc_.full ? Flag::Parity : 0; -// } break; + case MicroOp::CPD: + case MicroOp::CPI: { + CPxR_STEP(MicroOp::CPI); + } break; + +#undef CPxR_STEP #pragma mark - Bit Manipulation