6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2024-12-26 09:29:45 +00:00
Code Issues Projects Releases Wiki Activity

Implemented CP[I/D]x.

Browse Source
This commit is contained in:
Thomas Harte 2017-05-29 08:54:00 -04:00
parent 1f62cbe21a
commit c56a5344b9
2 changed files with 32 additions and 36 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
OSBindings/Mac/Clock SignalTests/FUSETests.swift
View File

@ -167,7 +167,7 @@ class FUSETests: XCTestCase {
let name = itemDictionary["name"] as! String let name = itemDictionary["name"] as! String
// if name != "ed62" { // if name != "edb1" {
// continue; // continue;
// } // }
@ -194,7 +194,7 @@ class FUSETests: XCTestCase {
let finalState = RegisterState(machine: machine) let finalState = RegisterState(machine: machine)
XCTAssert(finalState == targetState, "Failed \(name)") XCTAssertEqual(finalState, targetState, "Failed \(name)")
// if finalState != targetState { // if finalState != targetState {
// failures = failures + 1 // failures = failures + 1
// if failures == 5 { // if failures == 5 {

64
Processors/Z80/Z80.hpp
View File

@ -1076,6 +1076,14 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
#pragma mark - Repetition #pragma mark - Repetition
#define REPEAT() \
if(parity_overflow_flag_) { \
pc_.full -= 2; \
} else { \
move_to_next_program(); \
checkSchedule(); \
}
#define LDxR_STEP(incr) \ #define LDxR_STEP(incr) \
bc_.full--; \ bc_.full--; \
de_.full += (operation->type == incr) ? 1 : -1; \ de_.full += (operation->type == incr) ? 1 : -1; \
@ -1088,13 +1096,7 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
case MicroOp::LDDR: case MicroOp::LDDR:
case MicroOp::LDIR: { case MicroOp::LDIR: {
LDxR_STEP(MicroOp::LDIR); LDxR_STEP(MicroOp::LDIR);
REPEAT();
if(parity_overflow_flag_) {
pc_.full -= 2;
} else {
move_to_next_program();
checkSchedule();
}
} break; } break;
case MicroOp::LDD: case MicroOp::LDD:
@ -1104,37 +1106,31 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
#undef LDxR_STEP #undef LDxR_STEP
#define CPxR_STEP(incr) \
hl_.full += (operation->type == incr) ? 1 : -1; \
bc_.full--; \
\
uint8_t result = a_ - temp8_; \
uint8_t halfResult = (a_&0xf) - (temp8_&0xf); \
\
parity_overflow_flag_ = bc_.full ? Flag::Parity : 0; \
half_carry_flag_ = halfResult & Flag::HalfCarry; \
subtract_flag_ = Flag::Subtract; \
bit5_result_ = bit3_result_ = (uint8_t)((result&0x8) | ((result&0x2) << 4)); \
sign_result_ = zero_result_ = result;
case MicroOp::CPDR: case MicroOp::CPDR:
case MicroOp::CPIR: { case MicroOp::CPIR: {
bc_.full--; CPxR_STEP(MicroOp::CPIR);
de_.full += (operation->type == MicroOp::LDIR) ? 1 : -1; REPEAT();
hl_.full += (operation->type == MicroOp::LDIR) ? 1 : -1;
bit3_result_ = bit5_result_ = a_ + temp8_;
subtract_flag_ = 0;
half_carry_flag_ = 0;
if(bc_.full) {
parity_overflow_flag_ = Flag::Parity;
pc_.full -= 2;
} else {
parity_overflow_flag_ = 0;
move_to_next_program();
checkSchedule();
}
} break; } break;
// case MicroOp::CPD: case MicroOp::CPD:
// case MicroOp::CPI: { case MicroOp::CPI: {
// bc_.full--; CPxR_STEP(MicroOp::CPI);
// de_.full += (operation->type == MicroOp::LDI) ? 1 : -1; } break;
// hl_.full += (operation->type == MicroOp::LDI) ? 1 : -1;
// #undef CPxR_STEP
// bit3_result_ = bit5_result_ = a_ + temp8_;
// subtract_flag_ = 0;
// half_carry_flag_ = 0;
// parity_overflow_flag_ = bc_.full ? Flag::Parity : 0;
// } break;
#pragma mark - Bit Manipulation #pragma mark - Bit Manipulation