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https://github.com/TomHarte/CLK.git
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Implemented CP[I/D]x.
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@ -167,7 +167,7 @@ class FUSETests: XCTestCase {
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let name = itemDictionary["name"] as! String
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let name = itemDictionary["name"] as! String
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// if name != "ed62" {
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// if name != "edb1" {
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// continue;
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// continue;
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// }
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// }
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@ -194,7 +194,7 @@ class FUSETests: XCTestCase {
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let finalState = RegisterState(machine: machine)
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let finalState = RegisterState(machine: machine)
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XCTAssert(finalState == targetState, "Failed \(name)")
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XCTAssertEqual(finalState, targetState, "Failed \(name)")
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// if finalState != targetState {
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// if finalState != targetState {
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// failures = failures + 1
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// failures = failures + 1
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// if failures == 5 {
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// if failures == 5 {
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@ -1076,6 +1076,14 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
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#pragma mark - Repetition
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#pragma mark - Repetition
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#define REPEAT() \
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if(parity_overflow_flag_) { \
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pc_.full -= 2; \
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} else { \
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move_to_next_program(); \
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checkSchedule(); \
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}
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#define LDxR_STEP(incr) \
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#define LDxR_STEP(incr) \
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bc_.full--; \
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bc_.full--; \
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de_.full += (operation->type == incr) ? 1 : -1; \
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de_.full += (operation->type == incr) ? 1 : -1; \
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@ -1088,13 +1096,7 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
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case MicroOp::LDDR:
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case MicroOp::LDDR:
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case MicroOp::LDIR: {
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case MicroOp::LDIR: {
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LDxR_STEP(MicroOp::LDIR);
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LDxR_STEP(MicroOp::LDIR);
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REPEAT();
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if(parity_overflow_flag_) {
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pc_.full -= 2;
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} else {
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move_to_next_program();
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checkSchedule();
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}
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} break;
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} break;
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case MicroOp::LDD:
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case MicroOp::LDD:
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@ -1104,37 +1106,31 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
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#undef LDxR_STEP
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#undef LDxR_STEP
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#define CPxR_STEP(incr) \
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hl_.full += (operation->type == incr) ? 1 : -1; \
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bc_.full--; \
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\
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uint8_t result = a_ - temp8_; \
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uint8_t halfResult = (a_&0xf) - (temp8_&0xf); \
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\
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parity_overflow_flag_ = bc_.full ? Flag::Parity : 0; \
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half_carry_flag_ = halfResult & Flag::HalfCarry; \
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subtract_flag_ = Flag::Subtract; \
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bit5_result_ = bit3_result_ = (uint8_t)((result&0x8) | ((result&0x2) << 4)); \
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sign_result_ = zero_result_ = result;
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case MicroOp::CPDR:
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case MicroOp::CPDR:
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case MicroOp::CPIR: {
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case MicroOp::CPIR: {
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bc_.full--;
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CPxR_STEP(MicroOp::CPIR);
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de_.full += (operation->type == MicroOp::LDIR) ? 1 : -1;
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REPEAT();
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hl_.full += (operation->type == MicroOp::LDIR) ? 1 : -1;
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bit3_result_ = bit5_result_ = a_ + temp8_;
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subtract_flag_ = 0;
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half_carry_flag_ = 0;
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if(bc_.full) {
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parity_overflow_flag_ = Flag::Parity;
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pc_.full -= 2;
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} else {
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parity_overflow_flag_ = 0;
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move_to_next_program();
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checkSchedule();
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}
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} break;
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} break;
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// case MicroOp::CPD:
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case MicroOp::CPD:
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// case MicroOp::CPI: {
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case MicroOp::CPI: {
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// bc_.full--;
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CPxR_STEP(MicroOp::CPI);
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// de_.full += (operation->type == MicroOp::LDI) ? 1 : -1;
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} break;
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// hl_.full += (operation->type == MicroOp::LDI) ? 1 : -1;
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//
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#undef CPxR_STEP
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// bit3_result_ = bit5_result_ = a_ + temp8_;
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// subtract_flag_ = 0;
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// half_carry_flag_ = 0;
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// parity_overflow_flag_ = bc_.full ? Flag::Parity : 0;
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// } break;
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#pragma mark - Bit Manipulation
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#pragma mark - Bit Manipulation
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