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Implements the INTC8ROM switch.
Finally causing the Zellyn tests to pass! Is this nightmare behind me?
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@ -207,14 +207,16 @@ template <bool is_iie> class ConcreteMachine:
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// MARK - The IIe's ROM controls.
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bool internal_CX_rom_ = false;
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bool slot_C3_rom_ = false;
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// bool internal_c8_rom_ = false;
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bool internal_c8_rom_ = false;
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void set_card_paging() {
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page(0xc1, 0xd0, internal_CX_rom_ ? rom_.data() : nullptr, nullptr);
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page(0xc1, 0xd8, internal_CX_rom_ ? rom_.data() : nullptr, nullptr);
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if(!internal_CX_rom_) {
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if(!slot_C3_rom_) read_pages_[0xc3] = &rom_[0xc300 - 0xc100];
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}
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page(0xc8, 0xd0, (internal_CX_rom_ || internal_c8_rom_) ? &rom_[0xc800 - 0xc100] : nullptr, nullptr);
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}
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// MARK - The IIe's auxiliary RAM controls.
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@ -430,6 +432,16 @@ template <bool is_iie> class ConcreteMachine:
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if(isReadOperation(operation)) *value = read_pages_[address >> 8][address & 0xff];
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else if(write_pages_[address >> 8]) write_pages_[address >> 8][address & 0xff] = *value;
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if(is_iie && address >= 0xc300 && address < 0xd000) {
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bool internal_c8_rom = internal_c8_rom_;
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internal_c8_rom |= ((address >> 8) == 0xc3) && !slot_C3_rom_;
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internal_c8_rom &= (address != 0xcfff);
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if(internal_c8_rom != internal_c8_rom_) {
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internal_c8_rom_ = internal_c8_rom;
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set_card_paging();
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}
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}
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if(should_load_quickly_) {
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// Check for a prima facie entry into RWTS.
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if(operation == CPU::MOS6502::BusOperation::ReadOpcode && address == 0xb7b5) {
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