6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2024-12-25 03:32:01 +00:00
Code Issues Projects Releases Wiki Activity

Completes import of LSL tests and fixes various LSL issues.

Browse Source 
Including LSL (xxx).w actually being LSR, and the carry flag generally being questionable.
This commit is contained in:
Thomas Harte 2019-06-24 17:45:38 -04:00
parent c447655047
commit c8b769de8a
2 changed files with 33 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

30
OSBindings/Mac/Clock SignalTests/68000Tests.mm
View File

@ -1736,6 +1736,36 @@ class CPU::MC68000::ProcessorStorageTests {
XCTAssertEqual(72, _machine->get_cycle_count());
}
- (void)testLSLl_Imm {
_machine->set_program({
0xe189 // LSL.l #8, D1
});
auto state = _machine->get_processor_state();
state.data[1] = 0xce3dd567;
_machine->set_processor_state(state);
_machine->run_for_instructions(1);
state = _machine->get_processor_state();
XCTAssertEqual(state.data[1], 0x3dd56700);
XCTAssertEqual(state.status & Flag::ConditionCodes, 0);
XCTAssertEqual(24, _machine->get_cycle_count());
}
- (void)testLSL_XXXw {
_machine->set_program({
0xe3f8, 0x3000 // LSL.l ($3000).w
});
*_machine->ram_at(0x3000) = 0x8ccc;
_machine->run_for_instructions(1);
const auto state = _machine->get_processor_state();
XCTAssertEqual(*_machine->ram_at(0x3000), 0x1998);
XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Carry | Flag::Extend);
XCTAssertEqual(16, _machine->get_cycle_count());
}
// MARK: MOVEM
- (void)testMOVEM {

6
Processors/68000/Implementation/68000Implementation.hpp
View File

@ -1558,7 +1558,7 @@ template <class T, bool dtack_is_implicit, bool signal_will_perform> void Proces
carry_flag_ = 0; \
} else { \
destination = (shift_count < size) ? decltype(destination)(value << shift_count) : 0; \
extend_flag_ = carry_flag_ = decltype(carry_flag_)(value) & decltype(carry_flag_)( (1 << (size - 1)) >> (shift_count - 1) ); \
extend_flag_ = carry_flag_ = decltype(carry_flag_)(value) & decltype(carry_flag_)( (1u << (size - 1)) >> (shift_count - 1) ); \
} \
\
set_neg_zero_overflow(destination, 1 << (size - 1)); \
@ -1623,8 +1623,8 @@ template <class T, bool dtack_is_implicit, bool signal_will_perform> void Proces
case Operation::LSLm: {
const auto value = active_program_->destination->halves.low.full;
active_program_->destination->halves.low.full = value >> 1;
extend_flag_ = carry_flag_ = value & 1;
active_program_->destination->halves.low.full = uint16_t(value << 1);
extend_flag_ = carry_flag_ = value & 0x8000;
set_neg_zero_overflow(active_program_->destination->halves.low.full, 0x8000);
} break;
case Operation::LSLb: lsl(active_program_->destination->halves.low.halves.low, 8); break;