1
0
mirror of https://github.com/TomHarte/CLK.git synced 2024-12-25 18:30:21 +00:00

Fixed: Scc is a byte operation.

It was, until now, post-incrementing and pre-decrementing registers other than A7 incorrectly.
This commit is contained in:
Thomas Harte 2019-06-19 13:15:12 -04:00
parent 68a3e5a739
commit ca83431e54

View File

@ -2277,10 +2277,14 @@ struct ProcessorStorageConstructor {
} else {
// This is an Scc.
// Scc is inexplicably a read-modify-write operation.
// Scc is implemented on the 68000 a read-modify-write operation.
storage_.instructions[instruction].set_source(storage_, ea_mode, ea_register);
storage_.instructions[instruction].set_destination(storage_, ea_mode, ea_register);
// Scc is always a byte operation.
is_byte_access = true;
is_long_word_access = false;
const int mode = combined_mode(ea_mode, ea_register);
switch(mode) {
default: continue;