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https://github.com/TomHarte/CLK.git
synced 2024-12-25 03:32:01 +00:00
Made an attempt at getting some interrupts all up inside this thing.
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cc5ba8243e
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ccf20299a3
@ -160,6 +160,11 @@ unsigned int Machine::perform_bus_operation(CPU6502::BusOperation operation, uin
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}
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}
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}
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}
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// if(operation == CPU6502::BusOperation::ReadOpcode)
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// {
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// printf("%04x: %02x (%d)\n", address, *value, _frameCycles);
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// }
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_frameCycles += cycles;
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_frameCycles += cycles;
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if(_frameCycles == cycles_per_frame)
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if(_frameCycles == cycles_per_frame)
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{
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{
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@ -197,6 +202,10 @@ inline void Machine::evaluate_interrupts()
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{
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{
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_interruptStatus |= 1;
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_interruptStatus |= 1;
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}
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}
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else
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{
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_interruptStatus &= ~1;
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}
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set_irq_line(_interruptStatus & 1);
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set_irq_line(_interruptStatus & 1);
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}
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}
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@ -232,7 +241,10 @@ inline void Machine::update_display()
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{
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{
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// on lines prior to 28 or after or equal to 284, or on a line that is equal to 8 or 9 modulo 10 in a line-spaced mode,
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// on lines prior to 28 or after or equal to 284, or on a line that is equal to 8 or 9 modulo 10 in a line-spaced mode,
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// the line is then definitely blank.
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// the line is then definitely blank.
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if(current_line < 28 || current_line >= 284)
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if(
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(current_line < 28 || current_line >= 284)
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// || (((current_line - 28)%10) > 7)
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)
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{
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{
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if(line_position == 9)
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if(line_position == 9)
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{
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{
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@ -278,7 +290,8 @@ inline void Machine::update_display()
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if(line_position == 104)
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if(line_position == 104)
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{
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{
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if(!((current_line - 27)&7))
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if(!((current_line - 27)%8))
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// if(!((current_line - 27)&7))
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{
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{
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_startLineAddress += 40*8 - 7;
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_startLineAddress += 40*8 - 7;
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}
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}
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@ -30,8 +30,8 @@ enum ROMSlot: uint8_t {
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};
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};
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enum Interrupt: uint8_t {
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enum Interrupt: uint8_t {
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InterruptRealTimeClock = 0x04,
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InterruptDisplayEnd = 0x04,
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InterruptDisplayEnd = 0x08,
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InterruptRealTimeClock = 0x08,
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InterruptTransmitDataEmpty = 0x10,
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InterruptTransmitDataEmpty = 0x10,
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InterruptReceiveDataFull = 0x20,
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InterruptReceiveDataFull = 0x20,
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InterruptHighToneDetect = 0x40
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InterruptHighToneDetect = 0x40
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@ -58,7 +58,8 @@ template <class T> class Processor {
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enum MicroOp {
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enum MicroOp {
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CycleFetchOperation, CycleFetchOperand, OperationDecodeOperation, CycleIncPCPushPCH,
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CycleFetchOperation, CycleFetchOperand, OperationDecodeOperation, CycleIncPCPushPCH,
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CyclePushPCH, CyclePushPCL, CyclePushA, CyclePushOperand,
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CyclePushPCH, CyclePushPCL, CyclePushA, CyclePushOperand,
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CycleSetIReadBRKLow, CycleReadBRKHigh, CycleReadFromS, CycleReadFromPC,
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CycleSetIReadBRKLow, CycleReadBRKHigh,
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CycleReadFromS, CycleReadFromPC,
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CyclePullOperand, CyclePullPCL, CyclePullPCH, CyclePullA,
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CyclePullOperand, CyclePullPCL, CyclePullPCH, CyclePullA,
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CycleReadAndIncrementPC, CycleIncrementPCAndReadStack, CycleIncrementPCReadPCHLoadPCL, CycleReadPCHLoadPCL,
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CycleReadAndIncrementPC, CycleIncrementPCAndReadStack, CycleIncrementPCReadPCHLoadPCL, CycleReadPCHLoadPCL,
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CycleReadAddressHLoadAddressL, CycleReadPCLFromAddress, CycleReadPCHFromAddress, CycleLoadAddressAbsolute,
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CycleReadAddressHLoadAddressL, CycleReadPCLFromAddress, CycleReadPCHFromAddress, CycleLoadAddressAbsolute,
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@ -84,6 +85,7 @@ template <class T> class Processor {
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OperationTAY, OperationTAX, OperationTSX, OperationARR,
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OperationTAY, OperationTAX, OperationTSX, OperationARR,
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OperationSBX, OperationLXA, OperationANE, OperationANC,
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OperationSBX, OperationLXA, OperationANE, OperationANC,
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OperationLAS, CycleAddSignedOperandToPC, OperationSetFlagsFromOperand, OperationSetOperandFromFlagsWithBRKSet,
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OperationLAS, CycleAddSignedOperandToPC, OperationSetFlagsFromOperand, OperationSetOperandFromFlagsWithBRKSet,
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OperationSetOperandFromFlags,
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OperationSetFlagsFromA, CycleReadRSTLow, CycleReadRSTHigh, CycleScheduleJam
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OperationSetFlagsFromA, CycleReadRSTLow, CycleReadRSTHigh, CycleScheduleJam
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};
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};
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@ -378,6 +380,8 @@ template <class T> class Processor {
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bool _ready_line_is_enabled;
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bool _ready_line_is_enabled;
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bool _reset_line_is_enabled;
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bool _reset_line_is_enabled;
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bool _irq_line_is_enabled, _irq_line_history[2];
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bool _nmi_line_is_enabled;
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bool _ready_is_active;
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bool _ready_is_active;
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public:
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public:
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@ -406,6 +410,19 @@ template <class T> class Processor {
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return reset;
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return reset;
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}
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}
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const MicroOp *get_irq_program() {
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static const MicroOp reset[] = {
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CyclePushPCH,
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CyclePushPCL,
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OperationSetOperandFromFlags,
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CyclePushOperand,
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CycleSetIReadBRKLow,
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CycleReadBRKHigh,
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OperationMoveToNextProgram
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};
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return reset;
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}
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void run_for_cycles(int number_of_cycles)
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void run_for_cycles(int number_of_cycles)
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{
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{
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static const MicroOp doBranch[] = {
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static const MicroOp doBranch[] = {
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@ -428,7 +445,12 @@ template <class T> class Processor {
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if(_reset_line_is_enabled)\
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if(_reset_line_is_enabled)\
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schedule_program(get_reset_program());\
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schedule_program(get_reset_program());\
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else\
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else\
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schedule_program(fetch_decode_execute);\
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{\
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if(_irq_line_history[1] && !_interruptFlag)\
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schedule_program(get_irq_program());\
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else\
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schedule_program(fetch_decode_execute);\
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}\
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op;\
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op;\
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}
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}
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@ -444,6 +466,8 @@ template <class T> class Processor {
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while (!_ready_is_active && _cycles_left_to_run > 0) {
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while (!_ready_is_active && _cycles_left_to_run > 0) {
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if (_nextBusOperation != BusOperation::None) {
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if (_nextBusOperation != BusOperation::None) {
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_irq_line_history[0] = _irq_line_history[1];
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_irq_line_history[1] = _irq_line_is_enabled;
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_cycles_left_to_run -= static_cast<T *>(this)->perform_bus_operation(_nextBusOperation, _busAddress, _busValue);
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_cycles_left_to_run -= static_cast<T *>(this)->perform_bus_operation(_nextBusOperation, _busAddress, _busValue);
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_nextBusOperation = BusOperation::None;
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_nextBusOperation = BusOperation::None;
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}
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}
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@ -520,6 +544,7 @@ template <class T> class Processor {
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case CyclePullOperand: _s++; read_mem(_operand, _s | 0x100); break;
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case CyclePullOperand: _s++; read_mem(_operand, _s | 0x100); break;
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case OperationSetFlagsFromOperand: set_flags(_operand); break;
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case OperationSetFlagsFromOperand: set_flags(_operand); break;
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case OperationSetOperandFromFlagsWithBRKSet: _operand = get_flags() | Flag::Break; break;
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case OperationSetOperandFromFlagsWithBRKSet: _operand = get_flags() | Flag::Break; break;
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case OperationSetOperandFromFlags: _operand = get_flags(); break;
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case OperationSetFlagsFromA: _zeroResult = _negativeResult = _a; break;
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case OperationSetFlagsFromA: _zeroResult = _negativeResult = _a; break;
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case CycleIncrementPCAndReadStack: _pc.full++; throwaway_read(_s | 0x100); break;
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case CycleIncrementPCAndReadStack: _pc.full++; throwaway_read(_s | 0x100); break;
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@ -983,12 +1008,12 @@ template <class T> class Processor {
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void set_irq_line(bool active)
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void set_irq_line(bool active)
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{
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{
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// TODO
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_irq_line_is_enabled = active;
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}
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}
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void set_nmi_line(bool active)
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void set_nmi_line(bool active)
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{
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{
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// TODO
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_nmi_line_is_enabled = active;
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}
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}
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bool is_jammed()
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bool is_jammed()
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