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Merge pull request #1148 from TomHarte/NoEmulationStack
Use full 16-bit stack pointer for all 'new' instructions.
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commit
cdb86022a6
@ -14,10 +14,7 @@ uint16_t ProcessorBase::value_of(Register r) const {
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switch (r) {
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case Register::ProgramCounter: return registers_.pc;
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case Register::LastOperationAddress: return last_operation_pc_;
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case Register::StackPointer:
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return
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(registers_.s.full & (registers_.emulation_flag ? 0xff : 0xffff)) |
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(registers_.emulation_flag ? 0x100 : 0x000);
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case Register::StackPointer: return registers_.s.full;
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case Register::Flags: return get_flags();
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case Register::A: return registers_.a.full;
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case Register::X: return registers_.x.full;
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@ -191,6 +191,13 @@ template <typename BusHandler, bool uses_ready_line> void Processor<BusHandler,
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--registers_.s.full;
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break;
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case CyclePushNotEmulation:
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bus_address_ = registers_.s.full;
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bus_value_ = data_buffer_.next_output_descending();
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bus_operation_ = MOS6502Esque::Write;
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--registers_.s.full;
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break;
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case CyclePullIfNotEmulation:
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if(registers_.emulation_flag) {
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continue;
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@ -202,6 +209,13 @@ template <typename BusHandler, bool uses_ready_line> void Processor<BusHandler,
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stack_access(data_buffer_.next_input(), MOS6502Esque::Read);
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break;
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case CyclePullNotEmulation:
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++registers_.s.full;
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bus_address_ = registers_.s.full;
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bus_value_ = data_buffer_.next_input();
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bus_operation_ = MOS6502Esque::Read;
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break;
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case CycleAccessStack:
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stack_access(&bus_throwaway_, MOS6502Esque::InternalOperationRead);
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break;
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@ -319,7 +319,7 @@ struct CPU::WDC65816::ProcessorStorageConstructor {
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target(CycleFetchIncrementPC); // New PCH.
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target(OperationCopyPBRToData); // Copy PBR to the data register.
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target(CyclePush); // PBR.
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target(CyclePushNotEmulation); // PBR.
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target(CycleFetchPreviousThrowaway); // IO.
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target(CycleFetchPC); // New PBR.
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@ -327,8 +327,8 @@ struct CPU::WDC65816::ProcessorStorageConstructor {
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target(OperationConstructAbsolute); // Calculate data address.
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target(OperationPerform); // [JSL]
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target(CyclePush); // PCH.
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target(CyclePush); // PCL.
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target(CyclePushNotEmulation); // PCH.
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target(CyclePushNotEmulation); // PCL.
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}
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// 5. Absolute long, X; al, x.
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@ -656,7 +656,7 @@ struct CPU::WDC65816::ProcessorStorageConstructor {
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stack_exception_impl(type, is8bit, target, CycleAccessStack);
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}
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// 22b. Stack; s, PLx.
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// 22b(i). Stack; s, PLx, respecting emulation mode. E.g. PLP.
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static void stack_pull(AccessType, bool is8bit, const std::function<void(MicroOp)> &target) {
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target(CycleFetchPCThrowaway); // IO.
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target(CycleFetchPCThrowaway); // IO.
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@ -667,7 +667,18 @@ struct CPU::WDC65816::ProcessorStorageConstructor {
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target(OperationPerform);
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}
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// 22c. Stack; s, PHx.
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// 22b(ii). Stack; s, PLx, ignoring emulation mode. I.e. PLD.
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static void stack_pld(AccessType, bool, const std::function<void(MicroOp)> &target) {
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target(CycleFetchPCThrowaway); // IO.
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target(CycleFetchPCThrowaway); // IO.
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target(CyclePullNotEmulation); // REG low.
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target(CyclePullNotEmulation); // REG [high].
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target(OperationPerform);
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}
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// 22c(i). Stack; s, PHx, respecting emulation mode. E.g. PHP.
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static void stack_push(AccessType, bool is8bit, const std::function<void(MicroOp)> &target) {
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target(CycleFetchPCThrowaway); // IO.
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@ -677,6 +688,16 @@ struct CPU::WDC65816::ProcessorStorageConstructor {
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target(CyclePush); // REG [low].
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}
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// 22c(i). Stack; s, PHx, ignoring emulation mode. I.e. PHD.
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static void stack_phd(AccessType, bool, const std::function<void(MicroOp)> &target) {
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target(CycleFetchPCThrowaway); // IO.
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target(OperationPerform);
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target(CyclePushNotEmulation); // REG high.
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target(CyclePushNotEmulation); // REG [low].
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}
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// 22d. Stack; s, PEA.
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static void stack_pea(AccessType, bool, const std::function<void(MicroOp)> &target) {
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target(CycleFetchIncrementPC); // AAL.
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@ -684,8 +705,8 @@ struct CPU::WDC65816::ProcessorStorageConstructor {
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target(OperationCopyInstructionToData);
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target(CyclePush); // AAH.
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target(CyclePush); // AAL.
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target(CyclePushNotEmulation); // AAH.
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target(CyclePushNotEmulation); // AAL.
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}
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// 22e. Stack; s, PEI.
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@ -697,8 +718,8 @@ struct CPU::WDC65816::ProcessorStorageConstructor {
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target(CycleFetchIncrementData); // AAL.
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target(CycleFetchData); // AAH.
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target(CyclePush); // AAH.
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target(CyclePush); // AAL.
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target(CyclePushNotEmulation); // AAH.
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target(CyclePushNotEmulation); // AAL.
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}
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// 22f. Stack; s, PER.
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@ -709,8 +730,8 @@ struct CPU::WDC65816::ProcessorStorageConstructor {
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target(OperationConstructPER);
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target(CyclePush); // AAH.
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target(CyclePush); // AAL.
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target(CyclePushNotEmulation); // AAH.
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target(CyclePushNotEmulation); // AAL.
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}
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// 22g. Stack; s, RTI.
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@ -743,9 +764,9 @@ struct CPU::WDC65816::ProcessorStorageConstructor {
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target(CycleFetchPCThrowaway); // IO.
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target(CycleFetchPCThrowaway); // IO.
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target(CyclePull); // New PCL.
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target(CyclePull); // New PCH.
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target(CyclePull); // New PBR.
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target(CyclePullNotEmulation); // New PCL.
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target(CyclePullNotEmulation); // New PCH.
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target(CyclePullNotEmulation); // New PBR.
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target(OperationPerform); // [RTL]
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}
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@ -818,7 +839,7 @@ ProcessorStorage::ProcessorStorage() {
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/* 0x08 PHP s */ op(stack_push, PHP, AccessMode::Always8Bit);
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/* 0x09 ORA # */ op(immediate, ORA);
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/* 0x0a ASL A */ op(accumulator, ASL);
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/* 0x0b PHD s */ op(stack_push, PHD, AccessMode::Always16Bit);
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/* 0x0b PHD s */ op(stack_phd, PHD);
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/* 0x0c TSB a */ op(absolute_rmw, TSB);
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/* 0x0d ORA a */ op(absolute, ORA);
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/* 0x0e ASL a */ op(absolute_rmw, ASL);
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@ -852,7 +873,7 @@ ProcessorStorage::ProcessorStorage() {
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/* 0x28 PLP s */ op(stack_pull, PLP, AccessMode::Always8Bit);
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/* 0x29 AND # */ op(immediate, AND);
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/* 0x2a ROL A */ op(accumulator, ROL);
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/* 0x2b PLD s */ op(stack_pull, PLD, AccessMode::Always16Bit);
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/* 0x2b PLD s */ op(stack_pld, PLD);
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/* 0x2c BIT a */ op(absolute, BIT);
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/* 0x2d AND a */ op(absolute, AND);
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/* 0x2e ROL a */ op(absolute_rmw, ROL);
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@ -58,6 +58,11 @@ enum MicroOp: uint8_t {
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/// Performs as CyclePull if the 65816 is not in emulation mode; otherwise skips itself.
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CyclePullIfNotEmulation,
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/// Pushes a single byte from the data buffer to the stack, always using its full 16-bit address.
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CyclePushNotEmulation,
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/// Pulls a single byte to the data buffer from the stack, always using its full 16-bit address.
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CyclePullNotEmulation,
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/// Issues a BusOperation::None and regresses the micro-op counter until an established
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/// STP or WAI condition is satisfied.
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CycleRepeatingNone,
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