From 3a02c22072d918fd43e8f134c5c0c9fb502fcced Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Sun, 30 Jul 2023 16:25:51 -0400 Subject: [PATCH 01/10] Provide an always-16bit-address route to the stack. --- .../65816/Implementation/65816Implementation.hpp | 14 ++++++++++++++ Processors/65816/Implementation/65816Storage.hpp | 5 +++++ 2 files changed, 19 insertions(+) diff --git a/Processors/65816/Implementation/65816Implementation.hpp b/Processors/65816/Implementation/65816Implementation.hpp index c11705c1b..9bd0b8902 100644 --- a/Processors/65816/Implementation/65816Implementation.hpp +++ b/Processors/65816/Implementation/65816Implementation.hpp @@ -191,6 +191,13 @@ template void Processor void Processor Date: Sun, 30 Jul 2023 16:26:29 -0400 Subject: [PATCH 02/10] Correct stack behaviour of PLD. --- Processors/65816/Implementation/65816Storage.cpp | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/Processors/65816/Implementation/65816Storage.cpp b/Processors/65816/Implementation/65816Storage.cpp index 96aeb08ae..9854df814 100644 --- a/Processors/65816/Implementation/65816Storage.cpp +++ b/Processors/65816/Implementation/65816Storage.cpp @@ -656,7 +656,7 @@ struct CPU::WDC65816::ProcessorStorageConstructor { stack_exception_impl(type, is8bit, target, CycleAccessStack); } - // 22b. Stack; s, PLx. + // 22b(i). Stack; s, PLx, respecting emulation mode. E.g. PLP. static void stack_pull(AccessType, bool is8bit, const std::function &target) { target(CycleFetchPCThrowaway); // IO. target(CycleFetchPCThrowaway); // IO. @@ -667,6 +667,17 @@ struct CPU::WDC65816::ProcessorStorageConstructor { target(OperationPerform); } + // 22b(ii). Stack; s, PLx, ignoring emulation mode. E.g. PLD. + static void stack_pull_no_emulation(AccessType, bool is8bit, const std::function &target) { + target(CycleFetchPCThrowaway); // IO. + target(CycleFetchPCThrowaway); // IO. + + if(!is8bit) target(CyclePullNotEmulation); // REG low. + target(CyclePullNotEmulation); // REG [high]. + + target(OperationPerform); + } + // 22c. Stack; s, PHx. static void stack_push(AccessType, bool is8bit, const std::function &target) { target(CycleFetchPCThrowaway); // IO. @@ -852,7 +863,7 @@ ProcessorStorage::ProcessorStorage() { /* 0x28 PLP s */ op(stack_pull, PLP, AccessMode::Always8Bit); /* 0x29 AND # */ op(immediate, AND); /* 0x2a ROL A */ op(accumulator, ROL); - /* 0x2b PLD s */ op(stack_pull, PLD, AccessMode::Always16Bit); + /* 0x2b PLD s */ op(stack_pull_no_emulation, PLD, AccessMode::Always16Bit); /* 0x2c BIT a */ op(absolute, BIT); /* 0x2d AND a */ op(absolute, AND); /* 0x2e ROL a */ op(absolute_rmw, ROL); From 3ec61e877046f19bf41cfa6124c446aa7c436384 Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Sun, 30 Jul 2023 16:27:13 -0400 Subject: [PATCH 03/10] Fix stack usage of RTL. --- Processors/65816/Implementation/65816Storage.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/Processors/65816/Implementation/65816Storage.cpp b/Processors/65816/Implementation/65816Storage.cpp index 9854df814..dce4ff98f 100644 --- a/Processors/65816/Implementation/65816Storage.cpp +++ b/Processors/65816/Implementation/65816Storage.cpp @@ -754,9 +754,9 @@ struct CPU::WDC65816::ProcessorStorageConstructor { target(CycleFetchPCThrowaway); // IO. target(CycleFetchPCThrowaway); // IO. - target(CyclePull); // New PCL. - target(CyclePull); // New PCH. - target(CyclePull); // New PBR. + target(CyclePullNotEmulation); // New PCL. + target(CyclePullNotEmulation); // New PCH. + target(CyclePullNotEmulation); // New PBR. target(OperationPerform); // [RTL] } From 3762ee1a630fafc833b916e8a913930bc41a49af Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Sun, 30 Jul 2023 16:29:15 -0400 Subject: [PATCH 04/10] Fix stack usage of PHD. --- Processors/65816/Implementation/65816Storage.cpp | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/Processors/65816/Implementation/65816Storage.cpp b/Processors/65816/Implementation/65816Storage.cpp index dce4ff98f..df9dfcd75 100644 --- a/Processors/65816/Implementation/65816Storage.cpp +++ b/Processors/65816/Implementation/65816Storage.cpp @@ -667,7 +667,7 @@ struct CPU::WDC65816::ProcessorStorageConstructor { target(OperationPerform); } - // 22b(ii). Stack; s, PLx, ignoring emulation mode. E.g. PLD. + // 22b(ii). Stack; s, PLx, ignoring emulation mode. I.e. PLD. static void stack_pull_no_emulation(AccessType, bool is8bit, const std::function &target) { target(CycleFetchPCThrowaway); // IO. target(CycleFetchPCThrowaway); // IO. @@ -678,7 +678,7 @@ struct CPU::WDC65816::ProcessorStorageConstructor { target(OperationPerform); } - // 22c. Stack; s, PHx. + // 22c(i). Stack; s, PHx, respecting emulation mode. E.g. PHP. static void stack_push(AccessType, bool is8bit, const std::function &target) { target(CycleFetchPCThrowaway); // IO. @@ -688,6 +688,16 @@ struct CPU::WDC65816::ProcessorStorageConstructor { target(CyclePush); // REG [low]. } + // 22c(i). Stack; s, PHx, ignoring emulation mode. I.e. PHD. + static void stack_push_no_emulation(AccessType, bool is8bit, const std::function &target) { + target(CycleFetchPCThrowaway); // IO. + + target(OperationPerform); + + if(!is8bit) target(CyclePushNotEmulation); // REG high. + target(CyclePushNotEmulation); // REG [low]. + } + // 22d. Stack; s, PEA. static void stack_pea(AccessType, bool, const std::function &target) { target(CycleFetchIncrementPC); // AAL. @@ -829,7 +839,7 @@ ProcessorStorage::ProcessorStorage() { /* 0x08 PHP s */ op(stack_push, PHP, AccessMode::Always8Bit); /* 0x09 ORA # */ op(immediate, ORA); /* 0x0a ASL A */ op(accumulator, ASL); - /* 0x0b PHD s */ op(stack_push, PHD, AccessMode::Always16Bit); + /* 0x0b PHD s */ op(stack_push_no_emulation, PHD, AccessMode::Always16Bit); /* 0x0c TSB a */ op(absolute_rmw, TSB); /* 0x0d ORA a */ op(absolute, ORA); /* 0x0e ASL a */ op(absolute_rmw, ASL); From a02b8222faea0cb083a5f42df67d004af8a458f2 Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Sun, 30 Jul 2023 16:29:56 -0400 Subject: [PATCH 05/10] Fix stack usage of PER. --- Processors/65816/Implementation/65816Storage.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Processors/65816/Implementation/65816Storage.cpp b/Processors/65816/Implementation/65816Storage.cpp index df9dfcd75..72651a19e 100644 --- a/Processors/65816/Implementation/65816Storage.cpp +++ b/Processors/65816/Implementation/65816Storage.cpp @@ -730,8 +730,8 @@ struct CPU::WDC65816::ProcessorStorageConstructor { target(OperationConstructPER); - target(CyclePush); // AAH. - target(CyclePush); // AAL. + target(CyclePushNotEmulation); // AAH. + target(CyclePushNotEmulation); // AAL. } // 22g. Stack; s, RTI. From e52d1866ab3ef59e1df9919d21a2bb9d2925877a Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Sun, 30 Jul 2023 16:32:56 -0400 Subject: [PATCH 06/10] Fix PEI stack usage. --- Processors/65816/Implementation/65816Storage.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Processors/65816/Implementation/65816Storage.cpp b/Processors/65816/Implementation/65816Storage.cpp index 72651a19e..399a3033f 100644 --- a/Processors/65816/Implementation/65816Storage.cpp +++ b/Processors/65816/Implementation/65816Storage.cpp @@ -718,8 +718,8 @@ struct CPU::WDC65816::ProcessorStorageConstructor { target(CycleFetchIncrementData); // AAL. target(CycleFetchData); // AAH. - target(CyclePush); // AAH. - target(CyclePush); // AAL. + target(CyclePushNotEmulation); // AAH. + target(CyclePushNotEmulation); // AAL. } // 22f. Stack; s, PER. From 9f1a657cc49d67bf9d8fbcd10ec26101fbb60596 Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Sun, 30 Jul 2023 16:33:44 -0400 Subject: [PATCH 07/10] Fix stack usage of PEA. --- Processors/65816/Implementation/65816Storage.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Processors/65816/Implementation/65816Storage.cpp b/Processors/65816/Implementation/65816Storage.cpp index 399a3033f..b01973a36 100644 --- a/Processors/65816/Implementation/65816Storage.cpp +++ b/Processors/65816/Implementation/65816Storage.cpp @@ -705,8 +705,8 @@ struct CPU::WDC65816::ProcessorStorageConstructor { target(OperationCopyInstructionToData); - target(CyclePush); // AAH. - target(CyclePush); // AAL. + target(CyclePushNotEmulation); // AAH. + target(CyclePushNotEmulation); // AAL. } // 22e. Stack; s, PEI. From acd7f9f4cd2e4dcf5e414b8283d743e96439cacb Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Sun, 30 Jul 2023 16:34:42 -0400 Subject: [PATCH 08/10] Fix stack usage of JSL. --- Processors/65816/Implementation/65816Storage.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/Processors/65816/Implementation/65816Storage.cpp b/Processors/65816/Implementation/65816Storage.cpp index b01973a36..a901229b1 100644 --- a/Processors/65816/Implementation/65816Storage.cpp +++ b/Processors/65816/Implementation/65816Storage.cpp @@ -319,7 +319,7 @@ struct CPU::WDC65816::ProcessorStorageConstructor { target(CycleFetchIncrementPC); // New PCH. target(OperationCopyPBRToData); // Copy PBR to the data register. - target(CyclePush); // PBR. + target(CyclePushNotEmulation); // PBR. target(CycleFetchPreviousThrowaway); // IO. target(CycleFetchPC); // New PBR. @@ -327,8 +327,8 @@ struct CPU::WDC65816::ProcessorStorageConstructor { target(OperationConstructAbsolute); // Calculate data address. target(OperationPerform); // [JSL] - target(CyclePush); // PCH. - target(CyclePush); // PCL. + target(CyclePushNotEmulation); // PCH. + target(CyclePushNotEmulation); // PCL. } // 5. Absolute long, X; al, x. From e61a4eb5a9431a91442ad1d3e383f5a4db8e66c7 Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Sun, 30 Jul 2023 16:36:29 -0400 Subject: [PATCH 09/10] Regularise PHD and PLD. --- Processors/65816/Implementation/65816Storage.cpp | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/Processors/65816/Implementation/65816Storage.cpp b/Processors/65816/Implementation/65816Storage.cpp index a901229b1..99be184ed 100644 --- a/Processors/65816/Implementation/65816Storage.cpp +++ b/Processors/65816/Implementation/65816Storage.cpp @@ -668,12 +668,12 @@ struct CPU::WDC65816::ProcessorStorageConstructor { } // 22b(ii). Stack; s, PLx, ignoring emulation mode. I.e. PLD. - static void stack_pull_no_emulation(AccessType, bool is8bit, const std::function &target) { + static void stack_pld(AccessType, bool, const std::function &target) { target(CycleFetchPCThrowaway); // IO. target(CycleFetchPCThrowaway); // IO. - if(!is8bit) target(CyclePullNotEmulation); // REG low. - target(CyclePullNotEmulation); // REG [high]. + target(CyclePullNotEmulation); // REG low. + target(CyclePullNotEmulation); // REG [high]. target(OperationPerform); } @@ -689,13 +689,13 @@ struct CPU::WDC65816::ProcessorStorageConstructor { } // 22c(i). Stack; s, PHx, ignoring emulation mode. I.e. PHD. - static void stack_push_no_emulation(AccessType, bool is8bit, const std::function &target) { + static void stack_phd(AccessType, bool, const std::function &target) { target(CycleFetchPCThrowaway); // IO. target(OperationPerform); - if(!is8bit) target(CyclePushNotEmulation); // REG high. - target(CyclePushNotEmulation); // REG [low]. + target(CyclePushNotEmulation); // REG high. + target(CyclePushNotEmulation); // REG [low]. } // 22d. Stack; s, PEA. @@ -839,7 +839,7 @@ ProcessorStorage::ProcessorStorage() { /* 0x08 PHP s */ op(stack_push, PHP, AccessMode::Always8Bit); /* 0x09 ORA # */ op(immediate, ORA); /* 0x0a ASL A */ op(accumulator, ASL); - /* 0x0b PHD s */ op(stack_push_no_emulation, PHD, AccessMode::Always16Bit); + /* 0x0b PHD s */ op(stack_phd, PHD); /* 0x0c TSB a */ op(absolute_rmw, TSB); /* 0x0d ORA a */ op(absolute, ORA); /* 0x0e ASL a */ op(absolute_rmw, ASL); @@ -873,7 +873,7 @@ ProcessorStorage::ProcessorStorage() { /* 0x28 PLP s */ op(stack_pull, PLP, AccessMode::Always8Bit); /* 0x29 AND # */ op(immediate, AND); /* 0x2a ROL A */ op(accumulator, ROL); - /* 0x2b PLD s */ op(stack_pull_no_emulation, PLD, AccessMode::Always16Bit); + /* 0x2b PLD s */ op(stack_pld, PLD); /* 0x2c BIT a */ op(absolute, BIT); /* 0x2d AND a */ op(absolute, AND); /* 0x2e ROL a */ op(absolute_rmw, ROL); From 226272501066a3cf385af38609a1d301268d89ff Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Mon, 31 Jul 2023 17:08:02 -0400 Subject: [PATCH 10/10] Reveal 16-bit stack pointer when asked, regardless of mode. --- Processors/65816/Implementation/65816Base.cpp | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/Processors/65816/Implementation/65816Base.cpp b/Processors/65816/Implementation/65816Base.cpp index 83bb01701..3eaf614cd 100644 --- a/Processors/65816/Implementation/65816Base.cpp +++ b/Processors/65816/Implementation/65816Base.cpp @@ -14,10 +14,7 @@ uint16_t ProcessorBase::value_of(Register r) const { switch (r) { case Register::ProgramCounter: return registers_.pc; case Register::LastOperationAddress: return last_operation_pc_; - case Register::StackPointer: - return - (registers_.s.full & (registers_.emulation_flag ? 0xff : 0xffff)) | - (registers_.emulation_flag ? 0x100 : 0x000); + case Register::StackPointer: return registers_.s.full; case Register::Flags: return get_flags(); case Register::A: return registers_.a.full; case Register::X: return registers_.x.full;