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mirror of https://github.com/TomHarte/CLK.git synced 2024-07-05 10:28:58 +00:00

Removed the implicit reset upon 6502 startup, adding a reset line. Hence all tests now pass again. Added an empty shell for timing tests, the all-RAM 6502 now counting bus cycles.

This commit is contained in:
Thomas Harte 2015-08-13 00:51:06 +01:00
parent 687816d470
commit d19f8ed507
6 changed files with 40 additions and 2 deletions

View File

@ -25,6 +25,7 @@ Machine::Machine()
memset(_collisions, 0xff, sizeof(_collisions));
setup6502();
set_reset_line(true);
}
Machine::~Machine()
@ -245,6 +246,8 @@ void Machine::output_pixels(int count)
int Machine::perform_bus_operation(CPU6502::BusOperation operation, uint16_t address, uint8_t *value)
{
set_reset_line(false);
uint8_t returnValue = 0xff;
int cycles_run_for = 1;
const int32_t ready_line_disable_time = 225;//horizontalTimerReload;

View File

@ -16,6 +16,7 @@
4B1414601B58885000E04248 /* WolfgangLorenzTests.swift in Sources */ = {isa = PBXBuildFile; fileRef = 4B14145F1B58885000E04248 /* WolfgangLorenzTests.swift */; };
4B1414621B58888700E04248 /* KlausDormannTests.swift in Sources */ = {isa = PBXBuildFile; fileRef = 4B1414611B58888700E04248 /* KlausDormannTests.swift */; };
4B366DFC1B5C165A0026627B /* CRT.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4B366DFA1B5C165A0026627B /* CRT.cpp */; };
4B92EACA1B7C112B00246143 /* TimingTests.swift in Sources */ = {isa = PBXBuildFile; fileRef = 4B92EAC91B7C112B00246143 /* TimingTests.swift */; };
4BB298EE1B587D8400A49093 /* 6502_functional_test.bin in Resources */ = {isa = PBXBuildFile; fileRef = 4BB297E01B587D8300A49093 /* 6502_functional_test.bin */; };
4BB298EF1B587D8400A49093 /* AllSuiteA.bin in Resources */ = {isa = PBXBuildFile; fileRef = 4BB297E11B587D8300A49093 /* AllSuiteA.bin */; };
4BB298F01B587D8400A49093 /* TestMachine.mm in Sources */ = {isa = PBXBuildFile; fileRef = 4BB297E31B587D8300A49093 /* TestMachine.mm */; };
@ -327,6 +328,7 @@
4B366DFB1B5C165A0026627B /* CRT.hpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.h; name = CRT.hpp; path = ../../Outputs/CRT.hpp; sourceTree = "<group>"; };
4B6D7F921B58822000787C9A /* Atari2600.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = Atari2600.cpp; sourceTree = "<group>"; };
4B6D7F931B58822000787C9A /* Atari2600.hpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.h; path = Atari2600.hpp; sourceTree = "<group>"; };
4B92EAC91B7C112B00246143 /* TimingTests.swift */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.swift; path = TimingTests.swift; sourceTree = "<group>"; };
4BB297DF1B587D8200A49093 /* Clock SignalTests-Bridging-Header.h */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.c.h; path = "Clock SignalTests-Bridging-Header.h"; sourceTree = "<group>"; };
4BB297E01B587D8300A49093 /* 6502_functional_test.bin */ = {isa = PBXFileReference; lastKnownFileType = archive.macbinary; path = 6502_functional_test.bin; sourceTree = "<group>"; };
4BB297E11B587D8300A49093 /* AllSuiteA.bin */ = {isa = PBXFileReference; lastKnownFileType = archive.macbinary; path = AllSuiteA.bin; sourceTree = "<group>"; };
@ -994,6 +996,7 @@
4BB73EB61B587A5100552FC2 /* AllSuiteATests.swift */,
4B1414611B58888700E04248 /* KlausDormannTests.swift */,
4B14145F1B58885000E04248 /* WolfgangLorenzTests.swift */,
4B92EAC91B7C112B00246143 /* TimingTests.swift */,
);
path = "Clock SignalTests";
sourceTree = "<group>";
@ -1445,6 +1448,7 @@
files = (
4B14145E1B5887AA00E04248 /* CPU6502AllRAM.cpp in Sources */,
4B14145D1B5887A600E04248 /* CPU6502.cpp in Sources */,
4B92EACA1B7C112B00246143 /* TimingTests.swift in Sources */,
4BB73EB71B587A5100552FC2 /* AllSuiteATests.swift in Sources */,
4B1414621B58888700E04248 /* KlausDormannTests.swift in Sources */,
4BB298F01B587D8400A49093 /* TestMachine.mm in Sources */,

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@ -0,0 +1,13 @@
//
// TimingTests.swift
// Clock Signal
//
// Created by Thomas Harte on 13/08/2015.
// Copyright © 2015 Thomas Harte. All rights reserved.
//
import Foundation
import XCTest
class TimingTests: XCTestCase {
}

View File

@ -371,6 +371,7 @@ template <class T> class Processor {
int _cycles_left_to_run;
bool _ready_line_is_enabled;
bool _reset_line_is_enabled;
bool _ready_is_active;
public:
@ -418,7 +419,10 @@ template <class T> class Processor {
#define checkSchedule(op) \
if(!_scheduledPrograms[_scheduleProgramsReadPointer]) {\
_scheduleProgramsReadPointer = _scheduleProgramsWritePointer = _scheduleProgramProgramCounter = 0;\
schedule_program(fetch_decode_execute);\
if(_reset_line_is_enabled)\
schedule_program(get_reset_program());\
else\
schedule_program(fetch_decode_execute);\
op;\
}
@ -910,7 +914,6 @@ template <class T> class Processor {
_decimalFlag &= Flag::Decimal;
_overflowFlag &= Flag::Overflow;
_s = 0;
schedule_program(get_reset_program());
_nextBusOperation = BusOperation::None;
}
@ -937,6 +940,11 @@ template <class T> class Processor {
}
}
void set_reset_line(bool active)
{
_reset_line_is_enabled = active;
}
bool is_jammed()
{
return _is_jammed;

View File

@ -14,11 +14,14 @@ using namespace CPU6502;
AllRAMProcessor::AllRAMProcessor()
{
_timestamp = 0;
setup6502();
}
int AllRAMProcessor::perform_bus_operation(CPU6502::BusOperation operation, uint16_t address, uint8_t *value)
{
_timestamp++;
if(isReadOperation(operation)) {
*value = _memory[address];
} else {
@ -33,3 +36,8 @@ void AllRAMProcessor::set_data_at_address(uint16_t startAddress, size_t length,
size_t endAddress = std::min(startAddress + length, (size_t)65536);
memcpy(&_memory[startAddress], data, endAddress - startAddress);
}
uint32_t AllRAMProcessor::get_timestamp()
{
return _timestamp;
}

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@ -22,9 +22,11 @@ class AllRAMProcessor: public Processor<AllRAMProcessor> {
int perform_bus_operation(CPU6502::BusOperation operation, uint16_t address, uint8_t *value);
void set_data_at_address(uint16_t startAddress, size_t length, const uint8_t *data);
uint32_t get_timestamp();
private:
uint8_t _memory[65536];
uint32_t _timestamp;
};
}