mirror of
https://github.com/TomHarte/CLK.git
synced 2024-09-11 22:56:20 +00:00
Added test of perfect DPLL input timing.
This commit is contained in:
parent
94db45456e
commit
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@ -333,6 +333,8 @@
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4BEF6AAA1D35CE9E00E73575 /* DigitalPhaseLockedLoopBridge.mm in Sources */ = {isa = PBXBuildFile; fileRef = 4BEF6AA91D35CE9E00E73575 /* DigitalPhaseLockedLoopBridge.mm */; };
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4BEF6AAC1D35D1C400E73575 /* DPLLTests.swift in Sources */ = {isa = PBXBuildFile; fileRef = 4BEF6AAB1D35D1C400E73575 /* DPLLTests.swift */; };
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/* End PBXBuildFile section */
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/* End PBXBuildFile section */
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/* Begin PBXContainerItemProxy section */
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@ -737,6 +739,9 @@
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4BCA98C21D065CA20062F44C /* 6522.hpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.h; path = 6522.hpp; sourceTree = "<group>"; };
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4BCA98C21D065CA20062F44C /* 6522.hpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.h; path = 6522.hpp; sourceTree = "<group>"; };
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4BEF6AA91D35CE9E00E73575 /* DigitalPhaseLockedLoopBridge.mm */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.objcpp; path = DigitalPhaseLockedLoopBridge.mm; sourceTree = "<group>"; };
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4BEF6AAB1D35D1C400E73575 /* DPLLTests.swift */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.swift; path = DPLLTests.swift; sourceTree = "<group>"; };
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/* End PBXFileReference section */
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/* Begin PBXFrameworksBuildPhase section */
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/* Begin PBXFrameworksBuildPhase section */
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@ -887,13 +892,15 @@
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isa = PBXGroup;
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isa = PBXGroup;
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children = (
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children = (
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4B3BA0C51D318B44005DD7A7 /* C1540Bridge.h */,
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4B3BA0C51D318B44005DD7A7 /* C1540Bridge.h */,
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4B3BA0C61D318B44005DD7A7 /* C1540Bridge.mm */,
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4B3BA0C71D318B44005DD7A7 /* Clock SignalTests-Bridging-Header.h */,
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4B3BA0C71D318B44005DD7A7 /* Clock SignalTests-Bridging-Header.h */,
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4BEF6AA81D35CE9E00E73575 /* DigitalPhaseLockedLoopBridge.h */,
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4B3BA0C81D318B44005DD7A7 /* MOS6522Bridge.h */,
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4B3BA0C81D318B44005DD7A7 /* MOS6522Bridge.h */,
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4B3BA0C91D318B44005DD7A7 /* MOS6522Bridge.mm */,
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4B3BA0CA1D318B44005DD7A7 /* MOS6532Bridge.h */,
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4B3BA0CA1D318B44005DD7A7 /* MOS6532Bridge.h */,
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4B3BA0CB1D318B44005DD7A7 /* MOS6532Bridge.mm */,
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4B3BA0CC1D318B44005DD7A7 /* TestMachine.h */,
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4B3BA0CC1D318B44005DD7A7 /* TestMachine.h */,
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4B3BA0C61D318B44005DD7A7 /* C1540Bridge.mm */,
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4BEF6AA91D35CE9E00E73575 /* DigitalPhaseLockedLoopBridge.mm */,
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4B3BA0C91D318B44005DD7A7 /* MOS6522Bridge.mm */,
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4B3BA0CB1D318B44005DD7A7 /* MOS6532Bridge.mm */,
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4B3BA0CD1D318B44005DD7A7 /* TestMachine.mm */,
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4B3BA0CD1D318B44005DD7A7 /* TestMachine.mm */,
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);
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);
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path = Bridges;
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path = Bridges;
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@ -1335,6 +1342,7 @@
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4B1E85801D176468001EF87D /* 6532Tests.swift */,
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4B1E85801D176468001EF87D /* 6532Tests.swift */,
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4BB73EB61B587A5100552FC2 /* AllSuiteATests.swift */,
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4BB73EB61B587A5100552FC2 /* AllSuiteATests.swift */,
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4B3BA0C21D318AEB005DD7A7 /* C1540Tests.swift */,
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4B3BA0C21D318AEB005DD7A7 /* C1540Tests.swift */,
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4BEF6AAB1D35D1C400E73575 /* DPLLTests.swift */,
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4B1414611B58888700E04248 /* KlausDormannTests.swift */,
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4B1414611B58888700E04248 /* KlausDormannTests.swift */,
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4B14145F1B58885000E04248 /* WolfgangLorenzTests.swift */,
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4B14145F1B58885000E04248 /* WolfgangLorenzTests.swift */,
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4B3BA0C41D318B44005DD7A7 /* Bridges */,
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4B3BA0C41D318B44005DD7A7 /* Bridges */,
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@ -1903,10 +1911,12 @@
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4B14145D1B5887A600E04248 /* CPU6502.cpp in Sources */,
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4B14145D1B5887A600E04248 /* CPU6502.cpp in Sources */,
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4B1E85811D176468001EF87D /* 6532Tests.swift in Sources */,
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4B1E85811D176468001EF87D /* 6532Tests.swift in Sources */,
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4BC9E1EE1D23449A003FCEE4 /* 6502InterruptTests.swift in Sources */,
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4BC9E1EE1D23449A003FCEE4 /* 6502InterruptTests.swift in Sources */,
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4BEF6AAA1D35CE9E00E73575 /* DigitalPhaseLockedLoopBridge.mm in Sources */,
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4B3BA0CE1D318B44005DD7A7 /* C1540Bridge.mm in Sources */,
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4B3BA0CE1D318B44005DD7A7 /* C1540Bridge.mm in Sources */,
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4B3BA0D11D318B44005DD7A7 /* TestMachine.mm in Sources */,
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4B3BA0D11D318B44005DD7A7 /* TestMachine.mm in Sources */,
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4B92EACA1B7C112B00246143 /* 6502TimingTests.swift in Sources */,
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4B92EACA1B7C112B00246143 /* 6502TimingTests.swift in Sources */,
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4BB73EB71B587A5100552FC2 /* AllSuiteATests.swift in Sources */,
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4BB73EB71B587A5100552FC2 /* AllSuiteATests.swift in Sources */,
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4BEF6AAC1D35D1C400E73575 /* DPLLTests.swift in Sources */,
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4B3BA0CF1D318B44005DD7A7 /* MOS6522Bridge.mm in Sources */,
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4B3BA0CF1D318B44005DD7A7 /* MOS6522Bridge.mm in Sources */,
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4BC751B21D157E61006C31D9 /* 6522Tests.swift in Sources */,
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4BC751B21D157E61006C31D9 /* 6522Tests.swift in Sources */,
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4B3BA0D01D318B44005DD7A7 /* MOS6532Bridge.mm in Sources */,
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4B3BA0D01D318B44005DD7A7 /* MOS6532Bridge.mm in Sources */,
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@ -6,3 +6,4 @@
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#import "MOS6522Bridge.h"
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#import "MOS6522Bridge.h"
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#import "MOS6532Bridge.h"
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#import "MOS6532Bridge.h"
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#import "C1540Bridge.h"
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#import "C1540Bridge.h"
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#import "DigitalPhaseLockedLoopBridge.h"
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@ -0,0 +1,20 @@
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//
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// DigitalPhaseLockedLoopBridge.h
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// Clock Signal
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//
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// Created by Thomas Harte on 12/07/2016.
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// Copyright © 2016 Thomas Harte. All rights reserved.
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//
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#import <Foundation/Foundation.h>
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@interface DigitalPhaseLockedLoopBridge : NSObject
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- (instancetype)initWithClocksPerBit:(NSUInteger)clocksPerBit tolerance:(NSUInteger)tolerance historyLength:(NSUInteger)historyLength;
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- (void)runForCycles:(NSUInteger)cycles;
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- (void)addPulse;
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@property(nonatomic) NSUInteger stream;
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@end
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@ -0,0 +1,61 @@
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//
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// DigitalPhaseLockedLoopBridge.m
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// Clock Signal
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//
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// Created by Thomas Harte on 12/07/2016.
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// Copyright © 2016 Thomas Harte. All rights reserved.
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//
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#import "DigitalPhaseLockedLoopBridge.h"
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#include "DigitalPhaseLockedLoop.hpp"
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#include <memory>
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@interface DigitalPhaseLockedLoopBridge(BitPushing)
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- (void)pushBit:(int)value;
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@end
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class DigitalPhaseLockedLoopDelegate: public Storage::DigitalPhaseLockedLoop::Delegate {
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public:
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__weak DigitalPhaseLockedLoopBridge *bridge;
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void digital_phase_locked_loop_output_bit(int value)
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{
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[bridge pushBit:value ? 1 : 0];
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}
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};
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@implementation DigitalPhaseLockedLoopBridge
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{
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std::unique_ptr<Storage::DigitalPhaseLockedLoop> _digitalPhaseLockedLoop;
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DigitalPhaseLockedLoopDelegate _delegate;
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}
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- (instancetype)initWithClocksPerBit:(NSUInteger)clocksPerBit tolerance:(NSUInteger)tolerance historyLength:(NSUInteger)historyLength
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{
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self = [super init];
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if(self)
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{
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_digitalPhaseLockedLoop.reset(new Storage::DigitalPhaseLockedLoop((unsigned int)clocksPerBit, (unsigned int)tolerance, (unsigned int)historyLength));
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_delegate.bridge = self;
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_digitalPhaseLockedLoop->set_delegate(&_delegate);
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}
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return self;
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}
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- (void)runForCycles:(NSUInteger)cycles
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{
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_digitalPhaseLockedLoop->run_for_cycles((unsigned int)cycles);
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}
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- (void)addPulse
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{
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_digitalPhaseLockedLoop->add_pulse();
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}
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- (void)pushBit:(int)value
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{
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_stream = (_stream << 1) | value;
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}
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@end
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28
OSBindings/Mac/Clock SignalTests/DPLLTests.swift
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28
OSBindings/Mac/Clock SignalTests/DPLLTests.swift
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//
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// DPLLTests.swift
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// Clock Signal
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//
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// Created by Thomas Harte on 12/07/2016.
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// Copyright © 2016 Thomas Harte. All rights reserved.
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//
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import XCTest
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class DPLLTests: XCTestCase {
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func testPerfectInput() {
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let pll = DigitalPhaseLockedLoopBridge(clocksPerBit: 100, tolerance: 20, historyLength: 5)
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// clock in two 1s, a 0, and a 1
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pll.runForCycles(50)
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pll.addPulse()
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pll.runForCycles(100)
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pll.addPulse()
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pll.runForCycles(200)
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pll.addPulse()
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pll.runForCycles(50)
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XCTAssert(pll.stream == 0xd, "PLL should have clocked four bits")
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}
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}
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@ -38,7 +38,7 @@ void DigitalPhaseLockedLoop::run_for_cycles(unsigned int number_of_cycles)
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_window_offset %= _current_window_length;
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_window_offset %= _current_window_length;
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}
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}
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// updte timing
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// update timing
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_next_pulse_time += number_of_cycles;
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_next_pulse_time += number_of_cycles;
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}
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}
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*/
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*/
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class Delegate {
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class Delegate {
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public:
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public:
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virtual void digital_phase_locked_loop_output_bit(bool value) = 0;
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virtual void digital_phase_locked_loop_output_bit(int value) = 0;
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};
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};
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void set_delegate(Delegate *delegate)
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void set_delegate(Delegate *delegate)
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{
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{
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