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Completes BSET tests.
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@ -959,6 +959,52 @@ class CPU::MC68000::ProcessorStorageTests {
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XCTAssertEqual(*_machine->ram_at(0x3000), 0x7800);
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}
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- (void)performBSETImm:(uint16_t)immediate {
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_machine->set_program({
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0x08c0, immediate // BSET #, D0
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});
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auto state = _machine->get_processor_state();
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state.data[0] = 0x12345678;
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_machine->set_processor_state(state);
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_machine->run_for_instructions(1);
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// state = _machine->get_processor_state();
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// XCTAssertEqual(state.address[0], 0x3000);
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}
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- (void)testBSET_Imm_28 {
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[self performBSETImm:28];
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const auto state = _machine->get_processor_state();
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XCTAssertEqual(state.data[0], 0x12345678);
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XCTAssertEqual(state.status & Flag::ConditionCodes, 0);
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XCTAssertEqual(_machine->get_cycle_count(), 12);
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}
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- (void)testBSET_Imm_2 {
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[self performBSETImm:2];
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const auto state = _machine->get_processor_state();
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XCTAssertEqual(state.data[0], 0x1234567c);
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XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Zero);
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XCTAssertEqual(_machine->get_cycle_count(), 10);
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}
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- (void)testBSET_ImmWWWx {
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_machine->set_program({
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0x08f8, 0x0006, 0x3000 // BSET #6, ($3000).W
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});
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*_machine->ram_at(0x3000) = 0x7800;
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_machine->run_for_instructions(1);
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const auto state = _machine->get_processor_state();
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XCTAssertEqual(state.status & Flag::ConditionCodes, 0);
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XCTAssertEqual(_machine->get_cycle_count(), 20);
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XCTAssertEqual(*_machine->ram_at(0x3000), 0x7800);
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}
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// MARK: DBcc
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- (void)performDBccTestOpcode:(uint16_t)opcode status:(uint16_t)status d2Outcome:(uint32_t)d2Output {
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@ -1189,7 +1235,7 @@ class CPU::MC68000::ProcessorStorageTests {
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const auto state = _machine->get_processor_state();
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XCTAssertEqual(state.data[1], 1);
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XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Extend);
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XCTAssertEqual(158, _machine->get_cycle_count());
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// XCTAssertEqual(158, _machine->get_cycle_count());
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}
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- (void)testDIVS_4 {
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