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mirror of https://github.com/TomHarte/CLK.git synced 2024-07-03 11:30:02 +00:00

Switch to slightly more straightforward presumption of no data wanted.

This commit is contained in:
Thomas Harte 2021-12-02 09:41:16 -05:00
parent 9554869886
commit d6f1ea50a6
2 changed files with 11 additions and 11 deletions

View File

@ -29,7 +29,7 @@ Audio::Audio(Chipset &chipset, uint16_t *ram, size_t word_size, float output_rat
}
bool Audio::advance_dma(int channel) {
if(channels_[channel].has_data) {
if(!channels_[channel].wants_data) {
return false;
}
@ -58,7 +58,7 @@ void Audio::set_volume(int channel, uint16_t volume) {
void Audio::set_data(int channel, uint16_t data) {
assert(channel >= 0 && channel < 4);
channels_[channel].has_data = true;
channels_[channel].wants_data = false;
channels_[channel].data = data;
}
@ -325,7 +325,7 @@ template <> bool Audio::Channel::transit<
state = State::PlayingHigh;
data_latch = data; // i.e. pbufld1
has_data = false;
wants_data = true;
period_counter = period; // i.e. percntrld
// TODO: volcntrld (see above).
@ -334,7 +334,7 @@ template <> bool Audio::Channel::transit<
}
template <> bool Audio::Channel::output<Audio::Channel::State::Disabled>() {
if(has_data && !dma_enabled && !interrupt_pending) {
if(!wants_data && !dma_enabled && !interrupt_pending) {
return transit<State::Disabled, State::PlayingHigh>();
}
@ -355,7 +355,7 @@ template <> bool Audio::Channel::transit<
Audio::Channel::State::WaitingForDMA>() {
state = State::WaitingForDMA;
has_data = false;
wants_data = true;
if(length == 1) {
length_counter = length;
return true;
@ -369,7 +369,7 @@ template <> bool Audio::Channel::output<Audio::Channel::State::WaitingForDummyDM
return transit<State::WaitingForDummyDMA, State::Disabled>();
}
if(dma_enabled && has_data) {
if(dma_enabled && !wants_data) {
return transit<State::WaitingForDummyDMA, State::WaitingForDMA>();
}
@ -386,7 +386,7 @@ template <> bool Audio::Channel::transit<
state = State::PlayingHigh;
data_latch = data;
has_data = false;
wants_data = true;
period_counter = period; // i.e. percntrld
return false;
@ -397,7 +397,7 @@ template <> bool Audio::Channel::output<Audio::Channel::State::WaitingForDMA>()
return transit<State::WaitingForDummyDMA, State::Disabled>();
}
if(dma_enabled && has_data) {
if(dma_enabled && !wants_data) {
return transit<State::WaitingForDummyDMA, State::PlayingHigh>();
}
@ -424,7 +424,7 @@ template <> bool Audio::Channel::transit<
// if lenfin and AUDxON and AUDxDAT, then lencntrld
// if (not lenfin) and AUDxON and AUDxDAT, then lencount
// if lenfin and AUDxON and AUDxDAT, then intreq2
if(dma_enabled && has_data) {
if(dma_enabled && !wants_data) {
--length_counter;
if(!length_counter) {
length_counter = length;
@ -465,7 +465,7 @@ template <> bool Audio::Channel::transit<
return true;
} else {
data_latch = data; // i.e. pbufld2
has_data = false; // AUDxDR
wants_data = true; // AUDxDR
}
if(dma_enabled && will_request_interrupt) {

View File

@ -67,7 +67,7 @@ class Audio: public DMADevice<4> {
// The data latch plus a count of unused samples
// in the latch, which will always be 0, 1 or 2.
uint16_t data = 0x0000;
bool has_data = false;
bool wants_data = false;
uint16_t data_latch = 0x0000;
// Number of words remaining in DMA data.