6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2025-02-15 11:32:29 +00:00
Code Issues Projects Releases Wiki Activity

Simplify ownership of the shift value.

Browse Source
This commit is contained in:
Thomas Harte 2025-01-22 16:12:45 -05:00
parent 95a2d1013c
commit d701990df4
2 changed files with 7 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
Components/6522/6522.hpp
View File

@ -131,7 +131,7 @@ private:
void access(int address);
template <Port> uint8_t get_port_input(uint8_t output_mask, uint8_t output, uint8_t timer_mask);
template <Port port, int shift> void update_pcr(const uint8_t);
template <Port port> void update_pcr(const uint8_t);
inline void reevaluate_interrupts();
/// Sets the current intended output value for the port and line;

14
Components/6522/Implementation/6522Implementation.hpp
View File

@ -132,13 +132,11 @@ template <typename T> void MOS6522<T>::write(int address, const uint8_t value) {
}
evaluate_port_b_output();
break;
case 0xc: { // Peripheral control ('PCR').
// const auto old_peripheral_control = registers_.peripheral_control;
case 0xc: // Peripheral control ('PCR').
registers_.peripheral_control = value;
update_pcr<Port::A, 0>(value);
update_pcr<Port::B, 4>(value);
} break;
update_pcr<Port::A>(value);
update_pcr<Port::B>(value >> 4);
break;
// Interrupt control
case 0xd: // Interrupt flag regiser ('IFR').
@ -156,10 +154,10 @@ template <typename T> void MOS6522<T>::write(int address, const uint8_t value) {
}
template <typename T>
template <Port port, int shift>
template <Port port>
void MOS6522<T>::update_pcr(const uint8_t value) {
handshake_modes_[port] = HandshakeMode::None;
switch((value >> shift) & 0x0e) {
switch(value & 0x0e) {
default: break;
case 0x00: // Negative interrupt input; set Cx2 interrupt on negative Cx2 transition, clear on access to Port x register.