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https://github.com/TomHarte/CLK.git
synced 2025-03-25 06:30:38 +00:00
Tidy up and comment a little further.
This commit is contained in:
Thomas Harte
parent
9566a8de67
commit
d7bb1a9ee1
InstructionSets/x86/Implementation
@ -16,7 +16,10 @@
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namespace InstructionSet::x86::Primitive {
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template <typename ContextT>
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void aaa(CPU::RegisterPair16 &ax, ContextT &context) { // P. 313
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void aaa(
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CPU::RegisterPair16 &ax,
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ContextT &context
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) { // P. 313
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/*
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IF ((AL AND 0FH) > 9) OR (AF = 1)
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THEN
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@ -45,7 +48,11 @@ void aaa(CPU::RegisterPair16 &ax, ContextT &context) { // P. 313
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}
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template <typename ContextT>
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void aad(CPU::RegisterPair16 &ax, uint8_t imm, ContextT &context) {
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void aad(
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CPU::RegisterPair16 &ax,
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uint8_t imm,
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ContextT &context
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) {
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/*
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tempAL ← AL;
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tempAH ← AH;
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@ -62,7 +69,11 @@ void aad(CPU::RegisterPair16 &ax, uint8_t imm, ContextT &context) {
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}
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template <typename ContextT>
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void aam(CPU::RegisterPair16 &ax, uint8_t imm, ContextT &context) {
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void aam(
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CPU::RegisterPair16 &ax,
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uint8_t imm,
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ContextT &context
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) {
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/*
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tempAL ← AL;
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AH ← tempAL / imm8; (* imm8 is set to 0AH for the AAD mnemonic *)
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@ -86,7 +97,10 @@ void aam(CPU::RegisterPair16 &ax, uint8_t imm, ContextT &context) {
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}
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template <typename ContextT>
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void aas(CPU::RegisterPair16 &ax, ContextT &context) {
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void aas(
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CPU::RegisterPair16 &ax,
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ContextT &context
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) {
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/*
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IF ((AL AND 0FH) > 9) OR (AF = 1)
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THEN
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@ -115,7 +129,10 @@ void aas(CPU::RegisterPair16 &ax, ContextT &context) {
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}
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template <typename ContextT>
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void daa(uint8_t &al, ContextT &context) {
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void daa(
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uint8_t &al,
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ContextT &context
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) {
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/*
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(as modified by https://www.felixcloutier.com/x86/daa ...)
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@ -167,7 +184,10 @@ void daa(uint8_t &al, ContextT &context) {
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}
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template <typename ContextT>
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void das(uint8_t &al, ContextT &context) {
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void das(
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uint8_t &al,
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ContextT &context
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) {
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/*
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(as modified by https://www.felixcloutier.com/x86/daa ...)
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@ -165,13 +165,16 @@ template <
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// Guide to the below:
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//
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// * use hard-coded register names where appropriate;
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// * use hard-coded register names where appropriate, otherwise use the source_X() and destination_X() lambdas;
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// * return directly if there is definitely no possible write back to RAM;
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// * otherwise use the source() and destination() lambdas, and break in order to allow a writeback if necessary.
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// * break if there's a chance of writeback.
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switch(instruction.operation()) {
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default:
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assert(false);
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case Operation::ESC:
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case Operation::NOP: return;
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case Operation::AAA: Primitive::aaa(context.registers.axp(), context); return;
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case Operation::AAD: Primitive::aad(context.registers.axp(), instruction.operand(), context); return;
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case Operation::AAM: Primitive::aam(context.registers.axp(), instruction.operand(), context); return;
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@ -182,14 +185,15 @@ template <
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case Operation::CBW: Primitive::cbw(pair_low()); return;
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case Operation::CWD: Primitive::cwd(pair_high(), pair_low()); return;
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case Operation::ESC:
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case Operation::NOP: return;
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case Operation::HLT: context.flow_controller.halt(); return;
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case Operation::WAIT: context.flow_controller.wait(); return;
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case Operation::ADC: Primitive::add<true, IntT>(destination_rmw(), source_r(), context); break;
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case Operation::ADD: Primitive::add<false, IntT>(destination_rmw(), source_r(), context); break;
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case Operation::ADC:
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Primitive::add<true, IntT>(destination_rmw(), source_r(), context);
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break;
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case Operation::ADD:
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Primitive::add<false, IntT>(destination_rmw(), source_r(), context);
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break;
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case Operation::SBB:
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Primitive::sub<true, AccessType::ReadModifyWrite, IntT>(destination_rmw(), source_r(), context);
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break;
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@ -199,7 +203,9 @@ template <
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case Operation::CMP:
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Primitive::sub<false, AccessType::Read, IntT>(destination_r(), source_r(), context);
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return;
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case Operation::TEST: Primitive::test<IntT>(destination_r(), source_r(), context); return;
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case Operation::TEST:
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Primitive::test<IntT>(destination_r(), source_r(), context);
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return;
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case Operation::MUL: Primitive::mul<IntT>(pair_high(), pair_low(), source_r(), context); return;
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case Operation::IMUL_1: Primitive::imul<IntT>(pair_high(), pair_low(), source_r(), context); return;
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@ -238,8 +244,12 @@ template <
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case Operation::SAHF: Primitive::sahf(context.registers.ah(), context); return;
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case Operation::LAHF: Primitive::lahf(context.registers.ah(), context); return;
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case Operation::LDS: if constexpr (data_size == DataSize::Word) Primitive::ld<Source::DS>(instruction, destination_w(), context); return;
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case Operation::LES: if constexpr (data_size == DataSize::Word) Primitive::ld<Source::ES>(instruction, destination_w(), context); return;
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case Operation::LDS:
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if constexpr (data_size == DataSize::Word) Primitive::ld<Source::DS>(instruction, destination_w(), context);
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return;
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case Operation::LES:
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if constexpr (data_size == DataSize::Word) Primitive::ld<Source::ES>(instruction, destination_w(), context);
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return;
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case Operation::LEA: Primitive::lea<IntT>(instruction, destination_w(), context); return;
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case Operation::MOV: Primitive::mov<IntT>(destination_w(), source_r()); break;
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@ -285,7 +295,8 @@ template <
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Primitive::setmo<IntT>(destination_w(), context);
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break;
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} else {
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// TODO.
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// TODO: perform ENTER as of the 80186.
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static_assert(int(Operation::SETMO) == int(Operation::ENTER));
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}
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return;
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case Operation::SETMOC:
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@ -297,12 +308,13 @@ template <
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}
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break;
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} else {
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// TODO.
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// TODO: perform BOUND as of the 80186.
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static_assert(int(Operation::SETMOC) == int(Operation::BOUND));
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}
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return;
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case Operation::OUT: Primitive::out<IntT>(port(instruction.destination().source()), pair_low(), context); return;
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case Operation::IN: Primitive::in<IntT>(port(instruction.source().source()), pair_low(), context); return;
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case Operation::IN: Primitive::in<IntT>(port(instruction.source().source()), pair_low(), context); return;
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case Operation::XLAT: Primitive::xlat<AddressT>(instruction, context); return;
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@ -372,10 +384,19 @@ template <
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// Write to memory if required to complete this operation.
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//
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// TODO: can I eliminate this with some RAII magic?
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// This is not currently handled via RAII because of the amount of context that would need to place onto the stack;
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// instead code has been set up to make sure there is only at most one writeable target on loan for potential
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// write back. I might flip-flop on this, especially if I can verify whether extra stack context is easily
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// optimised out.
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context.memory.template write_back<IntT>();
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}
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//
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// Public function; just a trampoline into a version of perform templated on data and address size.
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//
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// Which, yes, means there's an outer switch leading to an inner switch, which could be reduced to one big switch.
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// It'd be a substantial effort to find the most neat expression of that, I think, so it is not currently done.
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//
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template <
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typename InstructionT,
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typename ContextT
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