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Decides to shove bit number into AddressingMode.

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This commit is contained in:
Thomas Harte 2021-01-15 21:50:05 -05:00
parent 3c20e1f037
commit d82187bee2
3 changed files with 53 additions and 6 deletions
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30
InstructionSets/M50740/Decoder.cpp
View File

@ -11,7 +11,37 @@
namespace InstructionSet {
namespace M50740 {
std::pair<int, InstructionSet::M50740::Instruction> Decoder::decode(const uint8_t *source, size_t length) {
const uint8_t *const end = source + length;
if(phase_ == Phase::Instruction && source != end) {
const uint8_t instruction = *source;
++source;
++consumed_;
switch(instruction) {
default:
return std::make_pair(1, Instruction());
#define Map(opcode, operation, addressing_mode) case opcode: instr_ = Instruction(Operation::operation, AddressingMode::addressing_mode); break
Map(0x00, BRK, Implied); Map(0x01, ORA, XIndirect);
Map(0x02, JSR, ZeroPageIndirect); Map(0x03, BBS, Bit0AccumulatorRelative);
Map(0x05, ORA, ZeroPage);
Map(0x06, ASL, ZeroPage); Map(0x07, BBS, Bit0ZeroPageRelative);
Map(0x08, PHP, Implied); Map(0x09, ORA, Immediate);
Map(0x0a, ASL, Accumulator); Map(0x0b, SEB, Bit0Accumulator);
Map(0x0d, ORA, Absolute);
Map(0x0e, ASL, Absolute); Map(0x0f, SEB, Bit0ZeroPage);
#undef Map
}
}
return std::make_pair(0, Instruction());
}
}
}

6
InstructionSets/M50740/Decoder.hpp
View File

@ -24,8 +24,10 @@ class Decoder {
enum class Phase {
Instruction,
AwaitingOperand
};
int operand_size_;
} phase_ = Phase::Instruction;
int operand_size_ = 0;
int consumed_ = 0;
Instruction instr_;
};
}

23
InstructionSets/M50740/Instruction.hpp
View File

@ -30,11 +30,24 @@ enum class AddressingMode {
AbsoluteIndirect,
ZeroPageIndirect,
SpecialPage,
BitAccumulator,
BitZeroPage
ImmediateZeroPage,
Bit0Accumulator, Bit1Accumulator, Bit2Accumulator, Bit3Accumulator,
Bit4Accumulator, Bit5Accumulator, Bit6Accumulator, Bit37ccumulator,
Bit0ZeroPage, Bit1ZeroPage, Bit2ZeroPage, Bit3ZeroPage,
Bit4ZeroPage, Bit5ZeroPage, Bit6ZeroPage, Bit7ZeroPage,
Bit0AccumulatorRelative, Bit1AccumulatorRelative, Bit2AccumulatorRelative, Bit3AccumulatorRelative,
Bit4AccumulatorRelative, Bit5AccumulatorRelative, Bit6AccumulatorRelative, Bit7AccumulatorRelative,
Bit0ZeroPageRelative, Bit1ZeroPageRelative, Bit2ZeroPageRelative, Bit3ZeroPageRelative,
Bit4ZeroPageRelative, Bit5ZeroPageRelative, Bit6ZeroPageRelative, Bit7ZeroPageRelative,
};
enum class Operation: uint8_t {
Invalid,
ADC,
AND,
ASL,
@ -107,10 +120,12 @@ enum class Operation: uint8_t {
};
struct Instruction {
Operation operation;
AddressingMode addressing_mode;
Operation operation = Operation::Invalid;
AddressingMode addressing_mode = AddressingMode::Implied;
Instruction(Operation operation, AddressingMode addressing_mode) : operation(operation), addressing_mode(addressing_mode) {}
Instruction(Operation operation) : operation(operation) {}
Instruction() {}
};
}