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https://github.com/TomHarte/CLK.git
synced 2024-12-27 01:31:42 +00:00
Fixed flag setting for LD A, I and LD A, R, and corrected typo affecting LD DE, (nn).
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fb02b77e63
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@ -138,6 +138,8 @@ struct MicroOp {
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SET,
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CalculateRSTDestination,
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SetAFlags,
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SetInFlags,
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SetZero,
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@ -357,11 +359,11 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
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/* 0x40 IN B, (C); 0x41 OUT (C), B */ IN_OUT(de_.bytes.high),
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/* 0x52 SBC HL, DE */ SBC16(hl_, de_), /* 0x53 LD (nn), DE */ Program(FETCH16(temp16_, pc_), STORE16L(de_, temp16_)),
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/* 0x54 NEG */ Program({MicroOp::NEG}), /* 0x55 RETN */ Program(POP(pc_), {MicroOp::RETN}),
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/* 0x56 IM 1 */ Program({MicroOp::IM}), /* 0x57 LD A, I */ LD(a_, i_),
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/* 0x56 IM 1 */ Program({MicroOp::IM}), /* 0x57 LD A, I */ Program({MicroOp::Move8, &i_, &a_}, {MicroOp::SetAFlags}),
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/* 0x40 IN B, (C); 0x41 OUT (C), B */ IN_OUT(de_.bytes.low),
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/* 0x5a ADC HL, DE */ ADC16(hl_, de_), /* 0x5b LD DE, (nn) */ Program(FETCH16(temp16_, pc_), FETCH16L(bc_, temp16_)),
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/* 0x5a ADC HL, DE */ ADC16(hl_, de_), /* 0x5b LD DE, (nn) */ Program(FETCH16(temp16_, pc_), FETCH16L(de_, temp16_)),
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/* 0x5c NEG */ Program({MicroOp::NEG}), /* 0x5d RETN */ Program(POP(pc_), {MicroOp::RETN}),
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/* 0x5e IM 2 */ Program({MicroOp::IM}), /* 0x5f LD A, R */ LD(a_, r_),
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/* 0x5e IM 2 */ Program({MicroOp::IM}), /* 0x5f LD A, R */ Program({MicroOp::Move8, &r_, &a_}, {MicroOp::SetAFlags}),
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/* 0x40 IN B, (C); 0x41 OUT (C), B */ IN_OUT(hl_.bytes.high),
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/* 0x62 SBC HL, HL */ SBC16(hl_, hl_), /* 0x63 LD (nn), HL */ Program(FETCH16(temp16_, pc_), STORE16L(hl_, temp16_)),
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/* 0x64 NEG */ Program({MicroOp::NEG}), /* 0x65 RETN */ Program(POP(pc_), {MicroOp::RETN}),
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@ -1221,6 +1223,12 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
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set_parity(sign_result_);
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break;
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case MicroOp::SetAFlags:
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subtract_flag_ = half_carry_flag_ = 0;
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parity_overflow_flag_ = iff2_ ? Flag::Parity : 0;
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sign_result_ = zero_result_ = bit3_result_ = bit5_result_ = a_;
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break;
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case MicroOp::SetZero:
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temp8_ = 0;
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break;
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