From dcc0ee36790fa62d23bdb899fe5dc0fdbedebbf7 Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Sat, 16 May 2020 17:44:15 -0400 Subject: [PATCH] Adds input line capture. --- Processors/68000/State/State.cpp | 27 ++++++++++++++++++++++----- Processors/68000/State/State.hpp | 8 ++++++++ 2 files changed, 30 insertions(+), 5 deletions(-) diff --git a/Processors/68000/State/State.cpp b/Processors/68000/State/State.cpp index 083d13f2f..a24dca4a2 100644 --- a/Processors/68000/State/State.cpp +++ b/Processors/68000/State/State.cpp @@ -11,6 +11,7 @@ using namespace CPU::MC68000; State::State(const ProcessorBase &src): State() { + // Registers. for(int c = 0; c < 7; ++c) { registers.address[c] = src.address_[c].full; registers.data[c] = src.data_[c].full; @@ -21,6 +22,15 @@ State::State(const ProcessorBase &src): State() { registers.status = src.get_status(); registers.program_counter = src.program_counter_.full; registers.prefetch = src.prefetch_queue_.full; + + // Inputs. + inputs.bus_interrupt_level = uint8_t(src.bus_interrupt_level_); + inputs.dtack = src.dtack_; + inputs.is_peripheral_address = src.is_peripheral_address_; + inputs.bus_error = src.bus_error_; + inputs.bus_request = src.bus_request_; + inputs.bus_grant = false; // TODO (within the 68000). + inputs.halt = src.halt_; } void State::apply(ProcessorBase &target) { @@ -47,12 +57,19 @@ State::Registers::Registers() { } } +State::Inputs::Inputs() { + if(needs_declare()) { + DeclareField(bus_interrupt_level); + DeclareField(dtack); + DeclareField(is_peripheral_address); + DeclareField(bus_error); + DeclareField(bus_request); + DeclareField(bus_grant); + DeclareField(halt); + } +} + State::ExecutionState::ExecutionState() { if(needs_declare()) { } } - -State::Inputs::Inputs() { - if(needs_declare()) { - } -} diff --git a/Processors/68000/State/State.hpp b/Processors/68000/State/State.hpp index 15eda7273..4ed4fb14e 100644 --- a/Processors/68000/State/State.hpp +++ b/Processors/68000/State/State.hpp @@ -43,6 +43,14 @@ struct State: public Reflection::StructImpl { related to an access cycle. */ struct Inputs: public Reflection::StructImpl { + uint8_t bus_interrupt_level; + bool dtack; + bool is_peripheral_address; + bool bus_error; + bool bus_request; + bool bus_grant; + bool halt; + Inputs(); } inputs;