1
0
mirror of https://github.com/TomHarte/CLK.git synced 2024-11-19 08:31:11 +00:00

Fix ADD and ADC sign flags.

This commit is contained in:
Thomas Harte 2023-10-08 13:39:46 -04:00
parent a4b1d2b00a
commit dd3cc1f510

View File

@ -174,7 +174,8 @@ void adc(IntT &destination, IntT source, Status &status) {
status.carry = Numeric::carried_out<bit_size<IntT>() - 1>(destination, source, result);
status.auxiliary_carry = Numeric::carried_in<4>(destination, source, result);
status.sign = status.zero = status.parity = result;
status.sign = result & top_bit<IntT>();
status.zero = status.parity = result;
status.overflow = overflow<true, IntT>(destination, source, result);
destination = result;
@ -192,7 +193,8 @@ void add(IntT &destination, IntT source, Status &status) {
status.carry = Numeric::carried_out<bit_size<IntT>() - 1>(destination, source, result);
status.auxiliary_carry = Numeric::carried_in<4>(destination, source, result);
status.sign = status.zero = status.parity = result;
status.sign = result & top_bit<IntT>();
status.zero = status.parity = result;
status.overflow = overflow<true, IntT>(destination, source, result);
destination = result;