From ddf45a00100716ebfb9243bf15d99b00eb551568 Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Tue, 14 Aug 2018 19:49:14 -0400 Subject: [PATCH] Ensures NMI and RST reset D on 65C02s. --- .../Bridges/TestMachine6502.mm | 2 +- Processors/6502/AllRAM/6502AllRAM.cpp | 19 ++++++++++++++----- .../Implementation/6502Implementation.hpp | 9 +++++++-- .../6502/Implementation/6502Storage.cpp | 2 +- .../6502/Implementation/6502Storage.hpp | 2 +- 5 files changed, 24 insertions(+), 10 deletions(-) diff --git a/OSBindings/Mac/Clock SignalTests/Bridges/TestMachine6502.mm b/OSBindings/Mac/Clock SignalTests/Bridges/TestMachine6502.mm index d5a7787e9..5b6823991 100644 --- a/OSBindings/Mac/Clock SignalTests/Bridges/TestMachine6502.mm +++ b/OSBindings/Mac/Clock SignalTests/Bridges/TestMachine6502.mm @@ -40,7 +40,7 @@ static CPU::MOS6502::Register registerForRegister(CSTestMachine6502Register reg) if(self) { _processor = CPU::MOS6502::AllRAMProcessor::Processor( - is65C02 ? CPU::MOS6502::Personality::P65C02 : CPU::MOS6502::Personality::P6502); + is65C02 ? CPU::MOS6502::Personality::PWDC65C02 : CPU::MOS6502::Personality::P6502); } return self; diff --git a/Processors/6502/AllRAM/6502AllRAM.cpp b/Processors/6502/AllRAM/6502AllRAM.cpp index a8c0f8a6b..43e202efe 100644 --- a/Processors/6502/AllRAM/6502AllRAM.cpp +++ b/Processors/6502/AllRAM/6502AllRAM.cpp @@ -15,10 +15,10 @@ using namespace CPU::MOS6502; namespace { -class ConcreteAllRAMProcessor: public AllRAMProcessor, public BusHandler { +template class ConcreteAllRAMProcessor: public AllRAMProcessor, public BusHandler { public: - ConcreteAllRAMProcessor(Personality personality) : - mos6502_(personality, *this) { + ConcreteAllRAMProcessor() : + mos6502_(*this) { mos6502_.set_power_on(false); } @@ -63,11 +63,20 @@ class ConcreteAllRAMProcessor: public AllRAMProcessor, public BusHandler { } private: - CPU::MOS6502::Processor mos6502_; + CPU::MOS6502::Processor mos6502_; }; } AllRAMProcessor *AllRAMProcessor::Processor(Personality personality) { - return new ConcreteAllRAMProcessor(personality); +#define Bind(p) case p: return new ConcreteAllRAMProcessor

(); + switch(personality) { + default: + Bind(Personality::P6502) + Bind(Personality::PNES6502) + Bind(Personality::PSynertek65C02) + Bind(Personality::PWDC65C02) + Bind(Personality::PRockwell65C02) + } +#undef Bind } diff --git a/Processors/6502/Implementation/6502Implementation.hpp b/Processors/6502/Implementation/6502Implementation.hpp index ac1f74af7..09eee7cd6 100644 --- a/Processors/6502/Implementation/6502Implementation.hpp +++ b/Processors/6502/Implementation/6502Implementation.hpp @@ -152,10 +152,13 @@ if(number_of_cycles <= Cycles(0)) break; case OperationRSTPickVector: nextAddress.full = 0xfffc; continue; case CycleReadVectorLow: read_mem(pc_.bytes.low, nextAddress.full); break; case CycleReadVectorHigh: read_mem(pc_.bytes.high, nextAddress.full+1); break; - case OperationSetI: + case OperationSetIRQFlags: inverse_interrupt_flag_ = 0; if(is_65c02(personality)) decimal_flag_ = false; continue; + case OperationSetNMIRSTFlags: + if(is_65c02(personality)) decimal_flag_ = false; + continue; case CyclePullPCL: s_++; read_mem(pc_.bytes.low, s_ | 0x100); break; case CyclePullPCH: s_++; read_mem(pc_.bytes.high, s_ | 0x100); break; @@ -681,6 +684,7 @@ inline const ProcessorStorage::MicroOp *ProcessorStorage::get_reset_program() { CycleNoWritePush, OperationRSTPickVector, CycleNoWritePush, + OperationSetNMIRSTFlags, CycleReadVectorLow, CycleReadVectorHigh, OperationMoveToNextProgram @@ -697,7 +701,7 @@ inline const ProcessorStorage::MicroOp *ProcessorStorage::get_irq_program() { OperationBRKPickVector, OperationSetOperandFromFlags, CyclePushOperand, - OperationSetI, + OperationSetIRQFlags, CycleReadVectorLow, CycleReadVectorHigh, OperationMoveToNextProgram @@ -714,6 +718,7 @@ inline const ProcessorStorage::MicroOp *ProcessorStorage::get_nmi_program() { OperationNMIPickVector, OperationSetOperandFromFlags, CyclePushOperand, + OperationSetNMIRSTFlags, CycleReadVectorLow, CycleReadVectorHigh, OperationMoveToNextProgram diff --git a/Processors/6502/Implementation/6502Storage.cpp b/Processors/6502/Implementation/6502Storage.cpp index da0a9285a..35754fb01 100644 --- a/Processors/6502/Implementation/6502Storage.cpp +++ b/Processors/6502/Implementation/6502Storage.cpp @@ -80,7 +80,7 @@ ProcessorStorage::ProcessorStorage(Personality personality) { overflow_flag_ &= Flag::Overflow; const InstructionList operations_6502[256] = { - /* 0x00 BRK */ Program(CycleIncPCPushPCH, CyclePushPCL, OperationBRKPickVector, OperationSetOperandFromFlagsWithBRKSet, CyclePushOperand, OperationSetI, CycleReadVectorLow, CycleReadVectorHigh), + /* 0x00 BRK */ Program(CycleIncPCPushPCH, CyclePushPCL, OperationBRKPickVector, OperationSetOperandFromFlagsWithBRKSet, CyclePushOperand, OperationSetIRQFlags, CycleReadVectorLow, CycleReadVectorHigh), /* 0x01 ORA x, ind */ IndexedIndirectRead(OperationORA), /* 0x02 JAM */ JAM, /* 0x03 ASO x, ind */ IndexedIndirectReadModifyWrite(OperationASO), /* 0x04 NOP zpg */ ZeroNop(), /* 0x05 ORA zpg */ ZeroRead(OperationORA), diff --git a/Processors/6502/Implementation/6502Storage.hpp b/Processors/6502/Implementation/6502Storage.hpp index 85d4d1f3d..8f4fbf661 100644 --- a/Processors/6502/Implementation/6502Storage.hpp +++ b/Processors/6502/Implementation/6502Storage.hpp @@ -25,7 +25,7 @@ class ProcessorStorage { enum MicroOp { CycleFetchOperation, CycleFetchOperand, OperationDecodeOperation, CycleIncPCPushPCH, CyclePushPCH, CyclePushPCL, CyclePushA, CyclePushOperand, - CyclePushX, CyclePushY, OperationSetI, + CyclePushX, CyclePushY, OperationSetIRQFlags, OperationSetNMIRSTFlags, OperationBRKPickVector, OperationNMIPickVector, OperationRSTPickVector, CycleReadVectorLow, CycleReadVectorHigh,