6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2025-01-26 15:32:04 +00:00
Code Issues Projects Releases Wiki Activity

Added tests for everything except CALL. All passing.

Browse Source
This commit is contained in:
Thomas Harte 2017-06-19 22:00:04 -04:00
parent fadbfdf801
commit e05076b258
1 changed files with 211 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

211
OSBindings/Mac/Clock SignalTests/Z80MachineCycleTests.swift
View File

@ -979,4 +979,215 @@ class Z80MachineCycleTests: XCTestCase {
]
)
}
// TODO: CALL
// RET
func testRET() {
test(
program: [0xc9],
busCycles: [
MachineCycle(operation: .readOpcode, length: 4),
MachineCycle(operation: .read, length: 3),
MachineCycle(operation: .read, length: 3),
MachineCycle(operation: .readOpcode, length: 4),
]
)
}
// RET cc
func testRETcc() {
test(
program: [
0x37, // SCF
0xd0, // RET NC
0xd8, // RET C
],
busCycles: [
MachineCycle(operation: .readOpcode, length: 4),
MachineCycle(operation: .readOpcode, length: 5),
MachineCycle(operation: .readOpcode, length: 5),
MachineCycle(operation: .read, length: 3),
MachineCycle(operation: .read, length: 3),
MachineCycle(operation: .readOpcode, length: 4),
]
)
}
// RETI
func testRETI() {
test(
program: [0xed, 0x4d],
busCycles: [
MachineCycle(operation: .readOpcode, length: 4),
MachineCycle(operation: .readOpcode, length: 4),
MachineCycle(operation: .read, length: 3),
MachineCycle(operation: .read, length: 3),
MachineCycle(operation: .readOpcode, length: 4),
]
)
}
// RST
func testRST() {
test(
program: [0xc7],
busCycles: [
MachineCycle(operation: .readOpcode, length: 5),
MachineCycle(operation: .write, length: 3),
MachineCycle(operation: .write, length: 3),
MachineCycle(operation: .readOpcode, length: 4),
]
)
}
// IN A, (n)
func testINAn() {
test(
program: [0xdb, 0xfe],
busCycles: [
MachineCycle(operation: .readOpcode, length: 4),
MachineCycle(operation: .read, length: 3),
MachineCycle(operation: .portRead, length: 4),
MachineCycle(operation: .readOpcode, length: 4),
]
)
}
// IN r, (C)
func testINrC() {
test(
program: [0xed, 0x40],
busCycles: [
MachineCycle(operation: .readOpcode, length: 4),
MachineCycle(operation: .readOpcode, length: 4),
MachineCycle(operation: .portRead, length: 4),
MachineCycle(operation: .readOpcode, length: 4),
]
)
}
// INI
func testINI() {
test(
program: [0xed, 0xa2],
busCycles: [
MachineCycle(operation: .readOpcode, length: 4),
MachineCycle(operation: .readOpcode, length: 5),
MachineCycle(operation: .portRead, length: 4),
MachineCycle(operation: .write, length: 3),
MachineCycle(operation: .readOpcode, length: 4),
]
)
}
// INIR
func testINIR() {
test(
program: [
0x01, 0x02, 0x00, // LD BC, 2
0xed, 0xb2, // INIR
0x00, 0x00, 0x00 // NOP, NOP, NOP
],
busCycles: [
MachineCycle(operation: .readOpcode, length: 4),
MachineCycle(operation: .read, length: 3),
MachineCycle(operation: .read, length: 3),
MachineCycle(operation: .readOpcode, length: 4),
MachineCycle(operation: .readOpcode, length: 5),
MachineCycle(operation: .portRead, length: 4),
MachineCycle(operation: .write, length: 3),
MachineCycle(operation: .internalOperation, length: 5),
MachineCycle(operation: .readOpcode, length: 4),
MachineCycle(operation: .readOpcode, length: 5),
MachineCycle(operation: .portRead, length: 4),
MachineCycle(operation: .write, length: 3),
MachineCycle(operation: .readOpcode, length: 4),
]
)
}
// OUT (n), A
func testOUTnA() {
test(
program: [0xd3, 0xfe],
busCycles: [
MachineCycle(operation: .readOpcode, length: 4),
MachineCycle(operation: .read, length: 3),
MachineCycle(operation: .portWrite, length: 4),
MachineCycle(operation: .readOpcode, length: 4),
]
)
}
// OUT (C), r
func testOUTCr() {
test(
program: [0xed, 0x41],
busCycles: [
MachineCycle(operation: .readOpcode, length: 4),
MachineCycle(operation: .readOpcode, length: 4),
MachineCycle(operation: .portWrite, length: 4),
MachineCycle(operation: .readOpcode, length: 4),
]
)
}
// OUTI
func testOUTI() {
test(
program: [0xed, 0xa3],
busCycles: [
MachineCycle(operation: .readOpcode, length: 4),
MachineCycle(operation: .readOpcode, length: 5),
MachineCycle(operation: .read, length: 3),
MachineCycle(operation: .portWrite, length: 4),
MachineCycle(operation: .readOpcode, length: 4),
]
)
}
// OTIR
func testOTIR() {
test(
program: [
0x01, 0x02, 0x00, // LD BC, 2
0xed, 0xb3, // OTIR
0x00, 0x00, 0x00 // NOP, NOP, NOP
],
busCycles: [
MachineCycle(operation: .readOpcode, length: 4),
MachineCycle(operation: .read, length: 3),
MachineCycle(operation: .read, length: 3),
MachineCycle(operation: .readOpcode, length: 4),
MachineCycle(operation: .readOpcode, length: 5),
MachineCycle(operation: .read, length: 3),
MachineCycle(operation: .portWrite, length: 4),
MachineCycle(operation: .internalOperation, length: 5),
MachineCycle(operation: .readOpcode, length: 4),
MachineCycle(operation: .readOpcode, length: 5),
MachineCycle(operation: .read, length: 3),
MachineCycle(operation: .portWrite, length: 4),
MachineCycle(operation: .readOpcode, length: 4),
]
)
}
}