6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2025-01-14 13:33:42 +00:00
Code Issues Projects Releases Wiki Activity

Merge pull request #224 from TomHarte/OptionalWait

Browse Source 
Makes the Z80's support for WAIT input optional
This commit is contained in:
Thomas Harte 2017-08-26 23:16:22 -04:00 committed by GitHub
commit e34d4ce903
3 changed files with 19 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
Machines/AmstradCPC/AmstradCPC.cpp
View File

@ -998,7 +998,7 @@ class ConcreteMachine:
} }
} }
CPU::Z80::Processor<ConcreteMachine, false> z80_; CPU::Z80::Processor<ConcreteMachine, false, true> z80_;
CRTCBusHandler crtc_bus_handler_; CRTCBusHandler crtc_bus_handler_;
Motorola::CRTC::CRTC6845<CRTCBusHandler> crtc_; Motorola::CRTC::CRTC6845<CRTCBusHandler> crtc_;

2
Machines/ZX8081/ZX8081.cpp
View File

@ -332,7 +332,7 @@ class ConcreteMachine:
HalfCycles get_typer_frequency() override final { return Cycles(390000); } HalfCycles get_typer_frequency() override final { return Cycles(390000); }
private: private:
CPU::Z80::Processor<ConcreteMachine, false> z80_; CPU::Z80::Processor<ConcreteMachine, false, true> z80_;
std::shared_ptr<Video> video_; std::shared_ptr<Video> video_;
std::vector<uint8_t> zx81_rom_, zx80_rom_; std::vector<uint8_t> zx81_rom_, zx80_rom_;

19
Processors/Z80/Z80.hpp
View File

@ -193,7 +193,7 @@ class BusHandler {
order to provide the bus on which the Z80 operates and @c flush(), which is called upon completion of a continuous run order to provide the bus on which the Z80 operates and @c flush(), which is called upon completion of a continuous run
of cycles to allow a subclass to bring any on-demand activities up to date. of cycles to allow a subclass to bring any on-demand activities up to date.
*/ */
template <class T, bool uses_bus_request> class Processor { template <class T, bool uses_bus_request, bool uses_wait_line> class Processor {
private: private:
T &bus_handler_; T &bus_handler_;
@ -451,6 +451,7 @@ template <class T, bool uses_bus_request> class Processor {
// Allocate a landing area. // Allocate a landing area.
std::vector<size_t> operation_indices; std::vector<size_t> operation_indices;
target.all_operations.reserve(number_of_micro_ops);
target.instructions.resize(256, nullptr); target.instructions.resize(256, nullptr);
// Copy in all programs, recording where they go. // Copy in all programs, recording where they go.
@ -464,6 +465,12 @@ template <class T, bool uses_bus_request> class Processor {
continue; continue;
} }
// Skip optional waits if this instance doesn't use the wait line.
if(table[c][t].machine_cycle.was_requested && !uses_wait_line) {
t++;
continue;
}
// If an index placeholder is hit then drop it, and if offsets aren't being added, // If an index placeholder is hit then drop it, and if offsets aren't being added,
// then also drop the indexing that follows, which is assumed to be everything // then also drop the indexing that follows, which is assumed to be everything
// up to and including the next ::CalculateIndexAddress. Coupled to the INDEX() macro. // up to and including the next ::CalculateIndexAddress. Coupled to the INDEX() macro.
@ -795,6 +802,13 @@ template <class T, bool uses_bus_request> class Processor {
while(!isTerminal(source[length].type)) length++; while(!isTerminal(source[length].type)) length++;
size_t pointer = 0; size_t pointer = 0;
while(true) { while(true) {
// TODO: This test is duplicated from assemble_page; can a better factoring be found?
// Skip optional waits if this instance doesn't use the wait line.
if(source[pointer].machine_cycle.was_requested && !uses_wait_line) {
pointer++;
continue;
}
destination.emplace_back(source[pointer]); destination.emplace_back(source[pointer]);
if(isTerminal(source[pointer].type)) break; if(isTerminal(source[pointer].type)) break;
pointer++; pointer++;
@ -955,7 +969,7 @@ template <class T, bool uses_bus_request> class Processor {
bus_handler_.flush(); bus_handler_.flush();
return; return;
} }
if(operation->machine_cycle.was_requested) { if(uses_wait_line && operation->machine_cycle.was_requested) {
if(wait_line_) { if(wait_line_) {
scheduled_program_counter_--; scheduled_program_counter_--;
} else { } else {
@ -2002,6 +2016,7 @@ template <class T, bool uses_bus_request> class Processor {
Sets the logical value of the wait line. Sets the logical value of the wait line.
*/ */
inline void set_wait_line(bool value) { inline void set_wait_line(bool value) {
assert(uses_wait_line);
wait_line_ = value; wait_line_ = value;
} }