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Corrected typo: the input to an AY is BDIR, not BCDIR.

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This commit is contained in:
Thomas Harte 2017-08-01 17:06:57 -04:00
parent 3b292273c7
commit e6854ff8db
4 changed files with 6 additions and 6 deletions
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6
Components/AY38910/AY38910.cpp
View File

@ -244,12 +244,12 @@ void AY38910::set_control_lines(ControlLines control_lines) {
switch((int)control_lines) {
default: new_state = Inactive; break;
case (int)(BCDIR | BC2 | BC1):
case BCDIR:
case (int)(BDIR | BC2 | BC1):
case BDIR:
case BC1: new_state = LatchAddress; break;
case (int)(BC2 | BC1): new_state = Read; break;
case (int)(BCDIR | BC2): new_state = Write; break;
case (int)(BDIR | BC2): new_state = Write; break;
}
if(new_state != control_state_) {

2
Components/AY38910/AY38910.hpp
View File

@ -29,7 +29,7 @@ class AY38910: public ::Outputs::Filter<AY38910> {
enum ControlLines {
BC1 = (1 << 0),
BC2 = (1 << 1),
BCDIR = (1 << 2)
BDIR = (1 << 2)
};
/// Sets the value the AY would read from its data lines if it were not outputting.

2
Machines/AmstradCPC/AmstradCPC.cpp
View File

@ -263,7 +263,7 @@ class i8255PortHandler : public Intel::i8255::PortHandler {
// TODO: set casette output: ((value >> 5) & 1)
ay_->set_control_lines(
(GI::AY38910::ControlLines)(
((value & 0x80) ? GI::AY38910::BCDIR : 0) |
((value & 0x80) ? GI::AY38910::BDIR : 0) |
((value & 0x40) ? GI::AY38910::BC1 : 0) |
GI::AY38910::BC2
));

2
Machines/Oric/Oric.cpp
View File

@ -244,7 +244,7 @@ void Machine::VIA::run_for(const Cycles cycles) {
void Machine::VIA::update_ay() {
ay8910->run_for(cycles_since_ay_update_.flush());
ay8910->set_control_lines( (GI::AY38910::ControlLines)((ay_bdir_ ? GI::AY38910::BCDIR : 0) | (ay_bc1_ ? GI::AY38910::BC1 : 0) | GI::AY38910::BC2));
ay8910->set_control_lines( (GI::AY38910::ControlLines)((ay_bdir_ ? GI::AY38910::BDIR : 0) | (ay_bc1_ ? GI::AY38910::BC1 : 0) | GI::AY38910::BC2));
}
#pragma mark - TapePlayer