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Incorporates TRAPV tests.
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@ -2626,6 +2626,44 @@ class CPU::MC68000::ProcessorStorageTests {
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XCTAssertEqual(state.supervisor_stack_pointer, 0x200);
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}
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// MARK: TRAPV
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- (void)testTRAPV_taken {
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_machine->set_program({
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0x4e76 // TRAPV
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});
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_machine->set_initial_stack_pointer(0x206);
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auto state = _machine->get_processor_state();
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state.status = 0x702;
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state.supervisor_stack_pointer = 0x206;
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*_machine->ram_at(0x1e) = 0xfffe;
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*_machine->ram_at(0xfffe) = 0x4e71;
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_machine->set_processor_state(state);
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_machine->run_for_instructions(1);
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state = _machine->get_processor_state();
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XCTAssertEqual(state.status, 0x2702);
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XCTAssertEqual(state.stack_pointer(), 0x200);
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XCTAssertEqual(*_machine->ram_at(0x202), 0x0000);
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XCTAssertEqual(*_machine->ram_at(0x204), 0x1002);
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XCTAssertEqual(*_machine->ram_at(0x200), 0x702);
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XCTAssertEqual(34, _machine->get_cycle_count());
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}
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- (void)testTRAPV_untaken {
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_machine->set_program({
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0x4e76 // TRAPV
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});
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_machine->run_for_instructions(1);
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const auto state = _machine->get_processor_state();
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XCTAssertEqual(state.program_counter, 0x1002 + 4);
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XCTAssertEqual(4, _machine->get_cycle_count());
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}
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// MARK: UNLINK
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- (void)testUNLINK_A6 {
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@ -1268,10 +1268,12 @@ template <class T, bool dtack_is_implicit, bool signal_will_perform> void Proces
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case Operation::TRAPV: {
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if(overflow_flag_) {
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// Select the trap steps as next; the initial microcycle should be 4 cycles long.
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// Select the trap steps as next; the initial microcycle should be skipped.
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bus_program = trap_steps_;
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populate_trap_steps(7, get_status());
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set_next_microcycle_length(HalfCycles(0));
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// Push the address after the TRAPV.
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program_counter_.full -= 4;
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}
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} break;
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