From e8943618dc53d87bd3d44f55181e4ff2261452e1 Mon Sep 17 00:00:00 2001 From: Thomas Harte Date: Sat, 31 Oct 2020 10:21:13 -0400 Subject: [PATCH] Adds some extra commentary and distinguishes X/Y sizing from M. --- .../65816/Implementation/65816Storage.cpp | 19 +++++++++++++++++++ .../65816/Implementation/65816Storage.hpp | 5 +++-- 2 files changed, 22 insertions(+), 2 deletions(-) diff --git a/Processors/65816/Implementation/65816Storage.cpp b/Processors/65816/Implementation/65816Storage.cpp index 4392b26b5..91c48bf6b 100644 --- a/Processors/65816/Implementation/65816Storage.cpp +++ b/Processors/65816/Implementation/65816Storage.cpp @@ -23,6 +23,9 @@ struct CPU::WDC65816::ProcessorStorageConstructor { Read, Write }; + /// Divides memory-accessing instructions by whether they read or write. + /// Read-modify-writes are documented with completely distinct bus programs, + /// so there's no real ambiguity there. constexpr static AccessType access_type_for_operation(Operation operation) { switch(operation) { case ADC: case AND: case BIT: case CMP: @@ -41,6 +44,21 @@ struct CPU::WDC65816::ProcessorStorageConstructor { } } + /// Indicates which of the memory-accessing instructions take their cue from the current + /// size of the index registers, rather than 'memory'[/accumulator]. + constexpr static bool operation_is_index_sized(Operation operation) { + switch(operation) { + case CPX: case CPY: + case LDX: case LDY: + case STX: case STY: + return true; + + default: + return false; + } + return false; + } + typedef void (* Generator)(AccessType, bool, const std::function&); using GeneratorKey = std::tuple; using PatternTable = std::map>; @@ -66,6 +84,7 @@ struct CPU::WDC65816::ProcessorStorageConstructor { storage_.instructions[opcode].program_offsets[0] = (access_mode == AccessMode::Always8Bit) ? uint16_t(micro_op_location_8) : uint16_t(micro_op_location_16); storage_.instructions[opcode].program_offsets[1] = (access_mode == AccessMode::Always16Bit) ? uint16_t(micro_op_location_16) : uint16_t(micro_op_location_8); storage_.instructions[opcode].operation = operation; + storage_.instructions[opcode].size_field = operation_is_index_sized(operation); ++opcode; } diff --git a/Processors/65816/Implementation/65816Storage.hpp b/Processors/65816/Implementation/65816Storage.hpp index 77a137672..b85578007 100644 --- a/Processors/65816/Implementation/65816Storage.hpp +++ b/Processors/65816/Implementation/65816Storage.hpp @@ -237,8 +237,9 @@ struct ProcessorStorage { uint16_t program_offsets[2] = {0xffff, 0xffff}; /// The operation to perform upon an OperationPerform. Operation operation = NOP; - /// An index into the mx field indicating which of M or X affects whether this is an 8-bit or 16-bit field. - /// So the program to perform is that at @c program_offsets[mx_flags[size_field]] + /// An index into the mx field indicating which of M or X affects whether this is an 8-bit or 16-bit field; + /// if this is 0 then this instruction picks its size based on the M flag; otherwise it does so based on X. + /// So the program to perform is that at @c program_offsets[mx_flags[size_field]] . uint8_t size_field = 0; }; Instruction instructions[256 + 3]; // Arranged as: