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Tweak per empirical results.
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@ -2576,22 +2576,26 @@ template <bool did_overflow> void ProcessorBase::did_divs(int32_t dividend, int3
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return;
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return;
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}
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}
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// It's either five or six microcycles to get into the main loop, depending
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// It's either six or seven microcycles to get into the main loop, depending
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// on dividend sign.
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// on dividend sign.
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dynamic_instruction_length_ = 5 + (dividend < 0);
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dynamic_instruction_length_ = 6 + (dividend < 0);
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if(did_overflow) {
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if(did_overflow) {
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return;
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return;
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}
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}
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// There's always a cost of four microcycles per bit, plus an additional
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// There's a fixed cost per bit, plus an additional one for each that is zero.
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// one for each that is non-zero.
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//
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//
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// The sign bit does not count here; it's the low fifteen bits that matter
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// The sign bit does not count here; it's the high fifteen bits that matter
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// only, in the unsigned version of the result.
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// only, in the unsigned version of the result.
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dynamic_instruction_length_ += 60;
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//
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// Disclaimer: per the flowchart it looks to me like this constant should be 60
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// rather than 49 — four microcycles per bit. But the number 49 makes this
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// algorithm exactly fit the stated minimum and maximum costs. Possibly the
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// undefined difference between a nop cycle an an idle wait is relevant here?
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dynamic_instruction_length_ += 49;
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int result_bits = abs(dividend / divisor) & 0x7fff;
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int result_bits = ~abs(dividend / divisor) & 0xfffe;
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convert_to_bit_count_16(result_bits);
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convert_to_bit_count_16(result_bits);
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dynamic_instruction_length_ += result_bits;
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dynamic_instruction_length_ += result_bits;
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