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Add a further category of exclusions.

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This commit is contained in:
Thomas Harte 2024-03-28 14:01:37 -04:00
parent 740b0e35d5
commit ea6b83815b
1 changed files with 6 additions and 0 deletions
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6
OSBindings/Mac/Clock SignalTests/ARMDecoderTests.mm
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@ -446,6 +446,12 @@ struct MemoryLedger {
}
break;
case Instruction::Operation::STR:
case Instruction::Operation::LDR:
// Neither loads nor stores with R15 are matched to ARM2 behaviour by the test source.
ignore_opcode = instruction.destination.value == 15;
break;
case Instruction::Operation::STM:
case Instruction::Operation::LDM:
// If the PC is involved, just skip the test; PC/PSR differences abound.