diff --git a/OSBindings/Mac/Clock Signal.xcodeproj/project.pbxproj b/OSBindings/Mac/Clock Signal.xcodeproj/project.pbxproj index fb227632f..f48e8ec52 100644 --- a/OSBindings/Mac/Clock Signal.xcodeproj/project.pbxproj +++ b/OSBindings/Mac/Clock Signal.xcodeproj/project.pbxproj @@ -844,6 +844,8 @@ 4BDB61EB2032806E0048AF91 /* CSAtari2600.mm in Sources */ = {isa = PBXBuildFile; fileRef = 4B2A539A1D117D36003C6002 /* CSAtari2600.mm */; }; 4BDB61EC203285AE0048AF91 /* Atari2600OptionsPanel.swift in Sources */ = {isa = PBXBuildFile; fileRef = 4B8FE21F1DA19D7C0090D3CE /* Atari2600OptionsPanel.swift */; }; 4BDDBA991EF3451200347E61 /* Z80MachineCycleTests.swift in Sources */ = {isa = PBXBuildFile; fileRef = 4BDDBA981EF3451200347E61 /* Z80MachineCycleTests.swift */; }; + 4BDDBBD7259D757800CEFF58 /* PowerPC.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4BDDBBD5259D757800CEFF58 /* PowerPC.cpp */; }; + 4BDDBBD8259D757800CEFF58 /* PowerPC.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4BDDBBD5259D757800CEFF58 /* PowerPC.cpp */; }; 4BE0A3EE237BB170002AB46F /* ST.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4BE0A3EC237BB170002AB46F /* ST.cpp */; }; 4BE0A3EF237BB170002AB46F /* ST.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4BE0A3EC237BB170002AB46F /* ST.cpp */; }; 4BE211DE253E4E4800435408 /* 65C02_no_Rockwell_test.bin in Resources */ = {isa = PBXBuildFile; fileRef = 4BE211DD253E4E4800435408 /* 65C02_no_Rockwell_test.bin */; }; @@ -1767,6 +1769,8 @@ 4BDB3D8522833321002D3CEE /* Keyboard.hpp */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.cpp.h; path = Keyboard.hpp; sourceTree = ""; }; 4BDCC5F81FB27A5E001220C5 /* ROMMachine.hpp */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.cpp.h; path = ROMMachine.hpp; sourceTree = ""; }; 4BDDBA981EF3451200347E61 /* Z80MachineCycleTests.swift */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.swift; path = Z80MachineCycleTests.swift; sourceTree = ""; }; + 4BDDBBD5259D757800CEFF58 /* PowerPC.cpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.cpp; path = PowerPC.cpp; sourceTree = ""; }; + 4BDDBBD6259D757800CEFF58 /* PowerPC.hpp */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.h; path = PowerPC.hpp; sourceTree = ""; }; 4BE0A3EC237BB170002AB46F /* ST.cpp */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.cpp.cpp; path = ST.cpp; sourceTree = ""; }; 4BE0A3ED237BB170002AB46F /* ST.hpp */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.cpp.h; path = ST.hpp; sourceTree = ""; }; 4BE211DD253E4E4800435408 /* 65C02_no_Rockwell_test.bin */ = {isa = PBXFileReference; lastKnownFileType = archive.macbinary; name = 65C02_no_Rockwell_test.bin; path = "Klaus Dormann/65C02_no_Rockwell_test.bin"; sourceTree = ""; }; @@ -3539,6 +3543,7 @@ 4B4DEC15252BFA9C004583AC /* 6502Esque */, 4BF8D4CC251C0C9C00BBE21B /* 65816 */, 4BFF1D332233778C00838EA1 /* 68000 */, + 4BDDBBD3259D757800CEFF58 /* Decoders */, 4B77069E1EC9045B0053B588 /* Z80 */, ); name = Processors; @@ -3881,6 +3886,23 @@ path = 5380; sourceTree = ""; }; + 4BDDBBD3259D757800CEFF58 /* Decoders */ = { + isa = PBXGroup; + children = ( + 4BDDBBD4259D757800CEFF58 /* PowerPC */, + ); + path = Decoders; + sourceTree = ""; + }; + 4BDDBBD4259D757800CEFF58 /* PowerPC */ = { + isa = PBXGroup; + children = ( + 4BDDBBD5259D757800CEFF58 /* PowerPC.cpp */, + 4BDDBBD6259D757800CEFF58 /* PowerPC.hpp */, + ); + path = PowerPC; + sourceTree = ""; + }; 4BE5F85A1C3E1C2500C43F01 /* Resources */ = { isa = PBXGroup; children = ( @@ -4607,6 +4629,7 @@ 4BD67DD1209BF27B00AB2146 /* Encoder.cpp in Sources */, 4B89451F201967B4007DE474 /* Tape.cpp in Sources */, 4B055AA81FAE85EF0060FFFF /* Shifter.cpp in Sources */, + 4BDDBBD8259D757800CEFF58 /* PowerPC.cpp in Sources */, 4B8318B422D3E546006DB630 /* DriveSpeedAccumulator.cpp in Sources */, 4B055AC81FAE9AFB0060FFFF /* C1540.cpp in Sources */, 4B055A8F1FAE85A90060FFFF /* FileHolder.cpp in Sources */, @@ -4749,6 +4772,7 @@ 4B45189F1F75FD1C00926311 /* AcornADF.cpp in Sources */, 4B7BA03023C2B19C00B98D9E /* Jasmin.cpp in Sources */, 4B7136911F789C93008B8ED9 /* SegmentParser.cpp in Sources */, + 4BDDBBD7259D757800CEFF58 /* PowerPC.cpp in Sources */, 4B4518A21F75FD1C00926311 /* G64.cpp in Sources */, 4B89452C201967B4007DE474 /* Tape.cpp in Sources */, 4B448E811F1C45A00009ABD6 /* TZX.cpp in Sources */, diff --git a/Processors/Decoders/PowerPC/PowerPC.cpp b/Processors/Decoders/PowerPC/PowerPC.cpp new file mode 100644 index 000000000..6e9b70f82 --- /dev/null +++ b/Processors/Decoders/PowerPC/PowerPC.cpp @@ -0,0 +1,174 @@ +// +// PowerPC.cpp +// Clock Signal +// +// Created by Thomas Harte on 12/30/20. +// Copyright © 2020 Thomas Harte. All rights reserved. +// + +#include "PowerPC.hpp" + +using namespace CPU::Decoder::PowerPC; + +Decoder::Decoder(Model model) : model_(model) {} + +Instruction Decoder::decode(uint32_t opcode) { + switch(opcode >> 26) { + case 31: + const uint8_t dest = (opcode >> 21) & 0x1f; + const uint8_t a = (opcode >> 16) & 0x1f; + const uint8_t b = (opcode >> 11) & 0x1f; + +#define OECase(x) case x: case 0x200 + x + switch((opcode >> 1) & 0x3ff) { + case 0: + // cmp; 601 10-26 + break; + case 4: + // tw; 601 10-214 + break; + OECase(8): + // subfcx; 601 10-207 + break; +// case 9: +// // mulhdux +// break; + OECase(10): + // addcx; 601 10-9 + break; + case 11: + // mulhwux; 601 10-142 + break; + case 19: + // mfcr; 601 10-122 + break; + case 20: + // lwarx + break; + case 21: + // ldx + break; + // lwzx + // slwx + // cntlzwx + // sldx + // andx + // ampl + // subfx + // ldux + // dcbst + // lwzux + // cntlzdx + // andcx + // td + // mulhx + // mulhwx + // mfmsr + // ldarx + // dcbf + // lbzx + // negx + // norx + // subfex + // adex + // mtcrf + // mtmsr + // stfx + // stwcx. + // stwx + // stdux + // stwux + // subfzex + // addzex + // mtsr + // stdcx. + // stbx + // subfmex + // mulld + // addmex + // mullwx + // mtsrin + // scbtst + // stbux + // addx + // dcbt + // lhzx + // eqvx + // tlbie + // eciwx + // lhzux + // xorx + // mfspr + // lwax + // lhax + // lbia + // mftb + // lwaux + // lhaux + // sthx + // orcx + // sradix + // slbie + // ecowx + // sthux + // orx + // divdux + // divwux + // mtspr + // dcbi + // nandx + // divdx + // divwx + // slbia + // mcrxr + // lswx + // lwbrx + // lfsx + // srwx + // srdx + // tlbsync + // lfsux + // mfsr + // lswi + // sync + // lfdx + // lfdux + // mfsrin + // stswx + // stwbrx + // stfsx + // stfsux + // stswi + // stfdx + // stfdux + // lhbrx + // srawx + // sradx + // srawix + // eieio + // ethbrx + // extshx + // extsbx + // lcbi + // stfiwx + // extsw + // dcbz + OECase(138): + // addex + break; + OECase(266): + // addx + break; + case 28: + // andx + break; + case 60: + // andcx + break; + } +#undef OECase + break; + } + + return Instruction(); +} diff --git a/Processors/Decoders/PowerPC/PowerPC.hpp b/Processors/Decoders/PowerPC/PowerPC.hpp new file mode 100644 index 000000000..80a709725 --- /dev/null +++ b/Processors/Decoders/PowerPC/PowerPC.hpp @@ -0,0 +1,86 @@ +// +// PowerPC.hpp +// Clock Signal +// +// Created by Thomas Harte on 12/30/20. +// Copyright © 2020 Thomas Harte. All rights reserved. +// + +#ifndef PowerPC_hpp +#define PowerPC_hpp + +#include + +namespace CPU { +namespace Decoder { +namespace PowerPC { + +enum class Model { + MPC601, +}; + +// TODO: complete the following table. +enum class Operation: uint8_t { + Undefined, + + // These 601-exclusive instructions; a lot of them are carry-overs + // from POWER. + absx, clcs, divx, divsx, dozx, dozi, lscbxx, maskgx, maskirx, mulx, + nabsx, rlmix, rribx, slex, sleqx, sliqx, slliqx, sllqx, slqx, + sraiqx, sraqx, srex, sreax, sreqx, sriqx, srliqx, srlqx, srqx, + + // 32- and 64-bit PowerPC instructions. + addx, addcx, addex, addi, addic, addic_, addis, addmex, addzex, andx, + andcx, andi_, andis_, bx, bcx, bcctrx, bclrx, cmp, cmpi, cmpl, cmpli, + cntlzwx, crand, crandc, creqv, crnand, crnor, cror, crorc, crxor, dcbf, + dcbst, dcbt, dcbtst, dcbz, divwx, divwux, eciwx, ecowx, eieio, eqvx, + extsbx, extshx, fabsx, faddx, faddsx, fcmpo, fcmpu, fctiwx, fctiwzx, + fdivx, fdivsx, fmaddx, fmaddsx, fmrx, fmsubx, fmsubsx, fmulx, fmulsx, + fnabsx, fnegx, fnmaddx, fnmaddsx, fnmsubx, fnmsubsx, frspx, fsubx, fsubsx, + icbi, isync, lbz, lbzu, lbzux, lbzx, lfd, lfdu, lfdux, lfdx, lfs, lfsu, + lfsux, lfsx, lha, lhau, lhaux, lhax, lhbrx, lhz, lhzu, lhzux, lhzx, lmw, + lswi, lswx, lwarx, lwbrx, lwz, lwzu, lwzux, lwzx, mcrf, mcrfs, mcrxr, + mfcr, mffsx, mfmsr, mfspr, mfsr, mfsrin, mtcrf, mtfsb0x, mtfsb1x, mtfsfx, + mtfsfix, mtmsr, mtspr, mtsr, mtsrin, mulhwx, mulhwux, mulli, mullwx, + nandx, negx, norx, orx, orcx, ori, oris, rfi, rlwimix, rlwinmx, rlwnmx, + sc, slwx, srawx, srawix, srwx, stb, stbu, stbux, stbx, stfd, stfdu, + stfdux, stfdx, stfs, stfsu, stfsux, stfsx, sth, sthbrx, sthu, sthux, sthx, + stmw, stswi, stswx, stw, stwbrx, stwcx_, stwu, stwux, stwx, subfx, subfcx, + subfex, subfic, subfmex, subfzex, sync, tlbie, tw, twi, xorx, xori, xoris, + + // 32-bit, supervisor level. + dcbi, + + // Optional. + fresx, frsqrtex, fselx, fsqrtx, frsqrtsx, slbia, slbie, + + // 64-bit only PowerPC instructions. + cntlzdx, divdx, divdux, extswx, fcfidx, fctidx, fctidzx +}; + +struct Instruction { + Operation operation = Operation::Undefined; + + // + + Instruction() {} + Instruction(Operation operation) : operation(operation) {} +}; + +struct Decoder { + public: + Decoder(Model model); + + Instruction decode(uint32_t opcode); + + private: + Model model_; +}; + +} +} +} + +#include + +#endif /* PowerPC_hpp */