From eeb6a088b8b4c8f1becc37b9f83d9d49d16cff7e Mon Sep 17 00:00:00 2001
From: Thomas Harte <thomas.harte@gmail.com>
Date: Thu, 19 May 2022 15:49:42 -0400
Subject: [PATCH] Add a tag to avoid duplication.

---
 .../InstructionOperandFlags.hpp               |  2 +-
 InstructionSets/M68k/Instruction.hpp          |  2 +-
 .../Implementation/68000Mk2Implementation.hpp | 45 +++++++------------
 3 files changed, 17 insertions(+), 32 deletions(-)

diff --git a/InstructionSets/M68k/Implementation/InstructionOperandFlags.hpp b/InstructionSets/M68k/Implementation/InstructionOperandFlags.hpp
index 2d42cafd0..da99031f5 100644
--- a/InstructionSets/M68k/Implementation/InstructionOperandFlags.hpp
+++ b/InstructionSets/M68k/Implementation/InstructionOperandFlags.hpp
@@ -12,7 +12,7 @@
 namespace InstructionSet {
 namespace M68k {
 
-template <Model model, Operation t_operation> uint8_t operand_flags(Operation r_operation) {
+template <Model model, Operation t_operation> constexpr uint8_t operand_flags(Operation r_operation) {
 	switch((t_operation != Operation::Undefined) ? t_operation : r_operation) {
 		default:
 			assert(false);
diff --git a/InstructionSets/M68k/Instruction.hpp b/InstructionSets/M68k/Instruction.hpp
index b9b8e99a2..314729f8d 100644
--- a/InstructionSets/M68k/Instruction.hpp
+++ b/InstructionSets/M68k/Instruction.hpp
@@ -166,7 +166,7 @@ static constexpr uint8_t StoreOp2	= (1 << 3);
 	Unusual bus sequences, such as TAS or MOVEM, are not described here.
 */
 template <Model model, Operation t_operation = Operation::Undefined>
-uint8_t operand_flags(Operation r_operation = Operation::Undefined);
+constexpr uint8_t operand_flags(Operation r_operation = Operation::Undefined);
 
 /// Lists the various condition codes used by the 680x0.
 enum class Condition {
diff --git a/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp b/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp
index 5a78924ba..519ba8cdd 100644
--- a/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp
+++ b/Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp
@@ -280,6 +280,15 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
 			MoveToState(FetchOperand_bw);	\
 		}
 
+#define Duplicate(x, y)	\
+	case InstructionSet::M68k::Operation::x:	\
+		static_assert(	\
+			InstructionSet::M68k::operand_flags<InstructionSet::M68k::Model::M68000, InstructionSet::M68k::Operation::x>() ==	\
+			InstructionSet::M68k::operand_flags<InstructionSet::M68k::Model::M68000, InstructionSet::M68k::Operation::y>() &&	\
+			InstructionSet::M68k::operand_size<InstructionSet::M68k::Operation::x>() == 										\
+			InstructionSet::M68k::operand_size<InstructionSet::M68k::Operation::y>()											\
+		);
+
 			switch(instruction_.operation) {
 				StdCASE(NBCD, {
 					if(instruction_.mode(0) == Mode::DataRegisterDirect) {
@@ -304,27 +313,9 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
 				StdCASE(CMPAw,		perform_state_ = Perform_np_n);
 				StdCASE(CMPAl,		perform_state_ = Perform_np_n);
 
-				StdCASE(ANDb,		perform_state_ = Perform_np);
-				StdCASE(ANDw,		perform_state_ = Perform_np);
-				StdCASE(ANDl, {
-					if(instruction_.mode(1) == Mode::DataRegisterDirect) {
-						switch(instruction_.mode(0)) {
-							default:
-								perform_state_ = Perform_np_n;
-							break;
-							case Mode::DataRegisterDirect:
-							case Mode::ImmediateData:
-								perform_state_ = Perform_np_nn;
-							break;
-						}
-					} else {
-						perform_state_ = Perform_np;
-					}
-				});
-
-				StdCASE(ORb,		perform_state_ = Perform_np);
-				StdCASE(ORw,		perform_state_ = Perform_np);
-				StdCASE(ORl, {
+				Duplicate(ANDb, ORb)	StdCASE(ORb,		perform_state_ = Perform_np);
+				Duplicate(ANDw, ORw)	StdCASE(ORw,		perform_state_ = Perform_np);
+				Duplicate(ANDl, ORl)	StdCASE(ORl, {
 					if(instruction_.mode(1) == Mode::DataRegisterDirect) {
 						switch(instruction_.mode(0)) {
 							default:
@@ -350,15 +341,7 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
 					}
 				})
 
-				CASE(SBCD)
-					if(instruction_.mode(0) == Mode::DataRegisterDirect) {
-						perform_state_ = Perform_np_n;
-						SetupDataAccess(Microcycle::Read, Microcycle::SelectByte);
-						MoveToState(FetchOperand_bw);
-					} else {
-						MoveToState(SABCD_PreDec);
-					}
-
+				Duplicate(SBCD, ABCD)
 				CASE(ABCD)
 					if(instruction_.mode(0) == Mode::DataRegisterDirect) {
 						perform_state_ = Perform_np_n;
@@ -372,6 +355,8 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
 					assert(false);
 			}
 
+#undef Duplicate
+#undef StdCASE
 #undef CASE
 
 	// MARK: - Fetch, dispatch.