mirror of
https://github.com/TomHarte/CLK.git
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Provide a direct to_string on Operation.
This commit is contained in:
Thomas Harte
parent
cee3f78059
commit
effe8c102d
@ -56,233 +56,209 @@ std::string Preinstruction::operand_description(int index, int opcode) const {
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}
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}
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std::string Preinstruction::to_string(int opcode) const {
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bool flip_operands = false;
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const char *instruction;
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namespace {
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const char *_to_string(Operation operation, bool is_quick) {
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switch(operation) {
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case Operation::Undefined: return "None";
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case Operation::NOP: instruction = "NOP"; break;
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case Operation::ABCD: instruction = "ABCD"; break;
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case Operation::SBCD: instruction = "SBCD"; break;
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case Operation::NBCD: instruction = "NBCD"; break;
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case Operation::Undefined: return "None";
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case Operation::NOP: return "NOP";
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case Operation::ABCD: return "ABCD";
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case Operation::SBCD: return "SBCD";
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case Operation::NBCD: return "NBCD";
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case Operation::ADDb: instruction = "ADD.b"; break;
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case Operation::ADDw: instruction = "ADD.w"; break;
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case Operation::ADDl: instruction = "ADD.l"; break;
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case Operation::ADDb: return "ADD.b";
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case Operation::ADDw: return "ADD.w";
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case Operation::ADDl: return "ADD.l";
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case Operation::ADDAw:
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if(mode<0>() == AddressingMode::Quick) {
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instruction = "ADD.w";
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} else {
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instruction = "ADDA.w";
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}
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break;
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case Operation::ADDAl:
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if(mode<0>() == AddressingMode::Quick) {
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instruction = "ADD.l";
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} else {
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instruction = "ADDA.l";
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}
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break;
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case Operation::ADDAw: return is_quick ? "ADD.w" : "ADDA.w";
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case Operation::ADDAl: return is_quick ? "ADD.l" : "ADDA.l";
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case Operation::ADDXb: instruction = "ADDX.b"; break;
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case Operation::ADDXw: instruction = "ADDX.w"; break;
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case Operation::ADDXl: instruction = "ADDX.l"; break;
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case Operation::ADDXb: return "ADDX.b";
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case Operation::ADDXw: return "ADDX.w";
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case Operation::ADDXl: return "ADDX.l";
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case Operation::SUBb: instruction = "SUB.b"; break;
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case Operation::SUBw: instruction = "SUB.w"; break;
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case Operation::SUBl: instruction = "SUB.l"; break;
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case Operation::SUBb: return "SUB.b";
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case Operation::SUBw: return "SUB.w";
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case Operation::SUBl: return "SUB.l";
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case Operation::SUBAw:
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if(mode<0>() == AddressingMode::Quick) {
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instruction = "SUB.w";
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} else {
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instruction = "SUBA.w";
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}
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break;
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case Operation::SUBAl:
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if(mode<0>() == AddressingMode::Quick) {
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instruction = "SUB.l";
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} else {
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instruction = "SUBA.l";
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}
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break;
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case Operation::SUBAw: return is_quick ? "SUB.w" : "SUBA.w";
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case Operation::SUBAl: return is_quick ? "SUB.l" : "SUBA.l";
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case Operation::SUBXb: instruction = "SUBX.b"; break;
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case Operation::SUBXw: instruction = "SUBX.w"; break;
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case Operation::SUBXl: instruction = "SUBX.l"; break;
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case Operation::SUBXb: return "SUBX.b";
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case Operation::SUBXw: return "SUBX.w";
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case Operation::SUBXl: return "SUBX.l";
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case Operation::MOVEb: instruction = "MOVE.b"; break;
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case Operation::MOVEw: instruction = "MOVE.w"; break;
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case Operation::MOVEl:
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if(mode<0>() == AddressingMode::Quick) {
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instruction = "MOVE.q";
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} else {
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instruction = "MOVE.l";
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}
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break;
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case Operation::MOVEb: return "MOVE.b";
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case Operation::MOVEw: return "MOVE.w";
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case Operation::MOVEl: return is_quick ? "MOVE.q" : "MOVE.l";
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case Operation::MOVEAw: instruction = "MOVEA.w"; break;
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case Operation::MOVEAl: instruction = "MOVEA.l"; break;
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case Operation::MOVEAw: return "MOVEA.w";
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case Operation::MOVEAl: return "MOVEA.l";
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case Operation::LEA: instruction = "LEA"; break;
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case Operation::PEA: instruction = "PEA"; break;
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case Operation::LEA: return "LEA";
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case Operation::PEA: return "PEA";
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case Operation::MOVEtoSR: instruction = "MOVEtoSR"; break;
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case Operation::MOVEfromSR: instruction = "MOVEfromSR"; break;
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case Operation::MOVEtoCCR: instruction = "MOVEtoCCR"; break;
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case Operation::MOVEtoUSP: instruction = "MOVEtoUSP"; break;
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case Operation::MOVEfromUSP: instruction = "MOVEfromUSP"; break;
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case Operation::MOVEtoSR: return "MOVEtoSR";
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case Operation::MOVEfromSR: return "MOVEfromSR";
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case Operation::MOVEtoCCR: return "MOVEtoCCR";
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case Operation::MOVEtoUSP: return "MOVEtoUSP";
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case Operation::MOVEfromUSP: return "MOVEfromUSP";
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case Operation::ORItoSR: instruction = "ORItoSR"; break;
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case Operation::ORItoCCR: instruction = "ORItoCCR"; break;
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case Operation::ANDItoSR: instruction = "ANDItoSR"; break;
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case Operation::ANDItoCCR: instruction = "ANDItoCCR"; break;
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case Operation::EORItoSR: instruction = "EORItoSR"; break;
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case Operation::EORItoCCR: instruction = "EORItoCCR"; break;
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case Operation::ORItoSR: return "ORItoSR";
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case Operation::ORItoCCR: return "ORItoCCR";
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case Operation::ANDItoSR: return "ANDItoSR";
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case Operation::ANDItoCCR: return "ANDItoCCR";
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case Operation::EORItoSR: return "EORItoSR";
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case Operation::EORItoCCR: return "EORItoCCR";
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case Operation::BTST: instruction = "BTST"; break;
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case Operation::BCLR: instruction = "BCLR"; break;
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case Operation::BCHG: instruction = "BCHG"; break;
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case Operation::BSET: instruction = "BSET"; break;
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case Operation::BTST: return "BTST";
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case Operation::BCLR: return "BCLR";
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case Operation::BCHG: return "BCHG";
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case Operation::BSET: return "BSET";
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case Operation::CMPb: instruction = "CMP.b"; break;
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case Operation::CMPw: instruction = "CMP.w"; break;
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case Operation::CMPl: instruction = "CMP.l"; break;
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case Operation::CMPb: return "CMP.b";
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case Operation::CMPw: return "CMP.w";
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case Operation::CMPl: return "CMP.l";
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case Operation::CMPAw: instruction = "CMPA.w"; break;
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case Operation::CMPAl: instruction = "CMPA.l"; break;
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case Operation::CMPAw: return "CMPA.w";
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case Operation::CMPAl: return "CMPA.l";
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case Operation::TSTb: instruction = "TST.b"; break;
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case Operation::TSTw: instruction = "TST.w"; break;
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case Operation::TSTl: instruction = "TST.l"; break;
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case Operation::TSTb: return "TST.b";
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case Operation::TSTw: return "TST.w";
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case Operation::TSTl: return "TST.l";
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case Operation::JMP: instruction = "JMP"; break;
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case Operation::JSR: instruction = "JSR"; break;
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case Operation::RTS: instruction = "RTS"; break;
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case Operation::DBcc: instruction = "DBcc"; break;
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case Operation::Scc: instruction = "Scc"; break;
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case Operation::JMP: return "JMP";
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case Operation::JSR: return "JSR";
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case Operation::RTS: return "RTS";
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case Operation::DBcc: return "DBcc";
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case Operation::Scc: return "Scc";
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case Operation::Bccb:
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case Operation::Bccl:
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case Operation::Bccw: instruction = "Bcc"; break;
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case Operation::Bccw: return "Bcc";
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case Operation::BSRb:
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case Operation::BSRl:
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case Operation::BSRw: instruction = "BSR"; break;
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case Operation::BSRw: return "BSR";
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case Operation::CLRb: instruction = "CLR.b"; break;
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case Operation::CLRw: instruction = "CLR.w"; break;
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case Operation::CLRl: instruction = "CLR.l"; break;
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case Operation::CLRb: return "CLR.b";
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case Operation::CLRw: return "CLR.w";
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case Operation::CLRl: return "CLR.l";
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case Operation::NEGXb: instruction = "NEGX.b"; break;
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case Operation::NEGXw: instruction = "NEGX.w"; break;
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case Operation::NEGXl: instruction = "NEGX.l"; break;
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case Operation::NEGXb: return "NEGX.b";
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case Operation::NEGXw: return "NEGX.w";
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case Operation::NEGXl: return "NEGX.l";
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case Operation::NEGb: instruction = "NEG.b"; break;
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case Operation::NEGw: instruction = "NEG.w"; break;
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case Operation::NEGl: instruction = "NEG.l"; break;
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case Operation::NEGb: return "NEG.b";
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case Operation::NEGw: return "NEG.w";
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case Operation::NEGl: return "NEG.l";
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case Operation::ASLb: instruction = "ASL.b"; break;
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case Operation::ASLw: instruction = "ASL.w"; break;
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case Operation::ASLl: instruction = "ASL.l"; break;
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case Operation::ASLm: instruction = "ASL.w"; break;
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case Operation::ASLb: return "ASL.b";
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case Operation::ASLw: return "ASL.w";
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case Operation::ASLl: return "ASL.l";
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case Operation::ASLm: return "ASL.w";
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case Operation::ASRb: instruction = "ASR.b"; break;
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case Operation::ASRw: instruction = "ASR.w"; break;
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case Operation::ASRl: instruction = "ASR.l"; break;
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case Operation::ASRm: instruction = "ASR.w"; break;
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case Operation::ASRb: return "ASR.b";
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case Operation::ASRw: return "ASR.w";
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case Operation::ASRl: return "ASR.l";
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case Operation::ASRm: return "ASR.w";
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case Operation::LSLb: instruction = "LSL.b"; break;
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case Operation::LSLw: instruction = "LSL.w"; break;
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case Operation::LSLl: instruction = "LSL.l"; break;
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case Operation::LSLm: instruction = "LSL.w"; break;
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case Operation::LSLb: return "LSL.b";
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case Operation::LSLw: return "LSL.w";
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case Operation::LSLl: return "LSL.l";
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case Operation::LSLm: return "LSL.w";
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case Operation::LSRb: instruction = "LSR.b"; break;
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case Operation::LSRw: instruction = "LSR.w"; break;
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case Operation::LSRl: instruction = "LSR.l"; break;
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case Operation::LSRm: instruction = "LSR.w"; break;
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case Operation::LSRb: return "LSR.b";
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case Operation::LSRw: return "LSR.w";
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case Operation::LSRl: return "LSR.l";
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case Operation::LSRm: return "LSR.w";
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case Operation::ROLb: instruction = "ROL.b"; break;
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case Operation::ROLw: instruction = "ROL.w"; break;
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case Operation::ROLl: instruction = "ROL.l"; break;
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case Operation::ROLm: instruction = "ROL.w"; break;
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case Operation::ROLb: return "ROL.b";
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case Operation::ROLw: return "ROL.w";
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case Operation::ROLl: return "ROL.l";
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case Operation::ROLm: return "ROL.w";
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case Operation::RORb: instruction = "ROR.b"; break;
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case Operation::RORw: instruction = "ROR.w"; break;
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case Operation::RORl: instruction = "ROR.l"; break;
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case Operation::RORm: instruction = "ROR.w"; break;
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case Operation::RORb: return "ROR.b";
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case Operation::RORw: return "ROR.w";
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case Operation::RORl: return "ROR.l";
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case Operation::RORm: return "ROR.w";
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case Operation::ROXLb: instruction = "ROXL.b"; break;
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case Operation::ROXLw: instruction = "ROXL.w"; break;
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case Operation::ROXLl: instruction = "ROXL.l"; break;
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case Operation::ROXLm: instruction = "ROXL.w"; break;
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case Operation::ROXLb: return "ROXL.b";
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case Operation::ROXLw: return "ROXL.w";
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case Operation::ROXLl: return "ROXL.l";
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case Operation::ROXLm: return "ROXL.w";
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case Operation::ROXRb: instruction = "ROXR.b"; break;
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case Operation::ROXRw: instruction = "ROXR.w"; break;
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case Operation::ROXRl: instruction = "ROXR.l"; break;
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case Operation::ROXRm: instruction = "ROXR.w"; break;
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case Operation::ROXRb: return "ROXR.b";
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case Operation::ROXRw: return "ROXR.w";
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case Operation::ROXRl: return "ROXR.l";
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case Operation::ROXRm: return "ROXR.w";
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case Operation::MOVEMtoMl: instruction = "MOVEM.l"; break;
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case Operation::MOVEMtoMw: instruction = "MOVEM.w"; break;
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case Operation::MOVEMtoRl:
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instruction = "MOVEM.l";
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flip_operands = true;
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break;
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case Operation::MOVEMtoRw:
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instruction = "MOVEM.w";
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flip_operands = true;
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break;
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case Operation::MOVEMtoMl: return "MOVEM.l";
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case Operation::MOVEMtoMw: return "MOVEM.w";
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case Operation::MOVEMtoRl: return "MOVEM.l";
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case Operation::MOVEMtoRw: return "MOVEM.w";
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case Operation::MOVEPl: instruction = "MOVEP.l"; break;
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case Operation::MOVEPw: instruction = "MOVEP.w"; break;
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case Operation::MOVEPl: return "MOVEP.l";
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case Operation::MOVEPw: return "MOVEP.w";
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case Operation::ANDb: instruction = "AND.b"; break;
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case Operation::ANDw: instruction = "AND.w"; break;
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case Operation::ANDl: instruction = "AND.l"; break;
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case Operation::ANDb: return "AND.b";
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case Operation::ANDw: return "AND.w";
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case Operation::ANDl: return "AND.l";
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case Operation::EORb: instruction = "EOR.b"; break;
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case Operation::EORw: instruction = "EOR.w"; break;
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case Operation::EORl: instruction = "EOR.l"; break;
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case Operation::EORb: return "EOR.b";
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case Operation::EORw: return "EOR.w";
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case Operation::EORl: return "EOR.l";
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case Operation::NOTb: instruction = "NOT.b"; break;
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case Operation::NOTw: instruction = "NOT.w"; break;
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case Operation::NOTl: instruction = "NOT.l"; break;
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case Operation::NOTb: return "NOT.b";
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case Operation::NOTw: return "NOT.w";
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case Operation::NOTl: return "NOT.l";
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case Operation::ORb: instruction = "OR.b"; break;
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case Operation::ORw: instruction = "OR.w"; break;
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case Operation::ORl: instruction = "OR.l"; break;
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case Operation::ORb: return "OR.b";
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case Operation::ORw: return "OR.w";
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case Operation::ORl: return "OR.l";
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case Operation::MULU: instruction = "MULU"; break;
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case Operation::MULS: instruction = "MULS"; break;
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case Operation::DIVU: instruction = "DIVU"; break;
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case Operation::DIVS: instruction = "DIVS"; break;
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case Operation::MULU: return "MULU";
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case Operation::MULS: return "MULS";
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case Operation::DIVU: return "DIVU";
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case Operation::DIVS: return "DIVS";
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case Operation::RTE: instruction = "RTE"; break;
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case Operation::RTR: instruction = "RTR"; break;
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case Operation::RTE: return "RTE";
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case Operation::RTR: return "RTR";
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case Operation::TRAP: instruction = "TRAP"; break;
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case Operation::TRAPV: instruction = "TRAPV"; break;
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case Operation::CHK: instruction = "CHK"; break;
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case Operation::TRAP: return "TRAP";
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case Operation::TRAPV: return "TRAPV";
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case Operation::CHK: return "CHK";
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case Operation::EXG: instruction = "EXG"; break;
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case Operation::SWAP: instruction = "SWAP"; break;
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case Operation::EXG: return "EXG";
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case Operation::SWAP: return "SWAP";
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case Operation::TAS: instruction = "TAS"; break;
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case Operation::TAS: return "TAS";
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case Operation::EXTbtow: instruction = "EXT.w"; break;
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case Operation::EXTwtol: instruction = "EXT.l"; break;
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case Operation::EXTbtow: return "EXT.w";
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case Operation::EXTwtol: return "EXT.l";
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case Operation::LINKw: instruction = "LINK"; break;
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case Operation::UNLINK: instruction = "UNLINK"; break;
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case Operation::LINKw: return "LINK";
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case Operation::UNLINK: return "UNLINK";
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case Operation::STOP: instruction = "STOP"; break;
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case Operation::RESET: instruction = "RESET"; break;
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case Operation::STOP: return "STOP";
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case Operation::RESET: return "RESET";
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default:
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assert(false);
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}
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}
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}
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const char *InstructionSet::M68k::to_string(Operation operation) {
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return _to_string(operation, false);
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}
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std::string Preinstruction::to_string(int opcode) const {
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if(operation == Operation::Undefined) return "None";
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const char *const instruction = _to_string(operation, mode<0>() == AddressingMode::Quick);
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const bool flip_operands = (operation == Operation::MOVEMtoRl) || (operation == Operation::MOVEMtoRw);
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const std::string operand1 = operand_description(0 ^ int(flip_operands), opcode);
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const std::string operand2 = operand_description(1 ^ int(flip_operands), opcode);
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@ -104,6 +104,8 @@ enum class Operation: uint8_t {
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Max = RESET
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};
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const char *to_string(Operation op);
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template <Model model>
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constexpr bool requires_supervisor(Operation op) {
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switch(op) {
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