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https://github.com/TomHarte/CLK.git
synced 2025-04-05 04:37:41 +00:00
Moves temporary logging, fixes branch instructions.
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@ -44,7 +44,7 @@ class KlausDormannTests: XCTestCase {
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switch address {
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case 0x3399: return nil // success!
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case 0x052a: return "TAX, DEX or LDA did not correctly set flags"
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case 0x052a: return "TAX, DEX or LDA did not correctly set flags, or BEQ did not branch correctly"
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case 0x33a7: return "Decimal ADC result has wrong value"
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case 0x3502: return "Binary SBC result has wrong value"
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case 0x33b9: return "Decimal SBC result has wrong value"
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@ -28,6 +28,12 @@ template <Type type> class ConcreteAllRAMProcessor: public AllRAMProcessor, publ
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timestamp_ += Cycles(1);
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if(operation == BusOperation::ReadOpcode) {
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// TEMPORARY LOGGING. TODO: remove.
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printf("[%04x] %02x a:%04x x:%04x y:%04x p:%02x\n", address, memory_[address],
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mos6502_.get_value_of_register(Register::A),
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mos6502_.get_value_of_register(Register::X),
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mos6502_.get_value_of_register(Register::Y),
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mos6502_.get_value_of_register(Register::Flags));
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check_address_for_trap(address);
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}
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@ -15,7 +15,7 @@ uint16_t ProcessorBase::get_value_of_register(Register r) const {
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case Register::ProgramCounter: return pc_;
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case Register::LastOperationAddress: return last_operation_pc_;
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case Register::StackPointer: return s_.full;
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// case Register::Flags: return get_flags();
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case Register::Flags: return flags_.get(); // TODO: include additional flags (and below).
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case Register::A: return a_.full;
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case Register::X: return x_.full;
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case Register::Y: return y_.full;
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@ -25,12 +25,12 @@ uint16_t ProcessorBase::get_value_of_register(Register r) const {
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void ProcessorBase::set_value_of_register(Register r, uint16_t value) {
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switch (r) {
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case Register::ProgramCounter: pc_ = value; break;
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case Register::StackPointer: s_.full = value; break;
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// case Register::Flags: set_flags(uint8_t(value)); break;
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case Register::A: a_.full = value; break;
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case Register::X: x_.full = value; break;
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case Register::Y: y_.full = value; break;
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case Register::ProgramCounter: pc_ = value; break;
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case Register::StackPointer: s_.full = value; break;
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case Register::Flags: flags_.set(uint8_t(value)); break;
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case Register::A: a_.full = value; break;
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case Register::X: x_.full = value; break;
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case Register::Y: y_.full = value; break;
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default: break;
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}
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}
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@ -50,8 +50,6 @@ template <typename BusHandler> void Processor<BusHandler>::run_for(const Cycles
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} continue;
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case OperationDecode: {
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// A VERY TEMPORARY piece of logging.
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printf("[%04x] %02x a:%04x x:%04x y:%04x p:%02x\n", pc_ - 1, instruction_buffer_.value, a_.full, x_.full, y_.full, flags_.get()); // pc_ - 1 would be correct but this matches a log I made of the 6502.
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active_instruction_ = &instructions[instruction_buffer_.value];
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const auto size_flag = mx_flags_[active_instruction_->size_field];
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@ -539,11 +537,11 @@ template <typename BusHandler> void Processor<BusHandler>::run_for(const Cycles
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next_op_ += 3; \
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} else { \
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data_buffer_.size = 2; \
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data_buffer_.value = pc_ + int8_t(data_buffer_.value); \
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\
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if((pc_ & 0xff00) == (data_buffer_.value & 0xff00)) { \
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++next_op_; \
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} \
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data_buffer_.value = pc_ + int8_t(instruction_buffer_.value); \
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\
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if((pc_ & 0xff00) == (instruction_buffer_.value & 0xff00)) { \
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++next_op_; \
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} \
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}
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case BPL: BRA(!(flags_.negative_result&0x80)); break;
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