From f7de6f790cac6a906d0c43db24d765c0a657ef46 Mon Sep 17 00:00:00 2001
From: Thomas Harte <thomas.harte@gmail.com>
Date: Fri, 16 Jul 2021 21:41:32 -0400
Subject: [PATCH] Meanders vaguely towards a memory map.

---
 Machines/Amiga/Amiga.cpp | 40 ++++++++++++++++++++++++++++++++++------
 1 file changed, 34 insertions(+), 6 deletions(-)

diff --git a/Machines/Amiga/Amiga.cpp b/Machines/Amiga/Amiga.cpp
index 1e6deb65b..3c5132306 100644
--- a/Machines/Amiga/Amiga.cpp
+++ b/Machines/Amiga/Amiga.cpp
@@ -29,7 +29,6 @@ class ConcreteMachine:
 			mc68000_(*this)
 		{
 			(void)target;
-			(void)rom_fetcher;
 
 			// Temporary: use a hard-coded Kickstart selection.
 			constexpr ROM::Name rom_name = ROM::Name::AmigaA500Kickstart13;
@@ -38,7 +37,7 @@ class ConcreteMachine:
 			if(!request.validate(roms)) {
 				throw ROMMachine::Error::MissingROMs;
 			}
-			Memory::PackBigEndian16(roms.find(rom_name)->second, kickstart_);
+			Memory::PackBigEndian16(roms.find(rom_name)->second, kickstart_.data());
 
 			// NTSC clock rate: 2*3.579545 = 7.15909Mhz.
 			// PAL clock rate: 7.09379Mhz.
@@ -47,16 +46,45 @@ class ConcreteMachine:
 
 		// MARK: - MC68000::BusHandler.
 		using Microcycle = CPU::MC68000::Microcycle;
-		HalfCycles perform_bus_operation(const CPU::MC68000::Microcycle &cycle, int is_supervisor) {
-			(void)cycle;
-			(void)is_supervisor;
+		HalfCycles perform_bus_operation(const CPU::MC68000::Microcycle &cycle, int) {
+			// Do nothing if no address is exposed.
+			if(!(cycle.operation & (Microcycle::NewAddress | Microcycle::SameAddress))) return HalfCycles(0);
+
+			// TODO: interrupt acknowledgement though?
+
+			// Grab the target address to pick a memory source.
+			const uint32_t address = cycle.host_endian_byte_address();
+			(void)address;
+
+			// Address spaces that matter:
+			//
+			//	00'0000 – 08'0000:	chip RAM.	[or overlayed KickStart]
+			//	– 10'0000: extended chip ram for ECS.
+			//	– 20'0000: auto-config space (/fast RAM).
+			//	...
+			//	bf'd000 – c0'0000: 8250s.
+			//	c0'0000 – d8'0000: pseudo-fast RAM.
+			//	...
+			//	dc'0000 – dd'0000: optional real-time clock.
+			//	df'f000 - e0'0000: custom chip registers.
+			//	...
+			//	f0'0000 — : 512kb Kickstart (or possibly just an extra 512kb reserved for hypothetical 1mb Kickstart?).
+			//	f8'0000 — : 256kb Kickstart if 2.04 or higher.
+			//	fc'0000 – : 256kb Kickstart otherwise.
 
 			return HalfCycles(0);
 		}
 
 	private:
 		CPU::MC68000::Processor<ConcreteMachine, true> mc68000_;
-		std::vector<uint8_t> kickstart_;
+
+		// MARK: - Memory map.
+		std::array<uint8_t, 512*1024> ram_;
+		std::array<uint8_t, 512*1024> kickstart_;
+
+		struct MemoryRegion {
+
+		} regions_[64];	// i.e. top six bits are used as an index.
 
 		// MARK: - MachineTypes::ScanProducer.