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Switch to common bit-selection logic.

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This commit is contained in:
Thomas Harte
2022-05-13 15:08:15 -04:00
parent 77b56c50e6
commit f83954f5b7
1 changed files with 21 additions and 14 deletions
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35
InstructionSets/M68k/Implementation/PerformImplementation.hpp
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@@ -212,36 +212,43 @@ template <
dest.l -= src.l; dest.l -= src.l;
break; break;
#define get_mask() \
const uint32_t mask_size = (instruction.mode<1>() == AddressingMode::DataRegisterDirect) ? 31 : 7; \
const uint32_t bit_position = src.l & mask_size; \
const uint32_t bit_mask = 1 << bit_position
// BTST/BCLR/etc: modulo for the mask depends on whether memory or a data register is the target. // BTST/BCLR/etc: modulo for the mask depends on whether memory or a data register is the target.
case Operation::BTST: { case Operation::BTST: {
const uint32_t mask = (instruction.mode<1>() == AddressingMode::DataRegisterDirect) ? 31 : 7; get_mask();
status.zero_result = dest.l & (1 << (src.l & mask)); status.zero_result = dest.l & bit_mask;
} break; } break;
case Operation::BCLR: { case Operation::BCLR: {
const uint32_t mask = (instruction.mode<1>() == AddressingMode::DataRegisterDirect) ? 31 : 7; get_mask();
status.zero_result = dest.l & (1 << (src.l & mask)); status.zero_result = dest.l & bit_mask;
dest.l &= ~(1 << (src.l & mask)); dest.l &= ~bit_mask;
flow_controller.did_bit_op(src.l & mask); flow_controller.did_bit_op(bit_position);
} break; } break;
case Operation::BCHG: { case Operation::BCHG: {
const uint32_t mask = (instruction.mode<1>() == AddressingMode::DataRegisterDirect) ? 31 : 7; get_mask();
status.zero_result = dest.l & (1 << (src.l & mask)); status.zero_result = dest.l & bit_mask;
dest.l ^= 1 << (src.l & mask); dest.l ^= bit_mask;
flow_controller.did_bit_op(src.l & mask); flow_controller.did_bit_op(bit_position);
} break; } break;
case Operation::BSET: { case Operation::BSET: {
const uint32_t mask = (instruction.mode<1>() == AddressingMode::DataRegisterDirect) ? 31 : 7; get_mask();
status.zero_result = dest.l & (1 << (src.l & mask)); status.zero_result = dest.l & bit_mask;
dest.l |= 1 << (src.l & mask); dest.l |= bit_mask;
flow_controller.did_bit_op(src.l & mask); flow_controller.did_bit_op(bit_position);
} break; } break;
#undef get_mask
case Operation::Bccb: case Operation::Bccb:
flow_controller.template complete_bcc<int8_t>( flow_controller.template complete_bcc<int8_t>(
status.evaluate_condition(instruction.condition()), status.evaluate_condition(instruction.condition()),