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Introduces first DIVS test, and associated fixes.
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@ -58,6 +58,7 @@ class RAM68000: public CPU::MC68000::BusHandler {
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HalfCycles perform_bus_operation(const CPU::MC68000::Microcycle &cycle, int is_supervisor) {
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const uint32_t word_address = cycle.word_address();
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duration_ += cycle.length;
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using Microcycle = CPU::MC68000::Microcycle;
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if(cycle.data_select_active()) {
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@ -101,10 +102,15 @@ class RAM68000: public CPU::MC68000::BusHandler {
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return m68000_;
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}
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int get_cycle_count() {
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return 0;
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}
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private:
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CPU::MC68000::Processor<RAM68000, true, true> m68000_;
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std::vector<uint16_t> ram_;
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int instructions_remaining_;
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HalfCycles duration_;
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};
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class CPU::MC68000::ProcessorStorageTests {
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@ -1038,7 +1044,26 @@ class CPU::MC68000::ProcessorStorageTests {
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[self performDBccTestOpcode:0x5fca status:Flag::Negative | Flag::Overflow d2Outcome:0];
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}
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/* Further DBF tests omitted. */
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/* Further DBF tests omitted; they seemed to be duplicative, assuming I'm not suffering a failure of comprehension. */
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// MARK: DIVS
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- (void)testDIVSOverflow {
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_machine->set_program({
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0x83fc, 0x0001 // DIVS #1, D1
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});
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auto state = _machine->get_processor_state();
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state.data[1] = 0x4768f231;
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state.status = Flag::ConditionCodes;
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_machine->set_processor_state(state);
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_machine->run_for_instructions(2);
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state = _machine->get_processor_state();
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XCTAssertEqual(state.data[1], 0x4768f231);
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XCTAssertEqual(state.status & Flag::ConditionCodes, Flag::Extend | Flag::Negative | Flag::Overflow);
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// Test: 20 cycles passed.
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}
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// MARK: MOVE USP
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@ -1022,16 +1022,21 @@ template <class T, bool dtack_is_implicit, bool signal_will_perform> void Proces
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cycles_expended += 2; // An additional microycle applies if the dividend is negative.
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}
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carry_flag_ = 0;
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// These are officially undefined for results that overflow, so the below is a guess.
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zero_result_ = decltype(zero_result_)(quotient & 0xffff);
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negative_flag_ = zero_result_ & 0x8000;
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// Check for overflow. If it exists, work here is already done.
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if(quotient > 32767 || quotient < -32768) {
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overflow_flag_ = 1;
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active_step_->microcycle.length = HalfCycles(3*2*2);
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break;
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}
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overflow_flag_ = 0;
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zero_result_ = decltype(zero_result_)(quotient);
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negative_flag_ = zero_result_ & 0x8000;
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// TODO: check sign rules here; am I necessarily giving the remainder the correct sign?
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// (and, if not, am I counting it in the correct direction?)
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