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Corrects MOVE.l Dn, (An)[+].
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@ -26,8 +26,7 @@
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buildConfiguration = "Debug"
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selectedDebuggerIdentifier = "Xcode.DebuggerFoundation.Debugger.LLDB"
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selectedLauncherIdentifier = "Xcode.DebuggerFoundation.Launcher.LLDB"
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enableAddressSanitizer = "YES"
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enableUBSanitizer = "YES"
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disableMainThreadChecker = "YES"
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codeCoverageEnabled = "YES"
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shouldUseLaunchSchemeArgsEnv = "YES">
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<Testables>
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@ -71,17 +71,21 @@ class QL: public CPU::MC68000::BusHandler {
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default: break;
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case Microcycle::SelectWord | Microcycle::Read:
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// printf("[word r %08x] ", *cycle.address);
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cycle.value->full = is_peripheral ? peripheral_result : base[word_address];
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break;
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case Microcycle::SelectByte | Microcycle::Read:
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// printf("[byte r %08x] ", *cycle.address);
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cycle.value->halves.low = (is_peripheral ? peripheral_result : base[word_address]) >> cycle.byte_shift();
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break;
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case Microcycle::SelectWord:
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assert(!(is_rom && !is_peripheral));
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// printf("[word w %08x <- %04x] ", *cycle.address, cycle.value->full);
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base[word_address] = cycle.value->full;
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break;
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case Microcycle::SelectByte:
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assert(!(is_rom && !is_peripheral));
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// printf("[byte w %08x <- %02x] ", *cycle.address, (cycle.value->full >> cycle.byte_shift()) & 0xff);
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base[word_address] = (cycle.value->full & cycle.byte_mask()) | (base[word_address] & (0xffff ^ cycle.byte_mask()));
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break;
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}
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@ -1749,7 +1749,7 @@ struct ProcessorStorageConstructor {
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case l2(Dn, Ind): // MOVE.l Dn, (An)
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case l2(Dn, PostInc): // MOVE.l Dn, (An)+
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op(int(Action::CopyToEffectiveAddress) | MicroOp::DestinationMask);
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op(Action::SetMoveFlagsl, seq("nW+ nw np", { ea(1), ea(1) }));
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op(Action::PerformOperation, seq("nW+ nw np", { ea(1), ea(1) }));
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if(destination_mode == PostInc) {
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op(increment_action | MicroOp::DestinationMask);
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}
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