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Improves constness.
This commit is contained in:
Thomas Harte
parent
d4095b1b3b
commit
fda2293d6b
@ -80,7 +80,7 @@ struct Instruction {
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uint32_t opcode = 0;
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// PowerPC uses a fixed-size instruction word.
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int size() {
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int size() const {
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return 4;
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}
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@ -99,81 +99,81 @@ struct Instruction {
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// full decoding has already occurred.
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/// Immediate field used to specify an unsigned 16-bit integer.
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uint16_t uimm() { return uint16_t(opcode & 0xffff); }
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uint16_t uimm() const { return uint16_t(opcode & 0xffff); }
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/// Immediate field used to specify a signed 16-bit integer.
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int16_t simm() { return int16_t(opcode & 0xffff); }
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int16_t simm() const { return int16_t(opcode & 0xffff); }
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/// Immediate field used to specify a signed 16-bit integer.
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int16_t d() { return int16_t(opcode & 0xffff); }
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int16_t d() const { return int16_t(opcode & 0xffff); }
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/// Immediate field used to specify a signed 14-bit integer [64-bit only].
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int16_t ds() { return int16_t(opcode & 0xfffc); }
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int16_t ds() const { return int16_t(opcode & 0xfffc); }
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/// Immediate field used as data to be placed into a field in the floating point status and condition register.
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int32_t imm() { return (opcode >> 12) & 0xf; }
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int32_t imm() const { return (opcode >> 12) & 0xf; }
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/// Specifies the conditions on which to trap.
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int32_t to() { return (opcode >> 21) & 0x1f; }
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int32_t to() const { return (opcode >> 21) & 0x1f; }
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/// Register source A or destination.
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uint32_t rA() { return (opcode >> 16) & 0x1f; }
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uint32_t rA() const { return (opcode >> 16) & 0x1f; }
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/// Register source B.
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uint32_t rB() { return (opcode >> 11) & 0x1f; }
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uint32_t rB() const { return (opcode >> 11) & 0x1f; }
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/// Register destination.
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uint32_t rD() { return (opcode >> 21) & 0x1f; }
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uint32_t rD() const { return (opcode >> 21) & 0x1f; }
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/// Register source.
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uint32_t rS() { return (opcode >> 21) & 0x1f; }
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uint32_t rS() const { return (opcode >> 21) & 0x1f; }
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/// Floating point register source A.
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uint32_t frA() { return (opcode >> 16) & 0x1f; }
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uint32_t frA() const { return (opcode >> 16) & 0x1f; }
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/// Floating point register source B.
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uint32_t frB() { return (opcode >> 11) & 0x1f; }
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uint32_t frB() const { return (opcode >> 11) & 0x1f; }
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/// Floating point register source C.
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uint32_t frC() { return (opcode >> 6) & 0x1f; }
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uint32_t frC() const { return (opcode >> 6) & 0x1f; }
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/// Floating point register source.
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uint32_t frS() { return (opcode >> 21) & 0x1f; }
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uint32_t frS() const { return (opcode >> 21) & 0x1f; }
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/// Floating point register destination.
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uint32_t frD() { return (opcode >> 21) & 0x1f; }
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uint32_t frD() const { return (opcode >> 21) & 0x1f; }
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/// Branch conditional options.
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uint32_t bo() { return (opcode >> 21) & 0x1f; }
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uint32_t bo() const { return (opcode >> 21) & 0x1f; }
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/// Source condition register bit for branch conditionals.
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uint32_t bi() { return (opcode >> 16) & 0x1f; }
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uint32_t bi() const { return (opcode >> 16) & 0x1f; }
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/// Branch displacement; provided as already sign extended.
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int16_t bd() { return int16_t(opcode & 0xfffc); }
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int16_t bd() const { return int16_t(opcode & 0xfffc); }
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/// Specifies the first 1 bit of a 32/64-bit mask for rotate operations.
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uint32_t mb() { return (opcode >> 6) & 0x1f; }
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uint32_t mb() const { return (opcode >> 6) & 0x1f; }
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/// Specifies the first 1 bit of a 32/64-bit mask for rotate operations.
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uint32_t me() { return (opcode >> 1) & 0x1f; }
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uint32_t me() const { return (opcode >> 1) & 0x1f; }
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/// Condition register source bit A.
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uint32_t crbA() { return (opcode >> 16) & 0x1f; }
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uint32_t crbA() const { return (opcode >> 16) & 0x1f; }
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/// Condition register source bit B.
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uint32_t crbB() { return (opcode >> 11) & 0x1f; }
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uint32_t crbB() const { return (opcode >> 11) & 0x1f; }
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/// Condition register (or floating point status & condition register) destination bit.
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uint32_t crbD() { return (opcode >> 21) & 0x1f; }
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uint32_t crbD() const { return (opcode >> 21) & 0x1f; }
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/// Condition register (or floating point status & condition register) destination field.
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uint32_t crfD() { return (opcode >> 23) & 0x07; }
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uint32_t crfD() const { return (opcode >> 23) & 0x07; }
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/// Condition register (or floating point status & condition register) source field.
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uint32_t crfS() { return (opcode >> 18) & 0x07; }
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uint32_t crfS() const { return (opcode >> 18) & 0x07; }
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/// Mask identifying fields to be updated by mtcrf.
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uint32_t crm() { return (opcode >> 12) & 0xff; }
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uint32_t crm() const { return (opcode >> 12) & 0xff; }
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/// Mask identifying fields to be updated by mtfsf.
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uint32_t fm() { return (opcode >> 17) & 0xff; }
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uint32_t fm() const { return (opcode >> 17) & 0xff; }
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/// Specifies the number of bytes to move in an immediate string load or store.
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uint32_t nb() { return (opcode >> 11) & 0x1f; }
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uint32_t nb() const { return (opcode >> 11) & 0x1f; }
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/// Specifies a shift amount.
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/// TODO: possibly bit 30 is also used in 64-bit mode, find out.
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uint32_t sh() { return (opcode >> 11) & 0x1f; }
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uint32_t sh() const { return (opcode >> 11) & 0x1f; }
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/// Specifies one of the 16 segment registers [32-bit only].
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uint32_t sr() { return (opcode >> 16) & 0xf; }
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uint32_t sr() const { return (opcode >> 16) & 0xf; }
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/// A 24-bit signed number; provided as already sign extended.
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int32_t li() {
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int32_t li() const {
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constexpr uint32_t extensions[2] = {
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0x0000'0000,
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0xfc00'0000
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@ -183,15 +183,15 @@ struct Instruction {
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}
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/// Absolute address bit; @c 0 or @c non-0.
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uint32_t aa() { return opcode & 0x02; }
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uint32_t aa() const { return opcode & 0x02; }
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/// Link bit; @c 0 or @c non-0.
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uint32_t lk() { return opcode & 0x01; }
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uint32_t lk() const { return opcode & 0x01; }
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/// Record bit; @c 0 or @c non-0.
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uint32_t rc() { return opcode & 0x01; }
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uint32_t rc() const { return opcode & 0x01; }
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/// Whether to compare 32-bit or 64-bit numbers [for 64-bit implementations only]; @c 0 or @c non-0.
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uint32_t l() { return opcode & 0x200000; }
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uint32_t l() const { return opcode & 0x200000; }
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/// Enables setting of OV and SO in the XER; @c 0 or @c non-0.
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uint32_t oe() { return opcode & 0x800; }
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uint32_t oe() const { return opcode & 0x800; }
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};
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/*!
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@ -208,15 +208,15 @@ struct Decoder {
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private:
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Model model_;
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bool is64bit() {
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bool is64bit() const {
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return model_ == Model::MPC620;
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}
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bool is32bit() {
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bool is32bit() const {
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return !is64bit();
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}
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bool is601() {
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bool is601() const {
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return model_ == Model::MPC601;
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}
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};
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